* [Intel-gfx] [PATCH 1/3] drm/i915: Initialise basic fence before acquiring seqno
@ 2020-02-01 9:31 Chris Wilson
2020-02-01 9:31 ` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno Chris Wilson
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Chris Wilson @ 2020-02-01 9:31 UTC (permalink / raw)
To: intel-gfx; +Cc: Matthew Auld
Inside the intel_timeline_get_seqno(), we currently track the retirement
of the old cachelines by listening to the new request. This requires
that the new request is ready to be used and so requires a minimum bit
of initialisation prior to getting the new seqno.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
drivers/gpu/drm/i915/i915_request.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 78a5f5d3c070..f56b046a32de 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -595,6 +595,8 @@ static void __i915_request_ctor(void *arg)
i915_sw_fence_init(&rq->submit, submit_notify);
i915_sw_fence_init(&rq->semaphore, semaphore_notify);
+ dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock, 0, 0);
+
rq->file_priv = NULL;
rq->capture_list = NULL;
@@ -653,25 +655,30 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp)
}
}
- ret = intel_timeline_get_seqno(tl, rq, &seqno);
- if (ret)
- goto err_free;
-
rq->i915 = ce->engine->i915;
rq->context = ce;
rq->engine = ce->engine;
rq->ring = ce->ring;
rq->execution_mask = ce->engine->mask;
+ kref_init(&rq->fence.refcount);
+ rq->fence.flags = 0;
+ rq->fence.error = 0;
+ INIT_LIST_HEAD(&rq->fence.cb_list);
+
+ ret = intel_timeline_get_seqno(tl, rq, &seqno);
+ if (ret)
+ goto err_free;
+
+ rq->fence.context = tl->fence_context;
+ rq->fence.seqno = seqno;
+
RCU_INIT_POINTER(rq->timeline, tl);
RCU_INIT_POINTER(rq->hwsp_cacheline, tl->hwsp_cacheline);
rq->hwsp_seqno = tl->hwsp_seqno;
rq->rcustate = get_state_synchronize_rcu(); /* acts as smp_mb() */
- dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock,
- tl->fence_context, seqno);
-
/* We bump the ref for the fence chain */
i915_sw_fence_reinit(&i915_request_get(rq)->submit);
i915_sw_fence_reinit(&i915_request_get(rq)->semaphore);
--
2.25.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [Intel-gfx] [PATCH 2/3] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno
2020-02-01 9:31 [Intel-gfx] [PATCH 1/3] drm/i915: Initialise basic fence before acquiring seqno Chris Wilson
@ 2020-02-01 9:31 ` Chris Wilson
2020-02-01 9:31 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add a simple rollover for the kernel context Chris Wilson
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2020-02-01 9:31 UTC (permalink / raw)
To: intel-gfx
On seqno rollover, we need to allocate ourselves a new cacheline. This
might incur grabbing a new page and pinning it into the GGTT, with some
rather unfortunate lockdep implications.
To avoid a mutex, and more specifically pinning in the GGTT from inside
the kernel context being used to flush the GGTT in emergencies, we will
likely need to lift the next-cacheline allocation to a pre-reservation.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 465f87b65901..54e1e55f3c81 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -406,6 +406,8 @@ __intel_timeline_get_seqno(struct intel_timeline *tl,
void *vaddr;
int err;
+ might_lock(&tl->gt->ggtt->vm.mutex);
+
/*
* If there is an outstanding GPU reference to this cacheline,
* such as it being sampled by a HW semaphore on another timeline,
--
2.25.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add a simple rollover for the kernel context
2020-02-01 9:31 [Intel-gfx] [PATCH 1/3] drm/i915: Initialise basic fence before acquiring seqno Chris Wilson
2020-02-01 9:31 ` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno Chris Wilson
@ 2020-02-01 9:31 ` Chris Wilson
2020-02-01 10:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Initialise basic fence before acquiring seqno Patchwork
2020-02-05 2:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2020-02-01 9:31 UTC (permalink / raw)
To: intel-gfx
Exercise the seqno wrap paths on the kernel context to provide a small
amount of sanity checking and ensure that they are visible to lockdep.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/gt/selftest_timeline.c | 177 ++++++++++++++++++++
1 file changed, 177 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c
index e2d78cc22fb4..25edfd7a1544 100644
--- a/drivers/gpu/drm/i915/gt/selftest_timeline.c
+++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c
@@ -6,6 +6,8 @@
#include <linux/prime_numbers.h>
+#include "intel_context.h"
+#include "intel_engine_heartbeat.h"
#include "intel_engine_pm.h"
#include "intel_gt.h"
#include "intel_gt_requests.h"
@@ -750,6 +752,179 @@ static int live_hwsp_wrap(void *arg)
return err;
}
+static void engine_heartbeat_disable(struct intel_engine_cs *engine,
+ unsigned long *saved)
+{
+ *saved = engine->props.heartbeat_interval_ms;
+ engine->props.heartbeat_interval_ms = 0;
+
+ intel_engine_pm_get(engine);
+ intel_engine_park_heartbeat(engine);
+}
+
+static void engine_heartbeat_enable(struct intel_engine_cs *engine,
+ unsigned long saved)
+{
+ intel_engine_pm_put(engine);
+
+ engine->props.heartbeat_interval_ms = saved;
+}
+
+static int live_hwsp_rollover_kernel(void *arg)
+{
+ struct intel_gt *gt = arg;
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+ int err = 0;
+
+ /*
+ * Run the host for long enough, and even the kernel context will
+ * see a seqno rollover.
+ */
+
+ for_each_engine(engine, gt, id) {
+ struct intel_context *ce = engine->kernel_context;
+ struct intel_timeline *tl = ce->timeline;
+ struct i915_request *rq[3] = {};
+ unsigned long heartbeat;
+ int i;
+
+ engine_heartbeat_disable(engine, &heartbeat);
+ if (intel_gt_wait_for_idle(gt, HZ / 2)) {
+ err = -EIO;
+ goto out;
+ }
+
+ GEM_BUG_ON(i915_active_fence_isset(&tl->last_request));
+ tl->seqno = 0;
+ timeline_rollback(tl);
+ timeline_rollback(tl);
+ WRITE_ONCE(*(u32 *)tl->hwsp_seqno, tl->seqno);
+
+ for (i = 0; i < ARRAY_SIZE(rq); i++) {
+ rq[i] = i915_request_create(ce);
+ if (IS_ERR(rq[i])) {
+ err = PTR_ERR(rq[i]);
+ goto out;
+ }
+
+ pr_debug("%s: create fence.seqnp:%d\n",
+ engine->name, lower_32_bits(rq[i]->fence.seqno));
+ i915_request_get(rq[i]);
+ GEM_BUG_ON(rcu_access_pointer(rq[i]->timeline) != tl);
+ i915_request_add(rq[i]);
+ }
+
+ /* We expected a wrap! */
+ GEM_BUG_ON(rq[2]->fence.seqno > rq[0]->fence.seqno);
+
+ if (i915_request_wait(rq[2], 0, HZ / 5) < 0) {
+ pr_err("Wait for timeline wrap timed out!\n");
+ err = -EIO;
+ goto out;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(rq); i++) {
+ if (!i915_request_completed(rq[i])) {
+ pr_err("Pre-wrap request not completed!\n");
+ err = -EINVAL;
+ goto out;
+ }
+ }
+
+out:
+ for (i = 0; i < ARRAY_SIZE(rq); i++)
+ i915_request_put(rq[i]);
+ engine_heartbeat_enable(engine, heartbeat);
+ if (err)
+ break;
+ }
+
+ if (igt_flush_test(gt->i915))
+ err = -EIO;
+
+ return err;
+}
+
+static int live_hwsp_rollover_user(void *arg)
+{
+ struct intel_gt *gt = arg;
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+ int err = 0;
+
+ /*
+ * Simulate a long running user context, and force the seqno wrap
+ * on the user's timeline.
+ */
+
+ for_each_engine(engine, gt, id) {
+ struct i915_request *rq[3] = {};
+ struct intel_timeline *tl;
+ struct intel_context *ce;
+ int i;
+
+ ce = intel_context_create(engine);
+ if (IS_ERR(ce))
+ return PTR_ERR(ce);
+
+ err = intel_context_alloc_state(ce);
+ if (err)
+ goto out;
+
+ tl = ce->timeline;
+ if (!tl->has_initial_breadcrumb || !tl->hwsp_cacheline)
+ goto out;
+
+ timeline_rollback(tl);
+ timeline_rollback(tl);
+ WRITE_ONCE(*(u32 *)tl->hwsp_seqno, tl->seqno);
+
+ for (i = 0; i < ARRAY_SIZE(rq); i++) {
+ rq[i] = intel_context_create_request(ce);
+ if (IS_ERR(rq[i])) {
+ err = PTR_ERR(rq[i]);
+ goto out;
+ }
+
+ pr_debug("%s: create fence.seqnp:%d\n",
+ engine->name, lower_32_bits(rq[i]->fence.seqno));
+ GEM_BUG_ON(rcu_access_pointer(rq[i]->timeline) != tl);
+ i915_request_get(rq[i]);
+ i915_request_add(rq[i]);
+ }
+
+ /* We expected a wrap! */
+ GEM_BUG_ON(rq[2]->fence.seqno > rq[0]->fence.seqno);
+
+ if (i915_request_wait(rq[2], 0, HZ / 5) < 0) {
+ pr_err("Wait for timeline wrap timed out!\n");
+ err = -EIO;
+ goto out;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(rq); i++) {
+ if (!i915_request_completed(rq[i])) {
+ pr_err("Pre-wrap request not completed!\n");
+ err = -EINVAL;
+ goto out;
+ }
+ }
+
+out:
+ for (i = 0; i < ARRAY_SIZE(rq); i++)
+ i915_request_put(rq[i]);
+ intel_context_put(ce);
+ if (err)
+ break;
+ }
+
+ if (igt_flush_test(gt->i915))
+ err = -EIO;
+
+ return err;
+}
+
static int live_hwsp_recycle(void *arg)
{
struct intel_gt *gt = arg;
@@ -827,6 +1002,8 @@ int intel_timeline_live_selftests(struct drm_i915_private *i915)
SUBTEST(live_hwsp_engine),
SUBTEST(live_hwsp_alternate),
SUBTEST(live_hwsp_wrap),
+ SUBTEST(live_hwsp_rollover_kernel),
+ SUBTEST(live_hwsp_rollover_user),
};
if (intel_gt_is_wedged(&i915->gt))
--
2.25.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Initialise basic fence before acquiring seqno
2020-02-01 9:31 [Intel-gfx] [PATCH 1/3] drm/i915: Initialise basic fence before acquiring seqno Chris Wilson
2020-02-01 9:31 ` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno Chris Wilson
2020-02-01 9:31 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add a simple rollover for the kernel context Chris Wilson
@ 2020-02-01 10:23 ` Patchwork
2020-02-05 2:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2020-02-01 10:23 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] drm/i915: Initialise basic fence before acquiring seqno
URL : https://patchwork.freedesktop.org/series/72862/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7854 -> Patchwork_16372
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/index.html
Known issues
------------
Here are the changes found in Patchwork_16372 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_parallel@contexts:
- fi-byt-n2820: [PASS][1] -> [TIMEOUT][2] ([fdo#112271] / [i915#1084])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/fi-byt-n2820/igt@gem_exec_parallel@contexts.html
* igt@i915_module_load@reload:
- fi-icl-u2: [PASS][3] -> [DMESG-WARN][4] ([i915#289]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/fi-icl-u2/igt@i915_module_load@reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/fi-icl-u2/igt@i915_module_load@reload.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770r: [PASS][5] -> [DMESG-FAIL][6] ([i915#553] / [i915#725])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/fi-hsw-4770r/igt@i915_selftest@live_blt.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/fi-hsw-4770r/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_gem_contexts:
- fi-cfl-8700k: [PASS][7] -> [INCOMPLETE][8] ([i915#424])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/fi-cfl-8700k/igt@i915_selftest@live_gem_contexts.html
* igt@i915_selftest@live_requests:
- fi-icl-guc: [PASS][9] -> [INCOMPLETE][10] ([fdo#109644] / [fdo#110464])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/fi-icl-guc/igt@i915_selftest@live_requests.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/fi-icl-guc/igt@i915_selftest@live_requests.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][11] -> [FAIL][12] ([fdo#111407])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Possible fixes ####
* igt@gem_close_race@basic-threads:
- fi-byt-j1900: [TIMEOUT][13] ([fdo#112271] / [i915#1084] / [i915#816]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/fi-byt-j1900/igt@gem_close_race@basic-threads.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/fi-byt-j1900/igt@gem_close_race@basic-threads.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][15] ([i915#263]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
#### Warnings ####
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [FAIL][17] ([i915#323]) -> [DMESG-WARN][18] ([IGT#4] / [i915#263])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[IGT#4]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/4
[fdo#109644]: https://bugs.freedesktop.org/show_bug.cgi?id=109644
[fdo#110464]: https://bugs.freedesktop.org/show_bug.cgi?id=110464
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
[i915#263]: https://gitlab.freedesktop.org/drm/intel/issues/263
[i915#289]: https://gitlab.freedesktop.org/drm/intel/issues/289
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
[i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
Participating hosts (48 -> 41)
------------------------------
Additional (4): fi-hsw-peppy fi-skl-lmem fi-gdg-551 fi-ivb-3770
Missing (11): fi-ilk-m540 fi-bdw-samus fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-blb-e6850 fi-byt-clapper fi-kbl-r fi-skl-6600u fi-snb-2600
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7854 -> Patchwork_16372
CI-20190529: 20190529
CI_DRM_7854: 727605cdef77d1e7eafb7e4c05b0ee74132a0930 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5410: 9d3872ede14307ef4adb0866f8474f5c41e6b1c1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16372: 3b9cb1f8bd485c062247af5867059f766b1b2fcb @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
3b9cb1f8bd48 drm/i915/selftests: Add a simple rollover for the kernel context
557b3fff1bb9 drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno
a767f236228e drm/i915: Initialise basic fence before acquiring seqno
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Initialise basic fence before acquiring seqno
2020-02-01 9:31 [Intel-gfx] [PATCH 1/3] drm/i915: Initialise basic fence before acquiring seqno Chris Wilson
` (2 preceding siblings ...)
2020-02-01 10:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Initialise basic fence before acquiring seqno Patchwork
@ 2020-02-05 2:00 ` Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2020-02-05 2:00 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] drm/i915: Initialise basic fence before acquiring seqno
URL : https://patchwork.freedesktop.org/series/72862/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7854_full -> Patchwork_16372_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_16372_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_shared@exec-shared-gtt-vebox:
- shard-tglb: [PASS][1] -> [FAIL][2] ([i915#616])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-tglb5/igt@gem_ctx_shared@exec-shared-gtt-vebox.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-tglb7/igt@gem_ctx_shared@exec-shared-gtt-vebox.html
* igt@gem_exec_schedule@independent-bsd2:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276]) +6 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb4/igt@gem_exec_schedule@independent-bsd2.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb8/igt@gem_exec_schedule@independent-bsd2.html
* igt@gem_exec_schedule@pi-userfault-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb7/igt@gem_exec_schedule@pi-userfault-bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb4/igt@gem_exec_schedule@pi-userfault-bsd.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +3 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][9] -> [TIMEOUT][10] ([i915#716])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl8/igt@gen9_exec_parse@allowed-single.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl3/igt@gen9_exec_parse@allowed-single.html
* igt@i915_selftest@live_blt:
- shard-hsw: [PASS][11] -> [DMESG-FAIL][12] ([i915#553] / [i915#725])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-hsw1/igt@i915_selftest@live_blt.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-hsw1/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_gtt:
- shard-kbl: [PASS][13] -> [TIMEOUT][14] ([fdo#112271])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-kbl3/igt@i915_selftest@live_gtt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-kbl3/igt@i915_selftest@live_gtt.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +4 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-apl6/igt@i915_suspend@sysfs-reader.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-apl6/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +6 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-ytiled:
- shard-skl: [PASS][19] -> [FAIL][20] ([i915#52] / [i915#54])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl4/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-ytiled.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl7/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-ytiled.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [PASS][21] -> [FAIL][22] ([i915#46])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite:
- shard-skl: [PASS][23] -> [FAIL][24] ([i915#49])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl4/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl7/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][25] -> [FAIL][26] ([fdo#108145])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-skl: [PASS][27] -> [DMESG-WARN][28] ([i915#109])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl1/igt@kms_plane_multiple@atomic-pipe-a-tiling-yf.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl3/igt@kms_plane_multiple@atomic-pipe-a-tiling-yf.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb4/igt@kms_psr@psr2_sprite_blt.html
* igt@perf_pmu@busy-vcs1:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#112080]) +4 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb1/igt@perf_pmu@busy-vcs1.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb6/igt@perf_pmu@busy-vcs1.html
#### Possible fixes ####
* igt@gem_exec_balancer@hang:
- shard-tglb: [TIMEOUT][33] ([fdo#112271]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-tglb3/igt@gem_exec_balancer@hang.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-tglb3/igt@gem_exec_balancer@hang.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [SKIP][35] ([fdo#110854]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb7/igt@gem_exec_balancer@smoke.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb4/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@in-order-bsd:
- shard-iclb: [SKIP][37] ([fdo#112146]) -> [PASS][38] +3 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb4/igt@gem_exec_schedule@in-order-bsd.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb3/igt@gem_exec_schedule@in-order-bsd.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [SKIP][39] ([fdo#109276]) -> [PASS][40] +13 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb8/igt@gem_exec_schedule@preempt-contexts-bsd2.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb1/igt@gem_exec_schedule@preempt-contexts-bsd2.html
* igt@gem_pwrite@huge-cpu-forwards:
- shard-hsw: [INCOMPLETE][41] ([i915#61]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-hsw8/igt@gem_pwrite@huge-cpu-forwards.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-hsw6/igt@gem_pwrite@huge-cpu-forwards.html
* igt@i915_pm_rpm@system-suspend-execbuf:
- shard-skl: [INCOMPLETE][43] ([i915#151] / [i915#69]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl9/igt@i915_pm_rpm@system-suspend-execbuf.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl3/igt@i915_pm_rpm@system-suspend-execbuf.html
* igt@kms_color@pipe-b-ctm-red-to-blue:
- shard-skl: [DMESG-WARN][45] ([i915#109]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl8/igt@kms_color@pipe-b-ctm-red-to-blue.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl3/igt@kms_color@pipe-b-ctm-red-to-blue.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [DMESG-WARN][47] ([i915#180]) -> [PASS][48] +6 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [FAIL][49] ([i915#79]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-glk6/igt@kms_flip@flip-vs-expired-vblank.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-glk2/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-skl: [INCOMPLETE][51] ([i915#221]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl5/igt@kms_flip@flip-vs-suspend-interruptible.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl9/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: [FAIL][53] ([i915#34]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][55] ([fdo#108145] / [i915#265]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][57] ([fdo#109441]) -> [PASS][58] +2 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@perf_pmu@busy-accuracy-2-vcs1:
- shard-iclb: [SKIP][59] ([fdo#112080]) -> [PASS][60] +8 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb5/igt@perf_pmu@busy-accuracy-2-vcs1.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb2/igt@perf_pmu@busy-accuracy-2-vcs1.html
* igt@prime_mmap_coherency@ioctl-errors:
- shard-hsw: [FAIL][61] ([i915#831]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-hsw7/igt@prime_mmap_coherency@ioctl-errors.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-hsw5/igt@prime_mmap_coherency@ioctl-errors.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv-switch:
- shard-iclb: [FAIL][63] ([IGT#28]) -> [SKIP][64] ([fdo#112080])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
* igt@gem_tiled_blits@normal:
- shard-hsw: [FAIL][65] ([i915#694]) -> [FAIL][66] ([i915#818]) +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7854/shard-hsw2/igt@gem_tiled_blits@normal.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/shard-hsw2/igt@gem_tiled_blits@normal.html
[IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
[i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#46]: https://gitlab.freedesktop.org/drm/intel/issues/46
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
[i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61
[i915#616]: https://gitlab.freedesktop.org/drm/intel/issues/616
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
[i915#831]: https://gitlab.freedesktop.org/drm/intel/issues/831
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7854 -> Patchwork_16372
CI-20190529: 20190529
CI_DRM_7854: 727605cdef77d1e7eafb7e4c05b0ee74132a0930 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5410: 9d3872ede14307ef4adb0866f8474f5c41e6b1c1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16372: 3b9cb1f8bd485c062247af5867059f766b1b2fcb @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16372/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-02-05 2:00 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-01 9:31 [Intel-gfx] [PATCH 1/3] drm/i915: Initialise basic fence before acquiring seqno Chris Wilson
2020-02-01 9:31 ` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Warn about the hidden i915_vma_pin in timeline_get_seqno Chris Wilson
2020-02-01 9:31 ` [Intel-gfx] [PATCH 3/3] drm/i915/selftests: Add a simple rollover for the kernel context Chris Wilson
2020-02-01 10:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Initialise basic fence before acquiring seqno Patchwork
2020-02-05 2:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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