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* [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+
@ 2020-02-05 11:59 Uma Shankar
  2020-02-05 11:59 ` [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V13) Uma Shankar
  2020-02-10 17:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Adding YUV444 packed format support for skl+ (rev2) Patchwork
  0 siblings, 2 replies; 6+ messages in thread
From: Uma Shankar @ 2020-02-05 11:59 UTC (permalink / raw)
  To: intel-gfx; +Cc: ville.syrjala

Adding YUV444 packed format support for skl+

Test-with: 20200127192859.20029-1-bob.j.paauwe@intel.com

Stanislav Lisovskiy (1):
  drm/i915: Adding YUV444 packed format support for skl+ (V13)

 drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
 drivers/gpu/drm/i915/display/intel_sprite.c  | 5 +++++
 drivers/gpu/drm/i915/i915_reg.h              | 2 +-
 3 files changed, 11 insertions(+), 1 deletion(-)

-- 
2.22.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V13)
  2020-02-05 11:59 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Uma Shankar
@ 2020-02-05 11:59 ` Uma Shankar
  2020-02-10 17:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Adding YUV444 packed format support for skl+ (rev2) Patchwork
  1 sibling, 0 replies; 6+ messages in thread
From: Uma Shankar @ 2020-02-05 11:59 UTC (permalink / raw)
  To: intel-gfx; +Cc: ville.syrjala

From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

PLANE_CTL_FORMAT_AYUV is already supported, according to hardware
specification.

v2: Edited commit message, removed redundant whitespaces.

v3: Fixed fallthrough logic for the format switch cases.

v4: Yet again fixed fallthrough logic, to reuse code from other case
    labels.

v5: Started to use XYUV instead of AYUV, as we don't use alpha.

v6: Removed unneeded initializer for new XYUV format.

v7: Added scaling support for DRM_FORMAT_XYUV

v8: Edited commit message to be more clear about skl+, renamed
    PLANE_CTL_FORMAT_AYUV to PLANE_CTL_FORMAT_XYUV as this format
    doesn't support per-pixel alpha. Fixed minor code issues.

v9: Moved DRM format check to proper place in intel_framebuffer_init.

v10: Added missing XYUV format to sprite planes for skl+.

v11: Changed DRM_FORMAT_XYUV to be DRM_FORMAT_XYUV8888.

v12: Fixed rebase conflicts

V13: Rebased.
     Added format to ICL format lists.

v14: Rebase.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
 drivers/gpu/drm/i915/display/intel_sprite.c  | 5 +++++
 drivers/gpu/drm/i915/i915_reg.h              | 2 +-
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 368e481d45ee..cb7d5dbfc3ad 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3331,6 +3331,8 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
 		return DRM_FORMAT_RGB565;
 	case PLANE_CTL_FORMAT_NV12:
 		return DRM_FORMAT_NV12;
+	case PLANE_CTL_FORMAT_XYUV:
+		return DRM_FORMAT_XYUV8888;
 	case PLANE_CTL_FORMAT_P010:
 		return DRM_FORMAT_P010;
 	case PLANE_CTL_FORMAT_P012:
@@ -4570,6 +4572,8 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
 	case DRM_FORMAT_XRGB16161616F:
 	case DRM_FORMAT_ARGB16161616F:
 		return PLANE_CTL_FORMAT_XRGB_16161616F;
+	case DRM_FORMAT_XYUV8888:
+		return PLANE_CTL_FORMAT_XYUV;
 	case DRM_FORMAT_YUYV:
 		return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_YUYV;
 	case DRM_FORMAT_YVYU:
@@ -6186,6 +6190,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
 	case DRM_FORMAT_UYVY:
 	case DRM_FORMAT_VYUY:
 	case DRM_FORMAT_NV12:
+	case DRM_FORMAT_XYUV8888:
 	case DRM_FORMAT_P010:
 	case DRM_FORMAT_P012:
 	case DRM_FORMAT_P016:
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 7abeefe8dce5..1540eab7ba79 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2483,6 +2483,7 @@ static const u32 skl_plane_formats[] = {
 	DRM_FORMAT_YVYU,
 	DRM_FORMAT_UYVY,
 	DRM_FORMAT_VYUY,
+	DRM_FORMAT_XYUV8888,
 };
 
 static const u32 skl_planar_formats[] = {
@@ -2501,6 +2502,7 @@ static const u32 skl_planar_formats[] = {
 	DRM_FORMAT_UYVY,
 	DRM_FORMAT_VYUY,
 	DRM_FORMAT_NV12,
+	DRM_FORMAT_XYUV8888,
 };
 
 static const u32 glk_planar_formats[] = {
@@ -2572,6 +2574,7 @@ static const u32 icl_sdr_uv_plane_formats[] = {
 	DRM_FORMAT_XVYU2101010,
 	DRM_FORMAT_XVYU12_16161616,
 	DRM_FORMAT_XVYU16161616,
+	DRM_FORMAT_XYUV8888,
 };
 
 static const u32 icl_hdr_plane_formats[] = {
@@ -2603,6 +2606,7 @@ static const u32 icl_hdr_plane_formats[] = {
 	DRM_FORMAT_XVYU2101010,
 	DRM_FORMAT_XVYU12_16161616,
 	DRM_FORMAT_XVYU16161616,
+	DRM_FORMAT_XYUV8888,
 };
 
 static const u64 skl_plane_format_modifiers_noccs[] = {
@@ -2770,6 +2774,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
 	case DRM_FORMAT_UYVY:
 	case DRM_FORMAT_VYUY:
 	case DRM_FORMAT_NV12:
+	case DRM_FORMAT_XYUV8888:
 	case DRM_FORMAT_P010:
 	case DRM_FORMAT_P012:
 	case DRM_FORMAT_P016:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0bd431f6a011..a6204e9bc36e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6769,7 +6769,7 @@ enum {
 #define   PLANE_CTL_FORMAT_P012			(5 << 24)
 #define   PLANE_CTL_FORMAT_XRGB_16161616F	(6 << 24)
 #define   PLANE_CTL_FORMAT_P016			(7 << 24)
-#define   PLANE_CTL_FORMAT_AYUV			(8 << 24)
+#define   PLANE_CTL_FORMAT_XYUV			(8 << 24)
 #define   PLANE_CTL_FORMAT_INDEXED		(12 << 24)
 #define   PLANE_CTL_FORMAT_RGB_565		(14 << 24)
 #define   ICL_PLANE_CTL_FORMAT_MASK		(0x1f << 23)
-- 
2.22.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for Adding YUV444 packed format support for skl+ (rev2)
  2020-02-05 11:59 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Uma Shankar
  2020-02-05 11:59 ` [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V13) Uma Shankar
@ 2020-02-10 17:24 ` Patchwork
  1 sibling, 0 replies; 6+ messages in thread
From: Patchwork @ 2020-02-10 17:24 UTC (permalink / raw)
  To: Shankar, Uma; +Cc: intel-gfx

== Series Details ==

Series: Adding YUV444 packed format support for skl+ (rev2)
URL   : https://patchwork.freedesktop.org/series/73020/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7900 -> Patchwork_16502
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/index.html

Known issues
------------

  Here are the changes found in Patchwork_16502 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_blt:
    - fi-ivb-3770:        [PASS][1] -> [DMESG-FAIL][2] ([i915#725])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/fi-ivb-3770/igt@i915_selftest@live_blt.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-hsw-peppy:       [INCOMPLETE][3] ([i915#694] / [i915#816]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-hsw-peppy/igt@gem_close_race@basic-threads.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/fi-hsw-peppy/igt@gem_close_race@basic-threads.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [DMESG-FAIL][5] ([i915#553] / [i915#725]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_execlists:
    - fi-icl-y:           [DMESG-FAIL][7] ([fdo#108569]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-icl-y/igt@i915_selftest@live_execlists.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/fi-icl-y/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-cml-s:           [DMESG-FAIL][9] ([i915#877]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/fi-cml-s/igt@i915_selftest@live_gem_contexts.html

  * igt@i915_selftest@live_gtt:
    - fi-skl-6770hq:      [TIMEOUT][11] ([fdo#111732] / [fdo#112271]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-skl-6770hq/igt@i915_selftest@live_gtt.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/fi-skl-6770hq/igt@i915_selftest@live_gtt.html
    - fi-skl-6600u:       [TIMEOUT][13] ([fdo#111732] / [fdo#112271]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-skl-6600u/igt@i915_selftest@live_gtt.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/fi-skl-6600u/igt@i915_selftest@live_gtt.html

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-kbl-7500u:       [FAIL][15] ([fdo#109635] / [i915#217]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html

  
#### Warnings ####

  * igt@gem_ctx_create@basic-files:
    - fi-whl-u:           [INCOMPLETE][17] ([i915#1194]) -> [INCOMPLETE][18] ([i915#1147])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7900/fi-whl-u/igt@gem_ctx_create@basic-files.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/fi-whl-u/igt@gem_ctx_create@basic-files.html

  
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
  [fdo#111732]: https://bugs.freedesktop.org/show_bug.cgi?id=111732
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#1147]: https://gitlab.freedesktop.org/drm/intel/issues/1147
  [i915#1194]: https://gitlab.freedesktop.org/drm/intel/issues/1194
  [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
  [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
  [i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877


Participating hosts (51 -> 47)
------------------------------

  Additional (3): fi-kbl-7560u fi-byt-n2820 fi-bwr-2160 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050 fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5432 -> IGTPW_4011
  * Linux: CI_DRM_7900 -> Patchwork_16502

  CI-20190529: 20190529
  CI_DRM_7900: f4ab479a4e3c9e0bc9120f6618b9876bfdece9cc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4011: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4011/index.html
  IGT_5432: 6677811be6e9be9000b3217e8862353b3945a4f3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16502: 28b7caa469bc3ae0ec573ee2e926c346295facc5 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

28b7caa469bc drm/i915: Adding YUV444 packed format support for skl+ (V13)

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16502/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+
@ 2020-04-07 21:55 Bob Paauwe
  0 siblings, 0 replies; 6+ messages in thread
From: Bob Paauwe @ 2020-04-07 21:55 UTC (permalink / raw)
  To: intel-gfx

Test-with: <20200407215146.5331-1-bob.j.paauwe@intel.com>

Stanislav Lisovskiy (1):
  drm/i915: Adding YUV444 packed format support for skl+ (V15)

 drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
 drivers/gpu/drm/i915/display/intel_sprite.c  | 8 ++++++++
 drivers/gpu/drm/i915/i915_reg.h              | 2 +-
 3 files changed, 14 insertions(+), 1 deletion(-)

-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+
  2020-02-19 21:15 [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V14) Bob Paauwe
@ 2020-02-27 19:15 ` Bob Paauwe
  0 siblings, 0 replies; 6+ messages in thread
From: Bob Paauwe @ 2020-02-27 19:15 UTC (permalink / raw)
  To: intel-gfx

Test-with: 20200127192859.20029-1-bob.j.paauwe@intel.com

Stanislav Lisovskiy (1):
  drm/i915: Adding YUV444 packed format support for skl+ (V15)

 drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
 drivers/gpu/drm/i915/display/intel_sprite.c  | 8 ++++++++
 drivers/gpu/drm/i915/i915_reg.h              | 2 +-
 3 files changed, 14 insertions(+), 1 deletion(-)

-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+
@ 2020-02-19 21:15 Bob Paauwe
  0 siblings, 0 replies; 6+ messages in thread
From: Bob Paauwe @ 2020-02-19 21:15 UTC (permalink / raw)
  To: intel-gfx

Test-with: 20200127192859.20029-1-bob.j.paauwe@intel.com

Stanislav Lisovskiy (1):
  drm/i915: Adding YUV444 packed format support for skl+ (V14)

 drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
 drivers/gpu/drm/i915/display/intel_sprite.c  | 6 ++++++
 drivers/gpu/drm/i915/i915_reg.h              | 2 +-
 3 files changed, 12 insertions(+), 1 deletion(-)

-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2020-04-07 21:55 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-05 11:59 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Uma Shankar
2020-02-05 11:59 ` [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V13) Uma Shankar
2020-02-10 17:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Adding YUV444 packed format support for skl+ (rev2) Patchwork
2020-02-19 21:15 [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
2020-02-19 21:15 [Intel-gfx] [PATCH 1/1] drm/i915: Adding YUV444 packed format support for skl+ (V14) Bob Paauwe
2020-02-27 19:15 ` [Intel-gfx] [PATCH 0/1] Adding YUV444 packed format support for skl+ Bob Paauwe
2020-04-07 21:55 Bob Paauwe

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