[Intel-gfx] [PATCH v2 0/7] 3 display pipes combination system support

[Intel-gfx] [PATCH v2 0/7] 3 display pipes combination system support

[Anshuman Gupta]

Updated version after fixing some review comment provided by
ville on v2 version, which unfortunately didn't reach to mailing
list due to typo in "to address".

Anshuman Gupta (7):
  drm/i915: Iterate over pipe and skip the disabled one
  drm/i915: Remove (pipe == crtc->index) assumption
  drm/i915: Fix broken transcoder err state
  drm/i915: Fix wrongly populated plane possible_crtcs bit mask
  drm/i915: Get first crtc instead of PIPE_A crtc
  drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()
  drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps

 drivers/gpu/drm/i915/display/intel_audio.c    |  2 +-
 drivers/gpu/drm/i915/display/intel_display.c  | 35 ++++++++++++------
 drivers/gpu/drm/i915/display/intel_display.h  |  5 +--
 .../drm/i915/display/intel_display_types.h    | 36 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_sprite.c   |  5 +--
 drivers/gpu/drm/i915/i915_drv.h               |  2 ++
 drivers/gpu/drm/i915/i915_irq.c               | 20 ++++++-----
 7 files changed, 77 insertions(+), 28 deletions(-)

-- 
2.24.0

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[Intel-gfx] [PATCH v2 1/7] drm/i915: Iterate over pipe and skip the disabled one

[Anshuman Gupta]

It should not be assumed that a disabled display pipe will be
always last the pipe.
for_each_pipe() should iterate over I915_MAX_PIPES and check
for the disabled pipe and skip that pipe so that it should not
initialize the intel crtc for any disabled pipes.

Below compilation error require to be handle due to change in
for_each_pipe() macro.
"suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else]"

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.h | 5 +++--
 drivers/gpu/drm/i915/i915_irq.c              | 6 ++++--
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 75438a136d58..7a531e485b53 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -313,10 +313,11 @@ enum phy_fia {
 };
 
 #define for_each_pipe(__dev_priv, __p) \
-	for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++)
+	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
+		for_each_if((INTEL_INFO(__dev_priv)->pipe_mask) & BIT(__p))
 
 #define for_each_pipe_masked(__dev_priv, __p, __mask) \
-	for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) \
+	for_each_pipe(__dev_priv, __p) \
 		for_each_if((__mask) & BIT(__p))
 
 #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3d0cd0960bd2..a26f2bf1b6ea 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1739,11 +1739,12 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 	if (pch_iir & SDE_POISON)
 		drm_err(&dev_priv->drm, "PCH poison interrupt\n");
 
-	if (pch_iir & SDE_FDI_MASK)
+	if (pch_iir & SDE_FDI_MASK) {
 		for_each_pipe(dev_priv, pipe)
 			drm_dbg(&dev_priv->drm, "  pipe %c FDI IIR: 0x%08x\n",
 				pipe_name(pipe),
 				I915_READ(FDI_RX_IIR(pipe)));
+	}
 
 	if (pch_iir & (SDE_TRANSB_CRC_DONE | SDE_TRANSA_CRC_DONE))
 		drm_dbg(&dev_priv->drm, "PCH transcoder CRC done interrupt\n");
@@ -1823,11 +1824,12 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 	if (pch_iir & SDE_AUDIO_CP_CHG_CPT)
 		drm_dbg(&dev_priv->drm, "Audio CP change interrupt\n");
 
-	if (pch_iir & SDE_FDI_MASK_CPT)
+	if (pch_iir & SDE_FDI_MASK_CPT) {
 		for_each_pipe(dev_priv, pipe)
 			drm_dbg(&dev_priv->drm, "  pipe %c FDI IIR: 0x%08x\n",
 				pipe_name(pipe),
 				I915_READ(FDI_RX_IIR(pipe)));
+	}
 
 	if (pch_iir & SDE_ERROR_CPT)
 		cpt_serr_int_handler(dev_priv);
-- 
2.24.0

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Re: [Intel-gfx] [PATCH v2 1/7] drm/i915: Iterate over pipe and skip the disabled one

[Ville Syrjälä]

On Tue, Feb 11, 2020 at 10:55:26PM +0530, Anshuman Gupta wrote:
> It should not be assumed that a disabled display pipe will be
> always last the pipe.
> for_each_pipe() should iterate over I915_MAX_PIPES and check
> for the disabled pipe and skip that pipe so that it should not
> initialize the intel crtc for any disabled pipes.
> 
> Below compilation error require to be handle due to change in
> for_each_pipe() macro.
> "suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else]"
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.h | 5 +++--
>  drivers/gpu/drm/i915/i915_irq.c              | 6 ++++--
>  2 files changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 75438a136d58..7a531e485b53 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -313,10 +313,11 @@ enum phy_fia {
>  };
>  
>  #define for_each_pipe(__dev_priv, __p) \
> -	for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++)
> +	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
> +		for_each_if((INTEL_INFO(__dev_priv)->pipe_mask) & BIT(__p))
>  
>  #define for_each_pipe_masked(__dev_priv, __p, __mask) \
> -	for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) \
> +	for_each_pipe(__dev_priv, __p) \
>  		for_each_if((__mask) & BIT(__p))

You didn't address my comments for this stuff! Please don't leave
review comments unaddressed, it's just wasting everyone's time.

>  
>  #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 3d0cd0960bd2..a26f2bf1b6ea 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1739,11 +1739,12 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
>  	if (pch_iir & SDE_POISON)
>  		drm_err(&dev_priv->drm, "PCH poison interrupt\n");
>  
> -	if (pch_iir & SDE_FDI_MASK)
> +	if (pch_iir & SDE_FDI_MASK) {
>  		for_each_pipe(dev_priv, pipe)
>  			drm_dbg(&dev_priv->drm, "  pipe %c FDI IIR: 0x%08x\n",
>  				pipe_name(pipe),
>  				I915_READ(FDI_RX_IIR(pipe)));
> +	}
>  
>  	if (pch_iir & (SDE_TRANSB_CRC_DONE | SDE_TRANSA_CRC_DONE))
>  		drm_dbg(&dev_priv->drm, "PCH transcoder CRC done interrupt\n");
> @@ -1823,11 +1824,12 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
>  	if (pch_iir & SDE_AUDIO_CP_CHG_CPT)
>  		drm_dbg(&dev_priv->drm, "Audio CP change interrupt\n");
>  
> -	if (pch_iir & SDE_FDI_MASK_CPT)
> +	if (pch_iir & SDE_FDI_MASK_CPT) {
>  		for_each_pipe(dev_priv, pipe)
>  			drm_dbg(&dev_priv->drm, "  pipe %c FDI IIR: 0x%08x\n",
>  				pipe_name(pipe),
>  				I915_READ(FDI_RX_IIR(pipe)));
> +	}
>  
>  	if (pch_iir & SDE_ERROR_CPT)
>  		cpt_serr_int_handler(dev_priv);
> -- 
> 2.24.0

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH v2 1/7] drm/i915: Iterate over pipe and skip the disabled one

[Anshuman Gupta]

On 2020-02-12 at 15:50:12 +0200, Ville Syrjälä wrote:
> On Tue, Feb 11, 2020 at 10:55:26PM +0530, Anshuman Gupta wrote:
> > It should not be assumed that a disabled display pipe will be
> > always last the pipe.
> > for_each_pipe() should iterate over I915_MAX_PIPES and check
> > for the disabled pipe and skip that pipe so that it should not
> > initialize the intel crtc for any disabled pipes.
> > 
> > Below compilation error require to be handle due to change in
> > for_each_pipe() macro.
> > "suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else]"
> > 
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.h | 5 +++--
> >  drivers/gpu/drm/i915/i915_irq.c              | 6 ++++--
> >  2 files changed, 7 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> > index 75438a136d58..7a531e485b53 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > @@ -313,10 +313,11 @@ enum phy_fia {
> >  };
> >  
> >  #define for_each_pipe(__dev_priv, __p) \
> > -	for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++)
> > +	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
> > +		for_each_if((INTEL_INFO(__dev_priv)->pipe_mask) & BIT(__p))
> >  
> >  #define for_each_pipe_masked(__dev_priv, __p, __mask) \
> > -	for ((__p) = 0; (__p) < INTEL_NUM_PIPES(__dev_priv); (__p)++) \
> > +	for_each_pipe(__dev_priv, __p) \
> >  		for_each_if((__mask) & BIT(__p))
> 
> You didn't address my comments for this stuff! Please don't leave
> review comments unaddressed, it's just wasting everyone's time.
Unfortunately this email and the other email with actual review comment
delivered to my spam folder, i observe the pattern with my mailbox if
there were two email thread with similar msgid, it is considering them
as spam. I don't have any idea why i am getting dulplicated email
thread with same msgid, i will raise ticket to intel IT for this.
My apology for unaddressed review comment, i will send a patch for
this.
Thanks,
Anshuman Gupta.
> 
> >  
> >  #define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> > index 3d0cd0960bd2..a26f2bf1b6ea 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -1739,11 +1739,12 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
> >  	if (pch_iir & SDE_POISON)
> >  		drm_err(&dev_priv->drm, "PCH poison interrupt\n");
> >  
> > -	if (pch_iir & SDE_FDI_MASK)
> > +	if (pch_iir & SDE_FDI_MASK) {
> >  		for_each_pipe(dev_priv, pipe)
> >  			drm_dbg(&dev_priv->drm, "  pipe %c FDI IIR: 0x%08x\n",
> >  				pipe_name(pipe),
> >  				I915_READ(FDI_RX_IIR(pipe)));
> > +	}
> >  
> >  	if (pch_iir & (SDE_TRANSB_CRC_DONE | SDE_TRANSA_CRC_DONE))
> >  		drm_dbg(&dev_priv->drm, "PCH transcoder CRC done interrupt\n");
> > @@ -1823,11 +1824,12 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
> >  	if (pch_iir & SDE_AUDIO_CP_CHG_CPT)
> >  		drm_dbg(&dev_priv->drm, "Audio CP change interrupt\n");
> >  
> > -	if (pch_iir & SDE_FDI_MASK_CPT)
> > +	if (pch_iir & SDE_FDI_MASK_CPT) {
> >  		for_each_pipe(dev_priv, pipe)
> >  			drm_dbg(&dev_priv->drm, "  pipe %c FDI IIR: 0x%08x\n",
> >  				pipe_name(pipe),
> >  				I915_READ(FDI_RX_IIR(pipe)));
> > +	}
> >  
> >  	if (pch_iir & SDE_ERROR_CPT)
> >  		cpt_serr_int_handler(dev_priv);
> > -- 
> > 2.24.0
> 
> -- 
> Ville Syrjälä
> Intel
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[Intel-gfx] [PATCH v2 2/7] drm/i915: Remove (pipe == crtc->index) assumption

[Anshuman Gupta]

we can't have (pipe == crtc->index) assumption in
driver in order to support 3 non-contiguous
display pipe system.

FIXME: Remove the WARN_ON(drm_crtc_index(&crtc->base) != crtc->pipe)
when we will fix all such assumption.

changes since RFC:
- Added again removed (pipe == crtc->index) WARN_ON.
- Pass drm_crtc_index instead of intel pipe in order to
  call drm_handle_vblank().

v2:
- used drm_crtc_handle_vblank()/drm_crtc_wait_one_vblank()
  instead of drm_handle_vblank/drm_wait_one_vblank(). [Jani]
- introduced intel_handle_vblank() helper to avoid sprinkle
  of intel_crtc across irq_handlers. [Ville]

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c       |  8 ++++----
 drivers/gpu/drm/i915/display/intel_display_types.h | 14 +++++++++++++-
 drivers/gpu/drm/i915/i915_irq.c                    | 14 +++++++-------
 3 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 80eebdc4c670..5333f7a7db42 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14395,11 +14395,11 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv,
 	if (new_crtc_state->hw.active)
 		I915_STATE_WARN(!(pll->active_mask & crtc_mask),
 				"pll active mismatch (expected pipe %c in active mask 0x%02x)\n",
-				pipe_name(drm_crtc_index(&crtc->base)), pll->active_mask);
+				pipe_name(crtc->pipe), pll->active_mask);
 	else
 		I915_STATE_WARN(pll->active_mask & crtc_mask,
 				"pll active mismatch (didn't expect pipe %c in active mask 0x%02x)\n",
-				pipe_name(drm_crtc_index(&crtc->base)), pll->active_mask);
+				pipe_name(crtc->pipe), pll->active_mask);
 
 	I915_STATE_WARN(!(pll->state.crtc_mask & crtc_mask),
 			"pll enabled crtcs mismatch (expected 0x%x in 0x%02x)\n",
@@ -14428,10 +14428,10 @@ verify_shared_dpll_state(struct intel_crtc *crtc,
 
 		I915_STATE_WARN(pll->active_mask & crtc_mask,
 				"pll active mismatch (didn't expect pipe %c in active mask)\n",
-				pipe_name(drm_crtc_index(&crtc->base)));
+				pipe_name(crtc->pipe));
 		I915_STATE_WARN(pll->state.crtc_mask & crtc_mask,
 				"pll enabled crtcs mismatch (found %x in enabled mask)\n",
-				pipe_name(drm_crtc_index(&crtc->base)));
+				pipe_name(crtc->pipe));
 	}
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 283c622f8ba1..14e3d78fef7c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1595,11 +1595,23 @@ intel_crtc_has_dp_encoder(const struct intel_crtc_state *crtc_state)
 		 (1 << INTEL_OUTPUT_DP_MST) |
 		 (1 << INTEL_OUTPUT_EDP));
 }
+
 static inline void
 intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
-	drm_wait_one_vblank(&dev_priv->drm, pipe);
+	struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+
+	drm_crtc_wait_one_vblank(&crtc->base);
+}
+
+static inline void
+intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
+{
+	struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+
+	drm_crtc_handle_vblank(&crtc->base);
 }
+
 static inline void
 intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a26f2bf1b6ea..bfd3b34f2be3 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1364,7 +1364,7 @@ static void i8xx_pipestat_irq_handler(struct drm_i915_private *dev_priv,
 
 	for_each_pipe(dev_priv, pipe) {
 		if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)
-			drm_handle_vblank(&dev_priv->drm, pipe);
+			intel_handle_vblank(dev_priv, pipe);
 
 		if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
 			i9xx_pipe_crc_irq_handler(dev_priv, pipe);
@@ -1382,7 +1382,7 @@ static void i915_pipestat_irq_handler(struct drm_i915_private *dev_priv,
 
 	for_each_pipe(dev_priv, pipe) {
 		if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)
-			drm_handle_vblank(&dev_priv->drm, pipe);
+			intel_handle_vblank(dev_priv, pipe);
 
 		if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
 			blc_event = true;
@@ -1406,7 +1406,7 @@ static void i965_pipestat_irq_handler(struct drm_i915_private *dev_priv,
 
 	for_each_pipe(dev_priv, pipe) {
 		if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
-			drm_handle_vblank(&dev_priv->drm, pipe);
+			intel_handle_vblank(dev_priv, pipe);
 
 		if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
 			blc_event = true;
@@ -1432,7 +1432,7 @@ static void valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv,
 
 	for_each_pipe(dev_priv, pipe) {
 		if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
-			drm_handle_vblank(&dev_priv->drm, pipe);
+			intel_handle_vblank(dev_priv, pipe);
 
 		if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
 			i9xx_pipe_crc_irq_handler(dev_priv, pipe);
@@ -1970,7 +1970,7 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv,
 
 	for_each_pipe(dev_priv, pipe) {
 		if (de_iir & DE_PIPE_VBLANK(pipe))
-			drm_handle_vblank(&dev_priv->drm, pipe);
+			intel_handle_vblank(dev_priv, pipe);
 
 		if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
 			intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
@@ -2023,7 +2023,7 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv,
 
 	for_each_pipe(dev_priv, pipe) {
 		if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)))
-			drm_handle_vblank(&dev_priv->drm, pipe);
+			intel_handle_vblank(dev_priv, pipe);
 	}
 
 	/* check event from PCH */
@@ -2336,7 +2336,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
 		I915_WRITE(GEN8_DE_PIPE_IIR(pipe), iir);
 
 		if (iir & GEN8_PIPE_VBLANK)
-			drm_handle_vblank(&dev_priv->drm, pipe);
+			intel_handle_vblank(dev_priv, pipe);
 
 		if (iir & GEN8_PIPE_CDCLK_CRC_DONE)
 			hsw_pipe_crc_irq_handler(dev_priv, pipe);
-- 
2.24.0

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Re: [Intel-gfx] [PATCH v2 2/7] drm/i915: Remove (pipe == crtc->index) assumption

[Ville Syrjälä]

On Tue, Feb 11, 2020 at 10:55:27PM +0530, Anshuman Gupta wrote:
> we can't have (pipe == crtc->index) assumption in
> driver in order to support 3 non-contiguous
> display pipe system.
> 
> FIXME: Remove the WARN_ON(drm_crtc_index(&crtc->base) != crtc->pipe)
> when we will fix all such assumption.
> 
> changes since RFC:
> - Added again removed (pipe == crtc->index) WARN_ON.
> - Pass drm_crtc_index instead of intel pipe in order to
>   call drm_handle_vblank().
> 
> v2:
> - used drm_crtc_handle_vblank()/drm_crtc_wait_one_vblank()
>   instead of drm_handle_vblank/drm_wait_one_vblank(). [Jani]
> - introduced intel_handle_vblank() helper to avoid sprinkle
>   of intel_crtc across irq_handlers. [Ville]
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c       |  8 ++++----
>  drivers/gpu/drm/i915/display/intel_display_types.h | 14 +++++++++++++-
>  drivers/gpu/drm/i915/i915_irq.c                    | 14 +++++++-------
>  3 files changed, 24 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 80eebdc4c670..5333f7a7db42 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14395,11 +14395,11 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv,
>  	if (new_crtc_state->hw.active)
>  		I915_STATE_WARN(!(pll->active_mask & crtc_mask),
>  				"pll active mismatch (expected pipe %c in active mask 0x%02x)\n",
> -				pipe_name(drm_crtc_index(&crtc->base)), pll->active_mask);
> +				pipe_name(crtc->pipe), pll->active_mask);
>  	else
>  		I915_STATE_WARN(pll->active_mask & crtc_mask,
>  				"pll active mismatch (didn't expect pipe %c in active mask 0x%02x)\n",
> -				pipe_name(drm_crtc_index(&crtc->base)), pll->active_mask);
> +				pipe_name(crtc->pipe), pll->active_mask);
>  
>  	I915_STATE_WARN(!(pll->state.crtc_mask & crtc_mask),
>  			"pll enabled crtcs mismatch (expected 0x%x in 0x%02x)\n",
> @@ -14428,10 +14428,10 @@ verify_shared_dpll_state(struct intel_crtc *crtc,
>  
>  		I915_STATE_WARN(pll->active_mask & crtc_mask,
>  				"pll active mismatch (didn't expect pipe %c in active mask)\n",
> -				pipe_name(drm_crtc_index(&crtc->base)));
> +				pipe_name(crtc->pipe));
>  		I915_STATE_WARN(pll->state.crtc_mask & crtc_mask,
>  				"pll enabled crtcs mismatch (found %x in enabled mask)\n",
> -				pipe_name(drm_crtc_index(&crtc->base)));
> +				pipe_name(crtc->pipe));
>  	}
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 283c622f8ba1..14e3d78fef7c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1595,11 +1595,23 @@ intel_crtc_has_dp_encoder(const struct intel_crtc_state *crtc_state)
>  		 (1 << INTEL_OUTPUT_DP_MST) |
>  		 (1 << INTEL_OUTPUT_EDP));
>  }
> +
>  static inline void
>  intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
>  {
> -	drm_wait_one_vblank(&dev_priv->drm, pipe);
> +	struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
> +
> +	drm_crtc_wait_one_vblank(&crtc->base);
> +}
> +
> +static inline void
> +intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
> +{
> +	struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
> +
> +	drm_crtc_handle_vblank(&crtc->base);
>  }

There's no reason to put that into a header. Just put it into
i915_irq.c. With that

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +
>  static inline void
>  intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe pipe)
>  {
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index a26f2bf1b6ea..bfd3b34f2be3 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1364,7 +1364,7 @@ static void i8xx_pipestat_irq_handler(struct drm_i915_private *dev_priv,
>  
>  	for_each_pipe(dev_priv, pipe) {
>  		if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)
> -			drm_handle_vblank(&dev_priv->drm, pipe);
> +			intel_handle_vblank(dev_priv, pipe);
>  
>  		if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
>  			i9xx_pipe_crc_irq_handler(dev_priv, pipe);
> @@ -1382,7 +1382,7 @@ static void i915_pipestat_irq_handler(struct drm_i915_private *dev_priv,
>  
>  	for_each_pipe(dev_priv, pipe) {
>  		if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)
> -			drm_handle_vblank(&dev_priv->drm, pipe);
> +			intel_handle_vblank(dev_priv, pipe);
>  
>  		if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
>  			blc_event = true;
> @@ -1406,7 +1406,7 @@ static void i965_pipestat_irq_handler(struct drm_i915_private *dev_priv,
>  
>  	for_each_pipe(dev_priv, pipe) {
>  		if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
> -			drm_handle_vblank(&dev_priv->drm, pipe);
> +			intel_handle_vblank(dev_priv, pipe);
>  
>  		if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
>  			blc_event = true;
> @@ -1432,7 +1432,7 @@ static void valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv,
>  
>  	for_each_pipe(dev_priv, pipe) {
>  		if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
> -			drm_handle_vblank(&dev_priv->drm, pipe);
> +			intel_handle_vblank(dev_priv, pipe);
>  
>  		if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
>  			i9xx_pipe_crc_irq_handler(dev_priv, pipe);
> @@ -1970,7 +1970,7 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv,
>  
>  	for_each_pipe(dev_priv, pipe) {
>  		if (de_iir & DE_PIPE_VBLANK(pipe))
> -			drm_handle_vblank(&dev_priv->drm, pipe);
> +			intel_handle_vblank(dev_priv, pipe);
>  
>  		if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
>  			intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
> @@ -2023,7 +2023,7 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv,
>  
>  	for_each_pipe(dev_priv, pipe) {
>  		if (de_iir & (DE_PIPE_VBLANK_IVB(pipe)))
> -			drm_handle_vblank(&dev_priv->drm, pipe);
> +			intel_handle_vblank(dev_priv, pipe);
>  	}
>  
>  	/* check event from PCH */
> @@ -2336,7 +2336,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
>  		I915_WRITE(GEN8_DE_PIPE_IIR(pipe), iir);
>  
>  		if (iir & GEN8_PIPE_VBLANK)
> -			drm_handle_vblank(&dev_priv->drm, pipe);
> +			intel_handle_vblank(dev_priv, pipe);
>  
>  		if (iir & GEN8_PIPE_CDCLK_CRC_DONE)
>  			hsw_pipe_crc_irq_handler(dev_priv, pipe);
> -- 
> 2.24.0

-- 
Ville Syrjälä
Intel
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[Intel-gfx] [PATCH v2 3/7] drm/i915: Fix broken transcoder err state

[Anshuman Gupta]

Skip the transcoder whose pipe is disabled while
initializing transcoder error state in 3 non-contiguous
display pipe system.

v2:
- Don't skip EDP_TRANSCODER error state. [Ville]
- Use a helper has_transcoder(). [Ville]

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c       |  2 +-
 drivers/gpu/drm/i915/display/intel_display_types.h | 14 ++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h                    |  2 ++
 3 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5333f7a7db42..a3649020ea97 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -19051,7 +19051,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
 	for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
 		enum transcoder cpu_transcoder = transcoders[i];
 
-		if (!INTEL_INFO(dev_priv)->trans_offsets[cpu_transcoder])
+		if (!has_transcoder(dev_priv, cpu_transcoder))
 			continue;
 
 		error->transcoder[i].available = true;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 14e3d78fef7c..d359f1636ba8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1626,4 +1626,18 @@ static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state)
 	return i915_ggtt_offset(state->vma);
 }
 
+static inline bool
+has_transcoder(struct drm_i915_private *dev_priv, enum transcoder transcoder) {
+	switch (transcoder) {
+	case TRANSCODER_EDP:
+		return HAS_TRANSCODER_EDP(dev_priv);
+	case TRANSCODER_DSI_0:
+		return HAS_TRANSCODER_DSI0(dev_priv);
+	case TRANSCODER_DSI_1:
+		return HAS_TRANSCODER_DSI1(dev_priv);
+	default:
+		return INTEL_INFO(dev_priv)->pipe_mask & BIT(transcoder);
+	}
+}
+
 #endif /*  __INTEL_DISPLAY_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index da509d9b8895..17bbaf7f0844 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1674,6 +1674,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->has_fpga_dbg)
 #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
 #define HAS_TRANSCODER_EDP(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_EDP] != 0)
+#define HAS_TRANSCODER_DSI0(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_0] != 0)
+#define HAS_TRANSCODER_DSI1(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_1] != 0)
 
 #define HAS_RC6(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6)
 #define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6p)
-- 
2.24.0

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Re: [Intel-gfx] [PATCH v2 3/7] drm/i915: Fix broken transcoder err state

[Ville Syrjälä]

On Tue, Feb 11, 2020 at 10:55:28PM +0530, Anshuman Gupta wrote:
> Skip the transcoder whose pipe is disabled while
> initializing transcoder error state in 3 non-contiguous
> display pipe system.
> 
> v2:
> - Don't skip EDP_TRANSCODER error state. [Ville]
> - Use a helper has_transcoder(). [Ville]
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c       |  2 +-
>  drivers/gpu/drm/i915/display/intel_display_types.h | 14 ++++++++++++++
>  drivers/gpu/drm/i915/i915_drv.h                    |  2 ++
>  3 files changed, 17 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 5333f7a7db42..a3649020ea97 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -19051,7 +19051,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
>  	for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
>  		enum transcoder cpu_transcoder = transcoders[i];
>  
> -		if (!INTEL_INFO(dev_priv)->trans_offsets[cpu_transcoder])
> +		if (!has_transcoder(dev_priv, cpu_transcoder))
>  			continue;
>  
>  		error->transcoder[i].available = true;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 14e3d78fef7c..d359f1636ba8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1626,4 +1626,18 @@ static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state)
>  	return i915_ggtt_offset(state->vma);
>  }
>  
> +static inline bool
> +has_transcoder(struct drm_i915_private *dev_priv, enum transcoder transcoder) {

{ is in the wrong place.

> +	switch (transcoder) {
> +	case TRANSCODER_EDP:
> +		return HAS_TRANSCODER_EDP(dev_priv);
> +	case TRANSCODER_DSI_0:
> +		return HAS_TRANSCODER_DSI0(dev_priv);
> +	case TRANSCODER_DSI_1:
> +		return HAS_TRANSCODER_DSI1(dev_priv);

The error capture so far doesn't care about DSI, so I wouldn't bother
with these for now.

> +	default:
> +		return INTEL_INFO(dev_priv)->pipe_mask & BIT(transcoder);
> +	}
> +}

This functions has one user so no point in putting it into a header.

> +
>  #endif /*  __INTEL_DISPLAY_TYPES_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index da509d9b8895..17bbaf7f0844 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1674,6 +1674,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->has_fpga_dbg)
>  #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
>  #define HAS_TRANSCODER_EDP(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_EDP] != 0)
> +#define HAS_TRANSCODER_DSI0(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_0] != 0)
> +#define HAS_TRANSCODER_DSI1(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_1] != 0)
>  
>  #define HAS_RC6(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6)
>  #define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6p)
> -- 
> 2.24.0

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH v2 3/7] drm/i915: Fix broken transcoder err state

[Ville Syrjälä]

On Thu, Feb 20, 2020 at 07:16:32PM +0200, Ville Syrjälä wrote:
> On Tue, Feb 11, 2020 at 10:55:28PM +0530, Anshuman Gupta wrote:
> > Skip the transcoder whose pipe is disabled while
> > initializing transcoder error state in 3 non-contiguous
> > display pipe system.
> > 
> > v2:
> > - Don't skip EDP_TRANSCODER error state. [Ville]
> > - Use a helper has_transcoder(). [Ville]
> > 
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c       |  2 +-
> >  drivers/gpu/drm/i915/display/intel_display_types.h | 14 ++++++++++++++
> >  drivers/gpu/drm/i915/i915_drv.h                    |  2 ++
> >  3 files changed, 17 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 5333f7a7db42..a3649020ea97 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -19051,7 +19051,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
> >  	for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
> >  		enum transcoder cpu_transcoder = transcoders[i];
> >  
> > -		if (!INTEL_INFO(dev_priv)->trans_offsets[cpu_transcoder])
> > +		if (!has_transcoder(dev_priv, cpu_transcoder))
> >  			continue;
> >  
> >  		error->transcoder[i].available = true;
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 14e3d78fef7c..d359f1636ba8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1626,4 +1626,18 @@ static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state)
> >  	return i915_ggtt_offset(state->vma);
> >  }
> >  
> > +static inline bool
> > +has_transcoder(struct drm_i915_private *dev_priv, enum transcoder transcoder) {
> 
> { is in the wrong place.

Oh and 'cpu_transcoder' is the variable name used everwhere else. Pls
stick to established patterns if possible.

> 
> > +	switch (transcoder) {
> > +	case TRANSCODER_EDP:
> > +		return HAS_TRANSCODER_EDP(dev_priv);
> > +	case TRANSCODER_DSI_0:
> > +		return HAS_TRANSCODER_DSI0(dev_priv);
> > +	case TRANSCODER_DSI_1:
> > +		return HAS_TRANSCODER_DSI1(dev_priv);
> 
> The error capture so far doesn't care about DSI, so I wouldn't bother
> with these for now.
> 
> > +	default:
> > +		return INTEL_INFO(dev_priv)->pipe_mask & BIT(transcoder);
> > +	}
> > +}
> 
> This functions has one user so no point in putting it into a header.
> 
> > +
> >  #endif /*  __INTEL_DISPLAY_TYPES_H__ */
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index da509d9b8895..17bbaf7f0844 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1674,6 +1674,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> >  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->has_fpga_dbg)
> >  #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
> >  #define HAS_TRANSCODER_EDP(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_EDP] != 0)
> > +#define HAS_TRANSCODER_DSI0(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_0] != 0)
> > +#define HAS_TRANSCODER_DSI1(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_1] != 0)
> >  
> >  #define HAS_RC6(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6)
> >  #define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6p)
> > -- 
> > 2.24.0
> 
> -- 
> Ville Syrjälä
> Intel
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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[Intel-gfx] [PATCH v2 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask

[Anshuman Gupta]

As a disabled pipe in pipe_mask is not having a valid intel crtc,
driver wrongly populates the possible_crtcs mask while initializing
the plane for a CRTC. Fixing up the plane possible_crtcs mask.

changes since RFC:
- Simplify the possible_crtcs initialization. [Ville]

v2:
- Removed the unnecessary stack garbage possible_crtcs to
  drm_universal_plane_init. [Ville]

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++
 drivers/gpu/drm/i915/display/intel_sprite.c  |  5 +----
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a3649020ea97..5ba0b40fbfde 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16768,6 +16768,18 @@ static void intel_crtc_free(struct intel_crtc *crtc)
 	kfree(crtc);
 }
 
+static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
+{
+	struct intel_plane *plane;
+
+	for_each_intel_plane(&dev_priv->drm, plane) {
+		struct intel_crtc *crtc;
+
+		crtc = intel_get_crtc_for_pipe(dev_priv, plane->pipe);
+		plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
+	}
+}
+
 static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
 	struct intel_plane *primary, *cursor;
@@ -17964,6 +17976,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
 		}
 	}
 
+	intel_plane_possible_crtcs_init(i915);
 	intel_shared_dpll_init(dev);
 	intel_update_fdi_pll_freq(i915);
 
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 7abeefe8dce5..b5c7b271a1a4 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -3011,7 +3011,6 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
 	struct intel_plane *plane;
 	enum drm_plane_type plane_type;
 	unsigned int supported_rotations;
-	unsigned int possible_crtcs;
 	const u64 *modifiers;
 	const u32 *formats;
 	int num_formats;
@@ -3066,10 +3065,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
 	else
 		plane_type = DRM_PLANE_TYPE_OVERLAY;
 
-	possible_crtcs = BIT(pipe);
-
 	ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
-				       possible_crtcs, plane_funcs,
+				       0, plane_funcs,
 				       formats, num_formats, modifiers,
 				       plane_type,
 				       "plane %d%c", plane_id + 1,
-- 
2.24.0

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Re: [Intel-gfx] [PATCH v2 4/7] drm/i915: Fix wrongly populated plane possible_crtcs bit mask

[Ville Syrjälä]

On Tue, Feb 11, 2020 at 10:55:29PM +0530, Anshuman Gupta wrote:
> As a disabled pipe in pipe_mask is not having a valid intel crtc,
> driver wrongly populates the possible_crtcs mask while initializing
> the plane for a CRTC. Fixing up the plane possible_crtcs mask.
> 
> changes since RFC:
> - Simplify the possible_crtcs initialization. [Ville]
> 
> v2:
> - Removed the unnecessary stack garbage possible_crtcs to
>   drm_universal_plane_init. [Ville]
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 13 +++++++++++++
>  drivers/gpu/drm/i915/display/intel_sprite.c  |  5 +----
>  2 files changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index a3649020ea97..5ba0b40fbfde 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16768,6 +16768,18 @@ static void intel_crtc_free(struct intel_crtc *crtc)
>  	kfree(crtc);
>  }
>  
> +static void intel_plane_possible_crtcs_init(struct drm_i915_private *dev_priv)
> +{
> +	struct intel_plane *plane;
> +
> +	for_each_intel_plane(&dev_priv->drm, plane) {
> +		struct intel_crtc *crtc;
> +
> +		crtc = intel_get_crtc_for_pipe(dev_priv, plane->pipe);
> +		plane->base.possible_crtcs = drm_crtc_mask(&crtc->base);
> +	}
> +}
> +
>  static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
>  {
>  	struct intel_plane *primary, *cursor;
> @@ -17964,6 +17976,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
>  		}
>  	}
>  
> +	intel_plane_possible_crtcs_init(i915);
>  	intel_shared_dpll_init(dev);
>  	intel_update_fdi_pll_freq(i915);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 7abeefe8dce5..b5c7b271a1a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -3011,7 +3011,6 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
>  	struct intel_plane *plane;
>  	enum drm_plane_type plane_type;
>  	unsigned int supported_rotations;
> -	unsigned int possible_crtcs;
>  	const u64 *modifiers;
>  	const u32 *formats;
>  	int num_formats;
> @@ -3066,10 +3065,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
>  	else
>  		plane_type = DRM_PLANE_TYPE_OVERLAY;
>  
> -	possible_crtcs = BIT(pipe);
> -
>  	ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
> -				       possible_crtcs, plane_funcs,
> +				       0, plane_funcs,
>  				       formats, num_formats, modifiers,
>  				       plane_type,
>  				       "plane %d%c", plane_id + 1,
> -- 
> 2.24.0

-- 
Ville Syrjälä
Intel
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[Intel-gfx] [PATCH v2 5/7] drm/i915: Get first crtc instead of PIPE_A crtc

[Anshuman Gupta]

intel_plane_fb_max_stride should return the max stride of
primary plane for first available pipe in intel device info
pipe_mask.
Similarly glk_force_audio_cdclk() should also use the first
available CRTC instead of pipe 'A' crtc to force the cdclk
changes.

changes since RFC:
- Introduced a helper to get first intel_crtc intel_get_first_crtc. [Ville]
v1:
- Used intel_get_first_crtc() instead of PIPE_A crtc in
  glk_force_audio_cdclk(). [Ville]

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_audio.c         | 2 +-
 drivers/gpu/drm/i915/display/intel_display.c       | 5 +++--
 drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++++
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index 30fb7c887ff0..19bf206037c2 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -844,7 +844,7 @@ static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv,
 	struct intel_crtc *crtc;
 	int ret;
 
-	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
+	crtc = intel_get_first_crtc(dev_priv);
 	if (!crtc)
 		return;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5ba0b40fbfde..6fdaeb019fef 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2715,9 +2715,10 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
 
 	/*
 	 * We assume the primary plane for pipe A has
-	 * the highest stride limits of them all.
+	 * the highest stride limits of them all,
+	 * if in case pipe A is disabled, use the first pipe from pipe_mask.
 	 */
-	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
+	crtc = intel_get_first_crtc(dev_priv);
 	if (!crtc)
 		return 0;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index d359f1636ba8..359eaa6703a8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1403,6 +1403,12 @@ vlv_pipe_to_channel(enum pipe pipe)
 	}
 }
 
+static inline struct intel_crtc *
+intel_get_first_crtc(struct drm_i915_private *dev_priv)
+{
+	return to_intel_crtc(drm_crtc_from_index(&dev_priv->drm, 0));
+}
+
 static inline struct intel_crtc *
 intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
-- 
2.24.0

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Re: [Intel-gfx] [PATCH v2 5/7] drm/i915: Get first crtc instead of PIPE_A crtc

[Anshuman Gupta]

On 2020-02-11 at 22:55:30 +0530, Anshuman Gupta wrote:
> intel_plane_fb_max_stride should return the max stride of
> primary plane for first available pipe in intel device info
> pipe_mask.
> Similarly glk_force_audio_cdclk() should also use the first
> available CRTC instead of pipe 'A' crtc to force the cdclk
> changes.
> 
> changes since RFC:
> - Introduced a helper to get first intel_crtc intel_get_first_crtc. [Ville]
> v1:
> - Used intel_get_first_crtc() instead of PIPE_A crtc in
>   glk_force_audio_cdclk(). [Ville]
Hi Ville,
You had provided your RB on earlier revision
https://patchwork.freedesktop.org/patch/351873/?series=72468&rev=2
later u have provided the above review comment, as current
patch fixes the above review comment.
can i use your RB for this patch, if current patch is ok.
Thanks,
Anshuman Gupta. 
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_audio.c         | 2 +-
>  drivers/gpu/drm/i915/display/intel_display.c       | 5 +++--
>  drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++++
>  3 files changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index 30fb7c887ff0..19bf206037c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -844,7 +844,7 @@ static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv,
>  	struct intel_crtc *crtc;
>  	int ret;
>  
> -	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
> +	crtc = intel_get_first_crtc(dev_priv);
>  	if (!crtc)
>  		return;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 5ba0b40fbfde..6fdaeb019fef 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2715,9 +2715,10 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
>  
>  	/*
>  	 * We assume the primary plane for pipe A has
> -	 * the highest stride limits of them all.
> +	 * the highest stride limits of them all,
> +	 * if in case pipe A is disabled, use the first pipe from pipe_mask.
>  	 */
> -	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
> +	crtc = intel_get_first_crtc(dev_priv);
>  	if (!crtc)
>  		return 0;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index d359f1636ba8..359eaa6703a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1403,6 +1403,12 @@ vlv_pipe_to_channel(enum pipe pipe)
>  	}
>  }
>  
> +static inline struct intel_crtc *
> +intel_get_first_crtc(struct drm_i915_private *dev_priv)
> +{
> +	return to_intel_crtc(drm_crtc_from_index(&dev_priv->drm, 0));
> +}
> +
>  static inline struct intel_crtc *
>  intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
>  {
> -- 
> 2.24.0
> 
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Re: [Intel-gfx] [PATCH v2 5/7] drm/i915: Get first crtc instead of PIPE_A crtc

[Ville Syrjälä]

On Mon, Feb 17, 2020 at 10:52:28AM +0530, Anshuman Gupta wrote:
> On 2020-02-11 at 22:55:30 +0530, Anshuman Gupta wrote:
> > intel_plane_fb_max_stride should return the max stride of
> > primary plane for first available pipe in intel device info
> > pipe_mask.
> > Similarly glk_force_audio_cdclk() should also use the first
> > available CRTC instead of pipe 'A' crtc to force the cdclk
> > changes.
> > 
> > changes since RFC:
> > - Introduced a helper to get first intel_crtc intel_get_first_crtc. [Ville]
> > v1:
> > - Used intel_get_first_crtc() instead of PIPE_A crtc in
> >   glk_force_audio_cdclk(). [Ville]
> Hi Ville,
> You had provided your RB on earlier revision
> https://patchwork.freedesktop.org/patch/351873/?series=72468&rev=2
> later u have provided the above review comment, as current
> patch fixes the above review comment.
> can i use your RB for this patch, if current patch is ok.

Yes, this patch looks ok.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> Thanks,
> Anshuman Gupta. 
> > 
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_audio.c         | 2 +-
> >  drivers/gpu/drm/i915/display/intel_display.c       | 5 +++--
> >  drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++++
> >  3 files changed, 10 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> > index 30fb7c887ff0..19bf206037c2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_audio.c
> > +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> > @@ -844,7 +844,7 @@ static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv,
> >  	struct intel_crtc *crtc;
> >  	int ret;
> >  
> > -	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
> > +	crtc = intel_get_first_crtc(dev_priv);
> >  	if (!crtc)
> >  		return;
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 5ba0b40fbfde..6fdaeb019fef 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -2715,9 +2715,10 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
> >  
> >  	/*
> >  	 * We assume the primary plane for pipe A has
> > -	 * the highest stride limits of them all.
> > +	 * the highest stride limits of them all,
> > +	 * if in case pipe A is disabled, use the first pipe from pipe_mask.
> >  	 */
> > -	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
> > +	crtc = intel_get_first_crtc(dev_priv);
> >  	if (!crtc)
> >  		return 0;
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index d359f1636ba8..359eaa6703a8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1403,6 +1403,12 @@ vlv_pipe_to_channel(enum pipe pipe)
> >  	}
> >  }
> >  
> > +static inline struct intel_crtc *
> > +intel_get_first_crtc(struct drm_i915_private *dev_priv)
> > +{
> > +	return to_intel_crtc(drm_crtc_from_index(&dev_priv->drm, 0));
> > +}
> > +
> >  static inline struct intel_crtc *
> >  intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
> >  {
> > -- 
> > 2.24.0
> > 

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH v2 5/7] drm/i915: Get first crtc instead of PIPE_A crtc

[Anshuman Gupta]

On 2020-02-17 at 16:17:22 +0200, Ville Syrjälä wrote:
> On Mon, Feb 17, 2020 at 10:52:28AM +0530, Anshuman Gupta wrote:
> > On 2020-02-11 at 22:55:30 +0530, Anshuman Gupta wrote:
> > > intel_plane_fb_max_stride should return the max stride of
> > > primary plane for first available pipe in intel device info
> > > pipe_mask.
> > > Similarly glk_force_audio_cdclk() should also use the first
> > > available CRTC instead of pipe 'A' crtc to force the cdclk
> > > changes.
> > > 
> > > changes since RFC:
> > > - Introduced a helper to get first intel_crtc intel_get_first_crtc. [Ville]
> > > v1:
> > > - Used intel_get_first_crtc() instead of PIPE_A crtc in
> > >   glk_force_audio_cdclk(). [Ville]
> > Hi Ville,
> > You had provided your RB on earlier revision
> > https://patchwork.freedesktop.org/patch/351873/?series=72468&rev=2
> > later u have provided the above review comment, as current
> > patch fixes the above review comment.
> > can i use your RB for this patch, if current patch is ok.
> 
> Yes, this patch looks ok.
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Thanks Ville for RB.
> 
> > Thanks,
> > Anshuman Gupta. 
> > > 
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_audio.c         | 2 +-
> > >  drivers/gpu/drm/i915/display/intel_display.c       | 5 +++--
> > >  drivers/gpu/drm/i915/display/intel_display_types.h | 6 ++++++
> > >  3 files changed, 10 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> > > index 30fb7c887ff0..19bf206037c2 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_audio.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> > > @@ -844,7 +844,7 @@ static void glk_force_audio_cdclk(struct drm_i915_private *dev_priv,
> > >  	struct intel_crtc *crtc;
> > >  	int ret;
> > >  
> > > -	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
> > > +	crtc = intel_get_first_crtc(dev_priv);
> > >  	if (!crtc)
> > >  		return;
> > >  
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 5ba0b40fbfde..6fdaeb019fef 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -2715,9 +2715,10 @@ u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
> > >  
> > >  	/*
> > >  	 * We assume the primary plane for pipe A has
> > > -	 * the highest stride limits of them all.
> > > +	 * the highest stride limits of them all,
> > > +	 * if in case pipe A is disabled, use the first pipe from pipe_mask.
> > >  	 */
> > > -	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
> > > +	crtc = intel_get_first_crtc(dev_priv);
> > >  	if (!crtc)
> > >  		return 0;
> > >  
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index d359f1636ba8..359eaa6703a8 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -1403,6 +1403,12 @@ vlv_pipe_to_channel(enum pipe pipe)
> > >  	}
> > >  }
> > >  
> > > +static inline struct intel_crtc *
> > > +intel_get_first_crtc(struct drm_i915_private *dev_priv)
> > > +{
> > > +	return to_intel_crtc(drm_crtc_from_index(&dev_priv->drm, 0));
> > > +}
> > > +
> > >  static inline struct intel_crtc *
> > >  intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
> > >  {
> > > -- 
> > > 2.24.0
> > > 
> 
> -- 
> Ville Syrjälä
> Intel
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[Intel-gfx] [PATCH v2 6/7] drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()

[Anshuman Gupta]

Add a WARN_ON for a disabled pipe in pipe_mask at
intel_get_crtc_for_pipe() function.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 359eaa6703a8..4c674a41ba8b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1412,6 +1412,8 @@ intel_get_first_crtc(struct drm_i915_private *dev_priv)
 static inline struct intel_crtc *
 intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
+	/* pipe_to_crtc_mapping may have hole on any of 3 display pipe system */
+	WARN_ON(!(INTEL_INFO(dev_priv)->pipe_mask & BIT(pipe)));
 	return dev_priv->pipe_to_crtc_mapping[pipe];
 }
 
-- 
2.24.0

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[Intel-gfx] [PATCH v2 7/7] drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps

[Anshuman Gupta]

skl_ddb_allocation_overlaps() num_entries hass been passed as
INTEL_NUM_PIPES, it should be I915_MAX_PIPES.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 6fdaeb019fef..dd77324206bc 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15475,7 +15475,6 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 	struct intel_crtc *crtc;
 	struct intel_crtc_state *old_crtc_state, *new_crtc_state;
 	struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
-	const u8 num_pipes = INTEL_NUM_PIPES(dev_priv);
 	u8 update_pipes = 0, modeset_pipes = 0;
 	int i;
 
@@ -15512,7 +15511,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 				continue;
 
 			if (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
-							entries, num_pipes, pipe))
+							entries, I915_MAX_PIPES, pipe))
 				continue;
 
 			entries[pipe] = new_crtc_state->wm.skl.ddb;
@@ -15550,7 +15549,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 			continue;
 
 		WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
-						    entries, num_pipes, pipe));
+						    entries, I915_MAX_PIPES, pipe));
 
 		entries[pipe] = new_crtc_state->wm.skl.ddb;
 		modeset_pipes &= ~BIT(pipe);
@@ -15585,7 +15584,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 			continue;
 
 		WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
-						    entries, num_pipes, pipe));
+						    entries, I915_MAX_PIPES, pipe));
 
 		entries[pipe] = new_crtc_state->wm.skl.ddb;
 		modeset_pipes &= ~BIT(pipe);
-- 
2.24.0

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Re: [Intel-gfx] [PATCH v2 7/7] drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps

[Ville Syrjälä]

On Tue, Feb 11, 2020 at 10:55:32PM +0530, Anshuman Gupta wrote:
> skl_ddb_allocation_overlaps() num_entries hass been passed as
> INTEL_NUM_PIPES, it should be I915_MAX_PIPES.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 6fdaeb019fef..dd77324206bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15475,7 +15475,6 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
>  	struct intel_crtc *crtc;
>  	struct intel_crtc_state *old_crtc_state, *new_crtc_state;
>  	struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
> -	const u8 num_pipes = INTEL_NUM_PIPES(dev_priv);
>  	u8 update_pipes = 0, modeset_pipes = 0;
>  	int i;
>  
> @@ -15512,7 +15511,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
>  				continue;
>  
>  			if (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
> -							entries, num_pipes, pipe))
> +							entries, I915_MAX_PIPES, pipe))
>  				continue;
>  
>  			entries[pipe] = new_crtc_state->wm.skl.ddb;
> @@ -15550,7 +15549,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
>  			continue;
>  
>  		WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
> -						    entries, num_pipes, pipe));
> +						    entries, I915_MAX_PIPES, pipe));
>  
>  		entries[pipe] = new_crtc_state->wm.skl.ddb;
>  		modeset_pipes &= ~BIT(pipe);
> @@ -15585,7 +15584,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
>  			continue;
>  
>  		WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
> -						    entries, num_pipes, pipe));
> +						    entries, I915_MAX_PIPES, pipe));
>  
>  		entries[pipe] = new_crtc_state->wm.skl.ddb;
>  		modeset_pipes &= ~BIT(pipe);
> -- 
> 2.24.0

-- 
Ville Syrjälä
Intel
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for 3 display pipes combination system support (rev3)

[Patchwork]

== Series Details ==

Series: 3 display pipes combination system support (rev3)
URL   : https://patchwork.freedesktop.org/series/72468/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
81842e985a7d drm/i915: Iterate over pipe and skip the disabled one
-:17: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#17: 
"suggest explicit braces to avoid ambiguous ‘else’ [-Werror=dangling-else]"

total: 0 errors, 1 warnings, 0 checks, 39 lines checked
f2a17ab3d0f7 drm/i915: Remove (pipe == crtc->index) assumption
cc56990284eb drm/i915: Fix broken transcoder err state
-:64: WARNING:LONG_LINE: line over 100 characters
#64: FILE: drivers/gpu/drm/i915/i915_drv.h:1677:
+#define HAS_TRANSCODER_DSI0(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_0] != 0)

-:65: WARNING:LONG_LINE: line over 100 characters
#65: FILE: drivers/gpu/drm/i915/i915_drv.h:1678:
+#define HAS_TRANSCODER_DSI1(dev_priv)	 (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_1] != 0)

total: 0 errors, 2 warnings, 0 checks, 34 lines checked
297ffaacaef1 drm/i915: Fix wrongly populated plane possible_crtcs bit mask
a0c0a365e240 drm/i915: Get first crtc instead of PIPE_A crtc
058b783edba8 drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()
0cbe9fb796ae drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps

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[Intel-gfx] ✓ Fi.CI.BAT: success for 3 display pipes combination system support (rev3)

[Patchwork]

== Series Details ==

Series: 3 display pipes combination system support (rev3)
URL   : https://patchwork.freedesktop.org/series/72468/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7924 -> Patchwork_16534
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/index.html

Known issues
------------

  Here are the changes found in Patchwork_16534 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-n2820:       [PASS][1] -> [INCOMPLETE][2] ([i915#45])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/fi-byt-n2820/igt@gem_close_race@basic-threads.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/fi-byt-n2820/igt@gem_close_race@basic-threads.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      [FAIL][3] ([i915#178]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_gtt:
    - fi-icl-u2:          [TIMEOUT][5] ([fdo#112271]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/fi-icl-u2/igt@i915_selftest@live_gtt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/fi-icl-u2/igt@i915_selftest@live_gtt.html

  
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45


Participating hosts (43 -> 42)
------------------------------

  Additional (8): fi-hsw-4770 fi-kbl-x1275 fi-cfl-8109u fi-bsw-kefka fi-skl-lmem fi-blb-e6850 fi-skl-6700k2 fi-kbl-r 
  Missing    (9): fi-bdw-5557u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 fi-byt-clapper fi-bsw-nick fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7924 -> Patchwork_16534

  CI-20190529: 20190529
  CI_DRM_7924: d4ea682de87f4e4378f34f0a196e8fa8983bd306 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5436: 00a64098aaae2ac3154841d76c7b034165380282 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16534: 0cbe9fb796ae7161887a23c9f906c0ff2224aefc @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0cbe9fb796ae drm/i915: Fix broken num_entries in skl_ddb_allocation_overlaps
058b783edba8 drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()
a0c0a365e240 drm/i915: Get first crtc instead of PIPE_A crtc
297ffaacaef1 drm/i915: Fix wrongly populated plane possible_crtcs bit mask
cc56990284eb drm/i915: Fix broken transcoder err state
f2a17ab3d0f7 drm/i915: Remove (pipe == crtc->index) assumption
81842e985a7d drm/i915: Iterate over pipe and skip the disabled one

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/index.html
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[Intel-gfx] ✓ Fi.CI.IGT: success for 3 display pipes combination system support (rev3)

[Patchwork]

== Series Details ==

Series: 3 display pipes combination system support (rev3)
URL   : https://patchwork.freedesktop.org/series/72468/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7924_full -> Patchwork_16534_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_16534_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_schedule@pi-common-bsd:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([i915#677]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb3/igt@gem_exec_schedule@pi-common-bsd.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb2/igt@gem_exec_schedule@pi-common-bsd.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#112146]) +9 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [PASS][5] -> [FAIL][6] ([i915#644])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-glk9/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
    - shard-tglb:         [PASS][7] -> [FAIL][8] ([i915#644])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-tglb2/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-tglb8/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [PASS][9] -> [DMESG-WARN][10] ([i915#180]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-apl2/igt@gem_softpin@noreloc-s3.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-apl4/igt@gem_softpin@noreloc-s3.html

  * igt@gen7_exec_parse@basic-offset:
    - shard-hsw:          [PASS][11] -> [FAIL][12] ([i915#694]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-hsw1/igt@gen7_exec_parse@basic-offset.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-hsw5/igt@gen7_exec_parse@basic-offset.html

  * igt@i915_selftest@live_gtt:
    - shard-apl:          [PASS][13] -> [TIMEOUT][14] ([fdo#112271])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-apl8/igt@i915_selftest@live_gtt.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-apl3/igt@i915_selftest@live_gtt.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-glk:          [PASS][15] -> [FAIL][16] ([i915#79])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [PASS][17] -> [FAIL][18] ([i915#79])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-skl6/igt@kms_flip@flip-vs-expired-vblank.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-kbl:          [PASS][19] -> [DMESG-WARN][20] ([i915#180]) +3 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-tglb:         [PASS][21] -> [SKIP][22] ([i915#668]) +3 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-glk:          [PASS][23] -> [FAIL][24] ([i915#899])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-glk3/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-glk3/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         [PASS][25] -> [SKIP][26] ([fdo#109441]) +2 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb8/igt@kms_psr@psr2_primary_page_flip.html

  * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
    - shard-kbl:          [PASS][27] -> [INCOMPLETE][28] ([fdo#103665])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-kbl1/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-kbl6/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html

  * igt@perf_pmu@busy-vcs1:
    - shard-iclb:         [PASS][29] -> [SKIP][30] ([fdo#112080]) +19 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb1/igt@perf_pmu@busy-vcs1.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb6/igt@perf_pmu@busy-vcs1.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [PASS][31] -> [SKIP][32] ([fdo#109276]) +22 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb5/igt@prime_vgem@fence-wait-bsd2.html

  
#### Possible fixes ####

  * {igt@gem_ctx_persistence@legacy-engines-mixed-process@blt}:
    - shard-apl:          [FAIL][33] ([i915#679]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-apl4/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-apl6/igt@gem_ctx_persistence@legacy-engines-mixed-process@blt.html

  * {igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox}:
    - shard-apl:          [INCOMPLETE][35] ([fdo#103927]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-apl4/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-apl6/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html

  * igt@gem_eio@in-flight-suspend:
    - shard-kbl:          [DMESG-WARN][37] ([i915#180]) -> [PASS][38] +3 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-kbl4/igt@gem_eio@in-flight-suspend.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-kbl3/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][39] ([fdo#110854]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb5/igt@gem_exec_balancer@smoke.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb4/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [SKIP][41] ([i915#677]) -> [PASS][42] +1 similar issue
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb1/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb6/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@pi-shared-iova-blt:
    - shard-kbl:          [INCOMPLETE][43] ([fdo#103665]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-kbl3/igt@gem_exec_schedule@pi-shared-iova-blt.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-kbl4/igt@gem_exec_schedule@pi-shared-iova-blt.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][45] ([fdo#112146]) -> [PASS][46] +5 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [SKIP][47] ([fdo#109276]) -> [PASS][48] +26 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_partial_pwrite_pread@reads-uncached:
    - shard-hsw:          [FAIL][49] ([i915#694]) -> [PASS][50] +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-hsw6/igt@gem_partial_pwrite_pread@reads-uncached.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-hsw5/igt@gem_partial_pwrite_pread@reads-uncached.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-skl:          [FAIL][51] ([i915#644]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-skl9/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-skl4/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_tiled_partial_pwrite_pread@writes-after-reads:
    - shard-hsw:          [FAIL][53] -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-hsw5/igt@gem_tiled_partial_pwrite_pread@writes-after-reads.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-hsw5/igt@gem_tiled_partial_pwrite_pread@writes-after-reads.html

  * igt@i915_pm_rps@waitboost:
    - shard-skl:          [FAIL][55] ([i915#39]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-skl3/igt@i915_pm_rps@waitboost.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-skl9/igt@i915_pm_rps@waitboost.html

  * igt@i915_suspend@forcewake:
    - shard-skl:          [INCOMPLETE][57] ([i915#69]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-skl10/igt@i915_suspend@forcewake.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-skl6/igt@i915_suspend@forcewake.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          [INCOMPLETE][59] ([i915#221]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-skl5/igt@kms_flip@flip-vs-suspend.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-skl10/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [DMESG-WARN][61] ([i915#180]) -> [PASS][62] +3 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-skl:          [FAIL][63] ([i915#34]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-skl5/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][65] ([fdo#108145]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [FAIL][67] ([fdo#108145] / [i915#265]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][69] ([fdo#109642] / [fdo#111068]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb5/igt@kms_psr2_su@frontbuffer.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [SKIP][71] ([fdo#109441]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb4/igt@kms_psr@psr2_primary_mmap_cpu.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [FAIL][73] ([i915#31]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-kbl4/igt@kms_setmode@basic.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-kbl7/igt@kms_setmode@basic.html

  * igt@perf_pmu@init-busy-vcs1:
    - shard-iclb:         [SKIP][75] ([fdo#112080]) -> [PASS][76] +13 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb3/igt@perf_pmu@init-busy-vcs1.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb2/igt@perf_pmu@init-busy-vcs1.html

  * igt@prime_mmap_coherency@ioctl-errors:
    - shard-hsw:          [FAIL][77] ([i915#831]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-hsw5/igt@prime_mmap_coherency@ioctl-errors.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-hsw5/igt@prime_mmap_coherency@ioctl-errors.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv-switch:
    - shard-iclb:         [FAIL][79] ([IGT#28]) -> [SKIP][80] ([fdo#112080])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb3/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html

  * igt@gem_tiled_blits@interruptible:
    - shard-hsw:          [FAIL][81] ([i915#818]) -> [FAIL][82] ([i915#694])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-hsw1/igt@gem_tiled_blits@interruptible.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-hsw6/igt@gem_tiled_blits@interruptible.html

  * igt@gem_tiled_blits@normal:
    - shard-hsw:          [FAIL][83] ([i915#694]) -> [FAIL][84] ([i915#818])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-hsw7/igt@gem_tiled_blits@normal.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-hsw1/igt@gem_tiled_blits@normal.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         [SKIP][85] ([i915#468]) -> [FAIL][86] ([i915#454])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-tglb2/igt@i915_pm_dc@dc6-psr.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-tglb8/igt@i915_pm_dc@dc6-psr.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [DMESG-WARN][87] ([i915#1226]) -> [SKIP][88] ([fdo#109349])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7924/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/shard-iclb8/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
  [i915#39]: https://gitlab.freedesktop.org/drm/intel/issues/39
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818
  [i915#831]: https://gitlab.freedesktop.org/drm/intel/issues/831
  [i915#899]: https://gitlab.freedesktop.org/drm/intel/issues/899


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7924 -> Patchwork_16534

  CI-20190529: 20190529
  CI_DRM_7924: d4ea682de87f4e4378f34f0a196e8fa8983bd306 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5436: 00a64098aaae2ac3154841d76c7b034165380282 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16534: 0cbe9fb796ae7161887a23c9f906c0ff2224aefc @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16534/index.html
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