Intel-GFX Archive on lore.kernel.org
 help / color / Atom feed
* [Intel-gfx] [PATCH] drm/i915: Use engine wa list for Wa_1607090982
@ 2020-02-12 16:57 Mika Kuoppala
  2020-02-13  7:01 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
  2020-02-14 17:42 ` [Intel-gfx] [PATCH] " Matt Roper
  0 siblings, 2 replies; 3+ messages in thread
From: Mika Kuoppala @ 2020-02-12 16:57 UTC (permalink / raw)
  To: intel-gfx

This is in mcr range of register, thus we can only verify
it through mmio. Use engine wa list with mcr range verification
skip.

Fixes: 0db1a5f8706a ("drm/i915: Implement Wa_1607090982")
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 62b43f538a56..ba86511f1ef9 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -598,9 +598,6 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine,
 	wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val,
 	       IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 :
 			    FF_MODE2_TDS_TIMER_MASK);
-
-	/* Wa_1606931601:tgl */
-	WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2, GEN12_DISABLE_EARLY_READ);
 }
 
 static void
@@ -1360,6 +1357,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
 		wa_write_or(wal,
 			    GEN7_FF_THREAD_MODE,
 			    GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
+
+		/* Wa_1606931601:tgl */
+		wa_masked_en(wal,
+			     GEN7_ROW_CHICKEN2,
+			     GEN12_DISABLE_EARLY_READ);
 	}
 
 	if (IS_GEN(i915, 11)) {
-- 
2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Use engine wa list for Wa_1607090982
  2020-02-12 16:57 [Intel-gfx] [PATCH] drm/i915: Use engine wa list for Wa_1607090982 Mika Kuoppala
@ 2020-02-13  7:01 ` " Patchwork
  2020-02-14 17:42 ` [Intel-gfx] [PATCH] " Matt Roper
  1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2020-02-13  7:01 UTC (permalink / raw)
  To: Mika Kuoppala; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Use engine wa list for Wa_1607090982
URL   : https://patchwork.freedesktop.org/series/73374/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7926 -> Patchwork_16549
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_16549 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16549, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16549:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-icl-u2:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/fi-icl-u2/igt@gem_exec_suspend@basic-s4-devices.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@gem_exec_fence@basic-await@bcs0}:
    - fi-cml-u2:          [SKIP][3] ([i915#1208]) -> [SKIP][4] +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-cml-u2/igt@gem_exec_fence@basic-await@bcs0.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/fi-cml-u2/igt@gem_exec_fence@basic-await@bcs0.html

  * {igt@gem_exec_fence@basic-wait@bcs0}:
    - fi-cml-s:           [SKIP][5] ([i915#1208]) -> [SKIP][6] +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-cml-s/igt@gem_exec_fence@basic-wait@bcs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/fi-cml-s/igt@gem_exec_fence@basic-wait@bcs0.html

  
Known issues
------------

  Here are the changes found in Patchwork_16549 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-n2820:       [PASS][7] -> [INCOMPLETE][8] ([i915#45])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-byt-n2820/igt@gem_close_race@basic-threads.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/fi-byt-n2820/igt@gem_close_race@basic-threads.html

  * igt@i915_selftest@live_hangcheck:
    - fi-icl-u3:          [PASS][9] -> [INCOMPLETE][10] ([fdo#108569])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/fi-icl-u3/igt@i915_selftest@live_hangcheck.html

  * igt@kms_chamelium@dp-edid-read:
    - fi-cml-u2:          [PASS][11] -> [FAIL][12] ([i915#217] / [i915#976])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/fi-cml-u2/igt@kms_chamelium@dp-edid-read.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_workarounds:
    - {fi-tgl-u}:         [DMESG-FAIL][13] ([i915#1169]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-tgl-u/igt@i915_selftest@live_workarounds.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/fi-tgl-u/igt@i915_selftest@live_workarounds.html
    - {fi-tgl-dsi}:       [DMESG-FAIL][15] ([i915#1169]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-tgl-dsi/igt@i915_selftest@live_workarounds.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/fi-tgl-dsi/igt@i915_selftest@live_workarounds.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [i915#1169]: https://gitlab.freedesktop.org/drm/intel/issues/1169
  [i915#1208]: https://gitlab.freedesktop.org/drm/intel/issues/1208
  [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937
  [i915#976]: https://gitlab.freedesktop.org/drm/intel/issues/976


Participating hosts (45 -> 45)
------------------------------

  Additional (6): fi-hsw-peppy fi-skl-6770hq fi-bdw-gvtdvm fi-glk-dsi fi-bsw-kefka fi-kbl-r 
  Missing    (6): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7926 -> Patchwork_16549

  CI-20190529: 20190529
  CI_DRM_7926: 6b2fe829d300abf285e9db8b252ffacd216df3ed @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5437: ae42fedfd0c536c560e8e17b06d9c7b94a4e8f0c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16549: b0ff8b0dd85029209325af0f39a5ce7dc7242d64 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

b0ff8b0dd850 drm/i915: Use engine wa list for Wa_1607090982

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16549/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915: Use engine wa list for Wa_1607090982
  2020-02-12 16:57 [Intel-gfx] [PATCH] drm/i915: Use engine wa list for Wa_1607090982 Mika Kuoppala
  2020-02-13  7:01 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
@ 2020-02-14 17:42 ` " Matt Roper
  1 sibling, 0 replies; 3+ messages in thread
From: Matt Roper @ 2020-02-14 17:42 UTC (permalink / raw)
  To: Mika Kuoppala; +Cc: intel-gfx

On Wed, Feb 12, 2020 at 06:57:07PM +0200, Mika Kuoppala wrote:
> This is in mcr range of register, thus we can only verify
> it through mmio. Use engine wa list with mcr range verification
> skip.
> 
> Fixes: 0db1a5f8706a ("drm/i915: Implement Wa_1607090982")
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

The headline of this patch is out of sync with the actual workaround
number being used in the code below and in the bspec (same as the patch
that this Fixes).  The bspec name for this is Wa_1606931601.

It wasn't originally obvious since the workaround numbers don't match,
but Anusha already has a patch in flight for this workaround here:
https://patchwork.freedesktop.org/series/72433/#rev5

The main difference is that it looks like your patch is adding the
workaround to the "A0 only" section of the engine workarounds function,
whereas Anusha's is adding it for all steppings, which I think is what
the bspec calls for.  Do you have additional information that this
should be A0-specific, or was that just an oversight?


Matt

> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 62b43f538a56..ba86511f1ef9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -598,9 +598,6 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine,
>  	wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val,
>  	       IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 :
>  			    FF_MODE2_TDS_TIMER_MASK);
> -
> -	/* Wa_1606931601:tgl */
> -	WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2, GEN12_DISABLE_EARLY_READ);
>  }
>  
>  static void
> @@ -1360,6 +1357,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>  		wa_write_or(wal,
>  			    GEN7_FF_THREAD_MODE,
>  			    GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
> +
> +		/* Wa_1606931601:tgl */
> +		wa_masked_en(wal,
> +			     GEN7_ROW_CHICKEN2,
> +			     GEN12_DISABLE_EARLY_READ);
>  	}
>  
>  	if (IS_GEN(i915, 11)) {
> -- 
> 2.17.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, back to index

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-12 16:57 [Intel-gfx] [PATCH] drm/i915: Use engine wa list for Wa_1607090982 Mika Kuoppala
2020-02-13  7:01 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2020-02-14 17:42 ` [Intel-gfx] [PATCH] " Matt Roper

Intel-GFX Archive on lore.kernel.org

Archives are clonable:
	git clone --mirror https://lore.kernel.org/intel-gfx/0 intel-gfx/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 intel-gfx intel-gfx/ https://lore.kernel.org/intel-gfx \
		intel-gfx@lists.freedesktop.org
	public-inbox-index intel-gfx

Example config snippet for mirrors

Newsgroup available over NNTP:
	nntp://nntp.lore.kernel.org/org.freedesktop.lists.intel-gfx


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git