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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Enable non-contiguous pipe fusing
Date: Fri, 13 Mar 2020 00:39:17 -0700	[thread overview]
Message-ID: <20200313073917.aeki7lm6zupx7y26@ldmartin-desk1> (raw)
In-Reply-To: <20200311083632.3249-1-anshuman.gupta@intel.com>

On Wed, Mar 11, 2020 at 02:06:32PM +0530, Anshuman Gupta wrote:
>Allow 3-display pipes SKU system with any combination
>in INTEL_INFO pipe mask.
>B.Spec:50075
>
>changes since RFC:
>- using intel_pipe_mask_is_valid() function to check integrity of
>  pipe_mask. [Ville]
>v2:
>- simplify condition in intel_pipe_mask_is_valid(). [Ville]
>v3:
>- removed non-contiguous pipe fusing check. [Lucas]

I'd also say in the commit message that the support for non-contiguous
pipe fusing is *already* supported in the driver. So this check here
doesn't make sense anymore and since it's an unlike condition we
can just stop checking.

Aside from commit message update,

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Lucas De Marchi

>
>Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
>---
> drivers/gpu/drm/i915/intel_device_info.c | 12 +-----------
> 1 file changed, 1 insertion(+), 11 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>index d7fe12734db8..9ff89e142ff1 100644
>--- a/drivers/gpu/drm/i915/intel_device_info.c
>+++ b/drivers/gpu/drm/i915/intel_device_info.c
>@@ -998,17 +998,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> 		    (dfsm & TGL_DFSM_PIPE_D_DISABLE))
> 			enabled_mask &= ~BIT(PIPE_D);
>
>-		/*
>-		 * At least one pipe should be enabled and if there are
>-		 * disabled pipes, they should be the last ones, with no holes
>-		 * in the mask.
>-		 */
>-		if (enabled_mask == 0 || !is_power_of_2(enabled_mask + 1))
>-			drm_err(&dev_priv->drm,
>-				"invalid pipe fuse configuration: enabled_mask=0x%x\n",
>-				enabled_mask);
>-		else
>-			info->pipe_mask = enabled_mask;
>+		info->pipe_mask = enabled_mask;
>
> 		if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
> 			info->display.has_hdcp = 0;
>-- 
>2.25.1
>
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  parent reply	other threads:[~2020-03-13  7:39 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-11  8:36 [Intel-gfx] [PATCH] drm/i915: Enable non-contiguous pipe fusing Anshuman Gupta
2020-03-11 10:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2020-03-12 11:08   ` Anshuman Gupta
2020-03-12 11:39     ` Vudum, Lakshminarayana
2020-03-12 11:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-13  4:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-13  7:39 ` Lucas De Marchi [this message]
2020-03-18 16:48   ` [Intel-gfx] [PATCH] " Ville Syrjälä
2020-03-19  7:53     ` Anshuman Gupta
2020-03-19 16:06       ` Ville Syrjälä
2020-03-18  9:44 ` [Intel-gfx] [PATCH v3] " Anshuman Gupta
2020-03-18 10:22   ` Shankar, Uma

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