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* [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr
@ 2020-08-25 17:13 José Roberto de Souza
  2020-08-25 17:13 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Disable DRRS when needed in fastsets José Roberto de Souza
                   ` (4 more replies)
  0 siblings, 5 replies; 12+ messages in thread
From: José Roberto de Souza @ 2020-08-25 17:13 UTC (permalink / raw)
  To: intel-gfx; +Cc: Hariom Pandey, Srinivas K

DRRS and PSR can't be enable together, so giving preference to PSR
as it allows more power-savings by complete shutting down display,
so to guarantee this, it should compute DRRS state after compute PSR.

Cc: Srinivas K <srinivasx.k@intel.com>
Cc: Hariom Pandey <hariom.pandey@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 52 +++++++++++++++----------
 1 file changed, 32 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 79c27f91f42c..a08d03c61b02 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
 		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
 
+static void
+intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
+			     struct intel_crtc_state *pipe_config,
+			     int output_bpp, bool constant_n)
+{
+	struct intel_connector *intel_connector = intel_dp->attached_connector;
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	/*
+	 * DRRS and PSR can't be enable together, so giving preference to PSR
+	 * as it allows more power-savings by complete shutting down display,
+	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
+	 * after intel_psr_compute_config().
+	 */
+	if (pipe_config->has_psr)
+		return;
+
+	if (!intel_connector->panel.downclock_mode ||
+	    dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
+		return;
+
+	pipe_config->has_drrs = true;
+	intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
+			       intel_connector->panel.downclock_mode->clock,
+			       pipe_config->port_clock, &pipe_config->dp_m2_n2,
+			       constant_n, pipe_config->fec_enable);
+}
+
 int
 intel_dp_compute_config(struct intel_encoder *encoder,
 			struct intel_crtc_state *pipe_config,
@@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	if (ret)
 		return ret;
 
-	pipe_config->has_drrs = false;
 	if (!intel_dp_port_has_audio(dev_priv, port))
 		pipe_config->has_audio = false;
 	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
@@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 			       &pipe_config->dp_m_n,
 			       constant_n, pipe_config->fec_enable);
 
-	if (intel_connector->panel.downclock_mode != NULL &&
-		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
-			pipe_config->has_drrs = true;
-			intel_link_compute_m_n(output_bpp,
-					       pipe_config->lane_count,
-					       intel_connector->panel.downclock_mode->clock,
-					       pipe_config->port_clock,
-					       &pipe_config->dp_m2_n2,
-					       constant_n, pipe_config->fec_enable);
-	}
-
 	if (!HAS_DDI(dev_priv))
 		intel_dp_set_clock(encoder, pipe_config);
 
 	intel_psr_compute_config(intel_dp, pipe_config);
+	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
+				     constant_n);
 	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
 	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
 
@@ -7730,16 +7748,10 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-	if (!crtc_state->has_drrs) {
-		drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
+	if (!crtc_state->has_drrs)
 		return;
-	}
 
-	if (dev_priv->psr.enabled) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR enabled. Not enabling DRRS.\n");
-		return;
-	}
+	drm_dbg_kms(&dev_priv->drm, "Enabling DRRS\n");
 
 	mutex_lock(&dev_priv->drrs.mutex);
 	if (dev_priv->drrs.dp) {
-- 
2.28.0

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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Disable DRRS when needed in fastsets
  2020-08-25 17:13 [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr José Roberto de Souza
@ 2020-08-25 17:13 ` José Roberto de Souza
  2020-08-26  7:20   ` Anshuman Gupta
  2020-08-25 17:13 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/display: Fix DRRS debugfs José Roberto de Souza
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 12+ messages in thread
From: José Roberto de Souza @ 2020-08-25 17:13 UTC (permalink / raw)
  To: intel-gfx; +Cc: Hariom Pandey, Srinivas K

Changes in the configuration could cause PSR to be compatible and
enabled so driver must also be able to disable DRRS when doing
fastsets.

v2: Fixed name of DRRS compute function (Anshuman)

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/173
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
Cc: Srinivas K <srinivasx.k@intel.com>
Cc: Hariom Pandey <hariom.pandey@intel.com>
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  2 +-
 drivers/gpu/drm/i915/display/intel_dp.c  | 71 +++++++++++++++++++++---
 drivers/gpu/drm/i915/display/intel_dp.h  |  2 +
 3 files changed, 65 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index de5b216561d8..ff05a852417c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4012,7 +4012,7 @@ static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state,
 
 	intel_psr_update(intel_dp, crtc_state, conn_state);
 	intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
-	intel_edp_drrs_enable(intel_dp, crtc_state);
+	intel_edp_drrs_update(intel_dp, crtc_state);
 
 	intel_panel_update_backlight(state, encoder, crtc_state, conn_state);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a08d03c61b02..c57ac83bf563 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -7736,6 +7736,15 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv,
 		    refresh_rate);
 }
 
+static void
+intel_edp_drrs_enable_locked(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	dev_priv->drrs.busy_frontbuffer_bits = 0;
+	dev_priv->drrs.dp = intel_dp;
+}
+
 /**
  * intel_edp_drrs_enable - init drrs struct if supported
  * @intel_dp: DP struct
@@ -7754,19 +7763,34 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
 	drm_dbg_kms(&dev_priv->drm, "Enabling DRRS\n");
 
 	mutex_lock(&dev_priv->drrs.mutex);
+
 	if (dev_priv->drrs.dp) {
-		drm_dbg_kms(&dev_priv->drm, "DRRS already enabled\n");
+		drm_warn(&dev_priv->drm, "DRRS already enabled\n");
 		goto unlock;
 	}
 
-	dev_priv->drrs.busy_frontbuffer_bits = 0;
-
-	dev_priv->drrs.dp = intel_dp;
+	intel_edp_drrs_enable_locked(intel_dp);
 
 unlock:
 	mutex_unlock(&dev_priv->drrs.mutex);
 }
 
+static void
+intel_edp_drrs_disable_locked(struct intel_dp *intel_dp,
+			      const struct intel_crtc_state *crtc_state)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) {
+		int refresh;
+
+		refresh = drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode);
+		intel_dp_set_drrs_state(dev_priv, crtc_state, refresh);
+	}
+
+	dev_priv->drrs.dp = NULL;
+}
+
 /**
  * intel_edp_drrs_disable - Disable DRRS
  * @intel_dp: DP struct
@@ -7787,16 +7811,45 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp,
 		return;
 	}
 
-	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
-		intel_dp_set_drrs_state(dev_priv, old_crtc_state,
-			drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode));
-
-	dev_priv->drrs.dp = NULL;
+	intel_edp_drrs_disable_locked(intel_dp, old_crtc_state);
 	mutex_unlock(&dev_priv->drrs.mutex);
 
 	cancel_delayed_work_sync(&dev_priv->drrs.work);
 }
 
+/**
+ * intel_edp_drrs_update - Update DRRS state
+ * @intel_dp: Intel DP
+ * @crtc_state: new CRTC state
+ *
+ * This function will update DRRS states, disabling or enabling DRRS when
+ * executing fastsets. For full modeset, intel_edp_drrs_disable() and
+ * intel_edp_drrs_enable() should be called instead.
+ */
+void
+intel_edp_drrs_update(struct intel_dp *intel_dp,
+		      const struct intel_crtc_state *crtc_state)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	if (dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
+		return;
+
+	mutex_lock(&dev_priv->drrs.mutex);
+
+	/* New state matches current one? */
+	if (crtc_state->has_drrs == !!dev_priv->drrs.dp)
+		goto unlock;
+
+	if (crtc_state->has_drrs)
+		intel_edp_drrs_enable_locked(intel_dp);
+	else
+		intel_edp_drrs_disable_locked(intel_dp, crtc_state);
+
+unlock:
+	mutex_unlock(&dev_priv->drrs.mutex);
+}
+
 static void intel_edp_drrs_downclock_work(struct work_struct *work)
 {
 	struct drm_i915_private *dev_priv =
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index b901ab850cbd..057b2c152cbd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -81,6 +81,8 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
 			   const struct intel_crtc_state *crtc_state);
 void intel_edp_drrs_disable(struct intel_dp *intel_dp,
 			    const struct intel_crtc_state *crtc_state);
+void intel_edp_drrs_update(struct intel_dp *intel_dp,
+			   const struct intel_crtc_state *crtc_state);
 void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
 			       unsigned int frontbuffer_bits);
 void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
-- 
2.28.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [Intel-gfx] [PATCH v3 3/3] drm/i915/display: Fix DRRS debugfs
  2020-08-25 17:13 [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr José Roberto de Souza
  2020-08-25 17:13 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Disable DRRS when needed in fastsets José Roberto de Souza
@ 2020-08-25 17:13 ` José Roberto de Souza
  2020-08-26  7:14   ` Anshuman Gupta
  2020-08-25 17:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/display: Compute has_drrs after compute has_psr Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 12+ messages in thread
From: José Roberto de Souza @ 2020-08-25 17:13 UTC (permalink / raw)
  To: intel-gfx; +Cc: Hariom Pandey, Srinivas K

Supported and enabled are different things so printing both.

v3: using drrs->type instead of vbt.drrs_type

Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: Srinivas K <srinivasx.k@intel.com>
Cc: Hariom Pandey <hariom.pandey@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_debugfs.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index f549381048b3..65ccf5d6cd39 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1069,10 +1069,18 @@ static void drrs_status_per_crtc(struct seq_file *m,
 
 	drm_connector_list_iter_begin(dev, &conn_iter);
 	drm_for_each_connector_iter(connector, &conn_iter) {
+		bool supported = false;
+
 		if (connector->state->crtc != &intel_crtc->base)
 			continue;
 
 		seq_printf(m, "%s:\n", connector->name);
+
+		if (connector->connector_type == DRM_MODE_CONNECTOR_eDP &&
+		    drrs->type == SEAMLESS_DRRS_SUPPORT)
+			supported = true;
+
+		seq_printf(m, "\tDRRS Supported: %s\n", yesno(supported));
 	}
 	drm_connector_list_iter_end(&conn_iter);
 
@@ -1083,7 +1091,7 @@ static void drrs_status_per_crtc(struct seq_file *m,
 
 		mutex_lock(&drrs->mutex);
 		/* DRRS Supported */
-		seq_puts(m, "\tDRRS Supported: Yes\n");
+		seq_puts(m, "\tDRRS Enabled: Yes\n");
 
 		/* disable_drrs() will make drrs->dp NULL */
 		if (!drrs->dp) {
@@ -1118,7 +1126,7 @@ static void drrs_status_per_crtc(struct seq_file *m,
 		mutex_unlock(&drrs->mutex);
 	} else {
 		/* DRRS not supported. Print the VBT parameter*/
-		seq_puts(m, "\tDRRS Supported : No");
+		seq_puts(m, "\tDRRS Enabled : No");
 	}
 	seq_puts(m, "\n");
 }
-- 
2.28.0

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/display: Compute has_drrs after compute has_psr
  2020-08-25 17:13 [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr José Roberto de Souza
  2020-08-25 17:13 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Disable DRRS when needed in fastsets José Roberto de Souza
  2020-08-25 17:13 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/display: Fix DRRS debugfs José Roberto de Souza
@ 2020-08-25 17:38 ` Patchwork
  2020-08-25 18:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  2020-08-26  7:26 ` [Intel-gfx] [PATCH v3 1/3] " Anshuman Gupta
  4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-08-25 17:38 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 5291 bytes --]

== Series Details ==

Series: series starting with [v3,1/3] drm/i915/display: Compute has_drrs after compute has_psr
URL   : https://patchwork.freedesktop.org/series/80989/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8924 -> Patchwork_18398
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/index.html

Known issues
------------

  Here are the changes found in Patchwork_18398 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@execlists:
    - fi-icl-y:           [PASS][1] -> [INCOMPLETE][2] ([i915#2276])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/fi-icl-y/igt@i915_selftest@live@execlists.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/fi-icl-y/igt@i915_selftest@live@execlists.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-bsw-kefka:       [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - fi-icl-u2:          [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-byt-j1900:       [DMESG-WARN][7] ([i915#1982]) -> [PASS][8] +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - fi-icl-u2:          [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-apl-guc:         [INCOMPLETE][11] ([i915#1635] / [i915#337]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/fi-apl-guc/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/fi-apl-guc/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  
#### Warnings ####

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [DMESG-FAIL][13] ([i915#62] / [i915#95]) -> [DMESG-FAIL][14] ([i915#62])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - fi-kbl-x1275:       [DMESG-WARN][15] ([i915#62] / [i915#92]) -> [DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/fi-kbl-x1275/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/fi-kbl-x1275/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2276]: https://gitlab.freedesktop.org/drm/intel/issues/2276
  [i915#337]: https://gitlab.freedesktop.org/drm/intel/issues/337
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (37 -> 34)
------------------------------

  Missing    (3): fi-byt-clapper fi-byt-squawks fi-bsw-cyan 


Build changes
-------------

  * Linux: CI_DRM_8924 -> Patchwork_18398

  CI-20190529: 20190529
  CI_DRM_8924: a8c0611e412aab46eab5475b0117d074892b96e2 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5770: f1d0c240ea2e631dfb9f493f37f8fb61cb2b1cf2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18398: 7d42e19c12ea5344d13aa31756cf847649e9985b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

7d42e19c12ea drm/i915/display: Fix DRRS debugfs
edac1e7128f4 drm/i915/display: Disable DRRS when needed in fastsets
fd15a0e19d78 drm/i915/display: Compute has_drrs after compute has_psr

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/index.html

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,1/3] drm/i915/display: Compute has_drrs after compute has_psr
  2020-08-25 17:13 [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr José Roberto de Souza
                   ` (2 preceding siblings ...)
  2020-08-25 17:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/display: Compute has_drrs after compute has_psr Patchwork
@ 2020-08-25 18:50 ` Patchwork
  2020-08-27 16:54   ` Souza, Jose
  2020-08-26  7:26 ` [Intel-gfx] [PATCH v3 1/3] " Anshuman Gupta
  4 siblings, 1 reply; 12+ messages in thread
From: Patchwork @ 2020-08-25 18:50 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 20440 bytes --]

== Series Details ==

Series: series starting with [v3,1/3] drm/i915/display: Compute has_drrs after compute has_psr
URL   : https://patchwork.freedesktop.org/series/80989/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_8924_full -> Patchwork_18398_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_18398_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_18398_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18398_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_sync@basic-store-all:
    - shard-tglb:         [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-tglb5/igt@gem_sync@basic-store-all.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-tglb7/igt@gem_sync@basic-store-all.html

  
Known issues
------------

  Here are the changes found in Patchwork_18398_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_reloc@basic-concurrent0:
    - shard-apl:          [PASS][3] -> [TIMEOUT][4] ([i915#1635] / [i915#1958]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-apl8/igt@gem_exec_reloc@basic-concurrent0.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-apl2/igt@gem_exec_reloc@basic-concurrent0.html

  * igt@gem_exec_whisper@basic-fds-forked-all:
    - shard-kbl:          [PASS][5] -> [TIMEOUT][6] ([i915#1958]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-kbl4/igt@gem_exec_whisper@basic-fds-forked-all.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-kbl2/igt@gem_exec_whisper@basic-fds-forked-all.html

  * igt@gem_exec_whisper@basic-queues-priority-all:
    - shard-glk:          [PASS][7] -> [TIMEOUT][8] ([i915#1958]) +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-glk7/igt@gem_exec_whisper@basic-queues-priority-all.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-glk6/igt@gem_exec_whisper@basic-queues-priority-all.html

  * igt@i915_pm_dc@dc5-psr:
    - shard-skl:          [PASS][9] -> [INCOMPLETE][10] ([i915#198])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl5/igt@i915_pm_dc@dc5-psr.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl7/igt@i915_pm_dc@dc5-psr.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-0:
    - shard-glk:          [PASS][11] -> [DMESG-FAIL][12] ([i915#118] / [i915#95]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-glk1/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-glk8/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-0:
    - shard-apl:          [PASS][13] -> [DMESG-WARN][14] ([i915#1635] / [i915#1982]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-apl3/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-apl1/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [PASS][15] -> [FAIL][16] ([i915#96])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
    - shard-kbl:          [PASS][17] -> [DMESG-WARN][18] ([i915#1982])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-kbl1/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-kbl4/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-skl:          [PASS][19] -> [FAIL][20] ([i915#2346])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@flip-vs-expired-vblank@c-dp1:
    - shard-apl:          [PASS][21] -> [FAIL][22] ([i915#1635] / [i915#79])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-apl6/igt@kms_flip@flip-vs-expired-vblank@c-dp1.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-apl7/igt@kms_flip@flip-vs-expired-vblank@c-dp1.html

  * igt@kms_flip@flip-vs-suspend@c-hdmi-a1:
    - shard-hsw:          [PASS][23] -> [INCOMPLETE][24] ([i915#2055])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-hsw1/igt@kms_flip@flip-vs-suspend@c-hdmi-a1.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-hsw4/igt@kms_flip@flip-vs-suspend@c-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-tglb:         [PASS][25] -> [DMESG-WARN][26] ([i915#1982]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-gtt:
    - shard-skl:          [PASS][27] -> [FAIL][28] ([i915#49])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-gtt.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl9/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-kbl:          [PASS][29] -> [DMESG-WARN][30] ([i915#180]) +7 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-kbl2/igt@kms_hdr@bpc-switch-suspend.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-kbl2/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [PASS][31] -> [FAIL][32] ([fdo#108145] / [i915#265]) +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][33] -> [DMESG-WARN][34] ([i915#1982]) +7 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_sprite_plane_onoff:
    - shard-iclb:         [PASS][35] -> [SKIP][36] ([fdo#109441])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-iclb2/igt@kms_psr@psr2_sprite_plane_onoff.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-iclb8/igt@kms_psr@psr2_sprite_plane_onoff.html

  * igt@perf@blocking-parameterized:
    - shard-iclb:         [PASS][37] -> [FAIL][38] ([i915#1542])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-iclb2/igt@perf@blocking-parameterized.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-iclb8/igt@perf@blocking-parameterized.html

  
#### Possible fixes ####

  * igt@gem_exec_gttfill@all:
    - shard-apl:          [TIMEOUT][39] ([i915#1635] / [i915#1958]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-apl7/igt@gem_exec_gttfill@all.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-apl8/igt@gem_exec_gttfill@all.html

  * igt@gem_exec_nop@basic-sequential:
    - shard-tglb:         [TIMEOUT][41] ([i915#1958]) -> [PASS][42] +2 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-tglb1/igt@gem_exec_nop@basic-sequential.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-tglb8/igt@gem_exec_nop@basic-sequential.html

  * igt@gem_exec_parallel@engines@basic:
    - shard-kbl:          [INCOMPLETE][43] -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-kbl1/igt@gem_exec_parallel@engines@basic.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-kbl1/igt@gem_exec_parallel@engines@basic.html

  * igt@gem_exec_reloc@basic-concurrent0:
    - shard-skl:          [TIMEOUT][45] ([i915#1958]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl7/igt@gem_exec_reloc@basic-concurrent0.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl5/igt@gem_exec_reloc@basic-concurrent0.html

  * igt@gem_exec_whisper@basic-contexts:
    - shard-glk:          [TIMEOUT][47] ([i915#1958]) -> [PASS][48] +3 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-glk9/igt@gem_exec_whisper@basic-contexts.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-glk4/igt@gem_exec_whisper@basic-contexts.html

  * igt@gem_exec_whisper@basic-forked:
    - shard-iclb:         [TIMEOUT][49] ([i915#1958]) -> [PASS][50] +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-iclb3/igt@gem_exec_whisper@basic-forked.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-iclb8/igt@gem_exec_whisper@basic-forked.html

  * igt@gem_exec_whisper@basic-normal:
    - shard-kbl:          [TIMEOUT][51] ([i915#1958]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-kbl2/igt@gem_exec_whisper@basic-normal.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-kbl2/igt@gem_exec_whisper@basic-normal.html

  * igt@gem_sync@basic-store-all:
    - shard-apl:          [FAIL][53] ([i915#1635]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-apl4/igt@gem_sync@basic-store-all.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-apl3/igt@gem_sync@basic-store-all.html
    - shard-kbl:          [FAIL][55] -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-kbl2/igt@gem_sync@basic-store-all.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-kbl1/igt@gem_sync@basic-store-all.html

  * igt@i915_selftest@mock@requests:
    - shard-skl:          [INCOMPLETE][57] ([i915#198] / [i915#2278]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl2/igt@i915_selftest@mock@requests.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl10/igt@i915_selftest@mock@requests.html

  * igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding:
    - shard-skl:          [DMESG-FAIL][59] ([i915#1982] / [i915#54]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl4/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl4/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html

  * igt@kms_flip@2x-wf_vblank-ts-check@ab-vga1-hdmi-a1:
    - shard-hsw:          [DMESG-WARN][61] ([i915#1982]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-hsw1/igt@kms_flip@2x-wf_vblank-ts-check@ab-vga1-hdmi-a1.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-hsw8/igt@kms_flip@2x-wf_vblank-ts-check@ab-vga1-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-kbl:          [DMESG-WARN][63] ([i915#180]) -> [PASS][64] +6 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
    - shard-skl:          [FAIL][65] ([i915#2122]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-kbl:          [DMESG-WARN][67] ([i915#1982]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-tglb:         [DMESG-WARN][69] ([i915#1982]) -> [PASS][70] +3 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-skl:          [FAIL][71] ([i915#1188]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl10/igt@kms_hdr@bpc-switch-dpms.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl5/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
    - shard-iclb:         [DMESG-WARN][73] ([i915#1982]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-iclb3/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-iclb7/igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [SKIP][75] ([fdo#109441]) -> [PASS][76] +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-iclb5/igt@kms_psr@psr2_primary_mmap_cpu.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@perf@gen8-unprivileged-single-ctx-counters:
    - shard-skl:          [DMESG-WARN][77] ([i915#1982]) -> [PASS][78] +10 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl2/igt@perf@gen8-unprivileged-single-ctx-counters.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl3/igt@perf@gen8-unprivileged-single-ctx-counters.html

  
#### Warnings ####

  * igt@gem_exec_reloc@basic-many-active@rcs0:
    - shard-apl:          [FAIL][79] ([i915#1635]) -> [FAIL][80] ([i915#1635] / [i915#2389])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-apl8/igt@gem_exec_reloc@basic-many-active@rcs0.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-apl3/igt@gem_exec_reloc@basic-many-active@rcs0.html

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - shard-snb:          [SKIP][81] ([fdo#109271]) -> [INCOMPLETE][82] ([i915#82])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-snb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-snb2/igt@i915_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_content_protection@atomic:
    - shard-kbl:          [TIMEOUT][83] ([i915#1319]) -> [TIMEOUT][84] ([i915#1319] / [i915#1958])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-kbl1/igt@kms_content_protection@atomic.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-kbl4/igt@kms_content_protection@atomic.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [SKIP][85] ([i915#1911]) -> [SKIP][86] ([fdo#109642] / [fdo#111068])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-iclb2/igt@kms_psr2_su@page_flip.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-iclb8/igt@kms_psr2_su@page_flip.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [FAIL][87] ([i915#1542]) -> [DMESG-FAIL][88] ([i915#1982])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl2/igt@perf@polling-parameterized.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl10/igt@perf@polling-parameterized.html

  * igt@runner@aborted:
    - shard-skl:          ([FAIL][89], [FAIL][90]) ([i915#1436] / [i915#2029]) -> [FAIL][91] ([i915#1436])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl2/igt@runner@aborted.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8924/shard-skl3/igt@runner@aborted.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/shard-skl10/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
  [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1911]: https://gitlab.freedesktop.org/drm/intel/issues/1911
  [i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
  [i915#2055]: https://gitlab.freedesktop.org/drm/intel/issues/2055
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2278]: https://gitlab.freedesktop.org/drm/intel/issues/2278
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
  [i915#96]: https://gitlab.freedesktop.org/drm/intel/issues/96


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_8924 -> Patchwork_18398

  CI-20190529: 20190529
  CI_DRM_8924: a8c0611e412aab46eab5475b0117d074892b96e2 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5770: f1d0c240ea2e631dfb9f493f37f8fb61cb2b1cf2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18398: 7d42e19c12ea5344d13aa31756cf847649e9985b @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/index.html

[-- Attachment #1.2: Type: text/html, Size: 24237 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v3 3/3] drm/i915/display: Fix DRRS debugfs
  2020-08-25 17:13 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/display: Fix DRRS debugfs José Roberto de Souza
@ 2020-08-26  7:14   ` Anshuman Gupta
  0 siblings, 0 replies; 12+ messages in thread
From: Anshuman Gupta @ 2020-08-26  7:14 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx, Hariom Pandey, Srinivas K

On 2020-08-25 at 10:13:31 -0700, José Roberto de Souza wrote:
> Supported and enabled are different things so printing both.
> 
> v3: using drrs->type instead of vbt.drrs_type
> 
> Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> Cc: Srinivas K <srinivasx.k@intel.com>
> Cc: Hariom Pandey <hariom.pandey@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_debugfs.c | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index f549381048b3..65ccf5d6cd39 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1069,10 +1069,18 @@ static void drrs_status_per_crtc(struct seq_file *m,
>  
>  	drm_connector_list_iter_begin(dev, &conn_iter);
>  	drm_for_each_connector_iter(connector, &conn_iter) {
> +		bool supported = false;
> +
>  		if (connector->state->crtc != &intel_crtc->base)
>  			continue;
>  
>  		seq_printf(m, "%s:\n", connector->name);
> +
> +		if (connector->connector_type == DRM_MODE_CONNECTOR_eDP &&
> +		    drrs->type == SEAMLESS_DRRS_SUPPORT)
> +			supported = true;
> +
> +		seq_printf(m, "\tDRRS Supported: %s\n", yesno(supported));
pritning format will looks confusing if a crtc attached to more then a one connector,
somewhat below,

CRTC 1:  eDP-1:

        DRRS Supported : Yes
DP-1:
	DRRS Supported : No
Better to keep seq_printf(m, "\tDRRS Supported: %s\n", yesno(supported)) outside
drm_for_each_connector_iter loop.

Thanks,
Anshuman Gupta.
	
>  	}
>  	drm_connector_list_iter_end(&conn_iter);
>  
> @@ -1083,7 +1091,7 @@ static void drrs_status_per_crtc(struct seq_file *m,
>  
>  		mutex_lock(&drrs->mutex);
>  		/* DRRS Supported */
> -		seq_puts(m, "\tDRRS Supported: Yes\n");
> +		seq_puts(m, "\tDRRS Enabled: Yes\n");
>  
>  		/* disable_drrs() will make drrs->dp NULL */
>  		if (!drrs->dp) {
> @@ -1118,7 +1126,7 @@ static void drrs_status_per_crtc(struct seq_file *m,
>  		mutex_unlock(&drrs->mutex);
>  	} else {
>  		/* DRRS not supported. Print the VBT parameter*/
> -		seq_puts(m, "\tDRRS Supported : No");
> +		seq_puts(m, "\tDRRS Enabled : No");
>  	}
>  	seq_puts(m, "\n");
>  }
> -- 
> 2.28.0
> 
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Disable DRRS when needed in fastsets
  2020-08-25 17:13 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Disable DRRS when needed in fastsets José Roberto de Souza
@ 2020-08-26  7:20   ` Anshuman Gupta
  0 siblings, 0 replies; 12+ messages in thread
From: Anshuman Gupta @ 2020-08-26  7:20 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx, Hariom Pandey, Srinivas K

On 2020-08-25 at 10:13:30 -0700, José Roberto de Souza wrote:
> Changes in the configuration could cause PSR to be compatible and
> enabled so driver must also be able to disable DRRS when doing
> fastsets.
> 
> v2: Fixed name of DRRS compute function (Anshuman)
LGTM
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/173
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/209
> Cc: Srinivas K <srinivasx.k@intel.com>
> Cc: Hariom Pandey <hariom.pandey@intel.com>
> Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c  | 71 +++++++++++++++++++++---
>  drivers/gpu/drm/i915/display/intel_dp.h  |  2 +
>  3 files changed, 65 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index de5b216561d8..ff05a852417c 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4012,7 +4012,7 @@ static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state,
>  
>  	intel_psr_update(intel_dp, crtc_state, conn_state);
>  	intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
> -	intel_edp_drrs_enable(intel_dp, crtc_state);
> +	intel_edp_drrs_update(intel_dp, crtc_state);
>  
>  	intel_panel_update_backlight(state, encoder, crtc_state, conn_state);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index a08d03c61b02..c57ac83bf563 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -7736,6 +7736,15 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv,
>  		    refresh_rate);
>  }
>  
> +static void
> +intel_edp_drrs_enable_locked(struct intel_dp *intel_dp)
> +{
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	dev_priv->drrs.busy_frontbuffer_bits = 0;
> +	dev_priv->drrs.dp = intel_dp;
> +}
> +
>  /**
>   * intel_edp_drrs_enable - init drrs struct if supported
>   * @intel_dp: DP struct
> @@ -7754,19 +7763,34 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
>  	drm_dbg_kms(&dev_priv->drm, "Enabling DRRS\n");
>  
>  	mutex_lock(&dev_priv->drrs.mutex);
> +
>  	if (dev_priv->drrs.dp) {
> -		drm_dbg_kms(&dev_priv->drm, "DRRS already enabled\n");
> +		drm_warn(&dev_priv->drm, "DRRS already enabled\n");
>  		goto unlock;
>  	}
>  
> -	dev_priv->drrs.busy_frontbuffer_bits = 0;
> -
> -	dev_priv->drrs.dp = intel_dp;
> +	intel_edp_drrs_enable_locked(intel_dp);
>  
>  unlock:
>  	mutex_unlock(&dev_priv->drrs.mutex);
>  }
>  
> +static void
> +intel_edp_drrs_disable_locked(struct intel_dp *intel_dp,
> +			      const struct intel_crtc_state *crtc_state)
> +{
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) {
> +		int refresh;
> +
> +		refresh = drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode);
> +		intel_dp_set_drrs_state(dev_priv, crtc_state, refresh);
> +	}
> +
> +	dev_priv->drrs.dp = NULL;
> +}
> +
>  /**
>   * intel_edp_drrs_disable - Disable DRRS
>   * @intel_dp: DP struct
> @@ -7787,16 +7811,45 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp,
>  		return;
>  	}
>  
> -	if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
> -		intel_dp_set_drrs_state(dev_priv, old_crtc_state,
> -			drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode));
> -
> -	dev_priv->drrs.dp = NULL;
> +	intel_edp_drrs_disable_locked(intel_dp, old_crtc_state);
>  	mutex_unlock(&dev_priv->drrs.mutex);
>  
>  	cancel_delayed_work_sync(&dev_priv->drrs.work);
>  }
>  
> +/**
> + * intel_edp_drrs_update - Update DRRS state
> + * @intel_dp: Intel DP
> + * @crtc_state: new CRTC state
> + *
> + * This function will update DRRS states, disabling or enabling DRRS when
> + * executing fastsets. For full modeset, intel_edp_drrs_disable() and
> + * intel_edp_drrs_enable() should be called instead.
> + */
> +void
> +intel_edp_drrs_update(struct intel_dp *intel_dp,
> +		      const struct intel_crtc_state *crtc_state)
> +{
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	if (dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
> +		return;
> +
> +	mutex_lock(&dev_priv->drrs.mutex);
> +
> +	/* New state matches current one? */
> +	if (crtc_state->has_drrs == !!dev_priv->drrs.dp)
> +		goto unlock;
> +
> +	if (crtc_state->has_drrs)
> +		intel_edp_drrs_enable_locked(intel_dp);
> +	else
> +		intel_edp_drrs_disable_locked(intel_dp, crtc_state);
> +
> +unlock:
> +	mutex_unlock(&dev_priv->drrs.mutex);
> +}
> +
>  static void intel_edp_drrs_downclock_work(struct work_struct *work)
>  {
>  	struct drm_i915_private *dev_priv =
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index b901ab850cbd..057b2c152cbd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -81,6 +81,8 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
>  			   const struct intel_crtc_state *crtc_state);
>  void intel_edp_drrs_disable(struct intel_dp *intel_dp,
>  			    const struct intel_crtc_state *crtc_state);
> +void intel_edp_drrs_update(struct intel_dp *intel_dp,
> +			   const struct intel_crtc_state *crtc_state);
>  void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
>  			       unsigned int frontbuffer_bits);
>  void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
> -- 
> 2.28.0
> 
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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr
  2020-08-25 17:13 [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr José Roberto de Souza
                   ` (3 preceding siblings ...)
  2020-08-25 18:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2020-08-26  7:26 ` Anshuman Gupta
  2020-08-26 16:47   ` Souza, Jose
  4 siblings, 1 reply; 12+ messages in thread
From: Anshuman Gupta @ 2020-08-26  7:26 UTC (permalink / raw)
  To: José Roberto de Souza; +Cc: intel-gfx, Hariom Pandey, Srinivas K

On 2020-08-25 at 10:13:29 -0700, José Roberto de Souza wrote:
> DRRS and PSR can't be enable together, so giving preference to PSR
> as it allows more power-savings by complete shutting down display,
> so to guarantee this, it should compute DRRS state after compute PSR.
> 
> Cc: Srinivas K <srinivasx.k@intel.com>
> Cc: Hariom Pandey <hariom.pandey@intel.com>
> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 52 +++++++++++++++----------
>  1 file changed, 32 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 79c27f91f42c..a08d03c61b02 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
>  		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
>  }
>  
> +static void
> +intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
> +			     struct intel_crtc_state *pipe_config,
> +			     int output_bpp, bool constant_n)
> +{
> +	struct intel_connector *intel_connector = intel_dp->attached_connector;
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	/*
> +	 * DRRS and PSR can't be enable together, so giving preference to PSR
> +	 * as it allows more power-savings by complete shutting down display,
> +	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
> +	 * after intel_psr_compute_config().
> +	 */
> +	if (pipe_config->has_psr)
> +		return;
> +
> +	if (!intel_connector->panel.downclock_mode ||
> +	    dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
> +		return;
> +
> +	pipe_config->has_drrs = true;
> +	intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
> +			       intel_connector->panel.downclock_mode->clock,
> +			       pipe_config->port_clock, &pipe_config->dp_m2_n2,
> +			       constant_n, pipe_config->fec_enable);
> +}
> +
>  int
>  intel_dp_compute_config(struct intel_encoder *encoder,
>  			struct intel_crtc_state *pipe_config,
> @@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	if (ret)
>  		return ret;
>  
> -	pipe_config->has_drrs = false;
IMHO this assignment is required, i was thinking a case, when a crtc is attached to more than 
one connector, suppose first eDP connector supports DRRS from panel.downclock_mode and
drrs.type but another DP connector won't support it in that case has_drrs will be still
true.
Please correct me if i am wrong here. 
Thanks,
Anshuman Gupta.
>  	if (!intel_dp_port_has_audio(dev_priv, port))
>  		pipe_config->has_audio = false;
>  	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> @@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  			       &pipe_config->dp_m_n,
>  			       constant_n, pipe_config->fec_enable);
>  
> -	if (intel_connector->panel.downclock_mode != NULL &&
> -		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
> -			pipe_config->has_drrs = true;
> -			intel_link_compute_m_n(output_bpp,
> -					       pipe_config->lane_count,
> -					       intel_connector->panel.downclock_mode->clock,
> -					       pipe_config->port_clock,
> -					       &pipe_config->dp_m2_n2,
> -					       constant_n, pipe_config->fec_enable);
> -	}
> -
>  	if (!HAS_DDI(dev_priv))
>  		intel_dp_set_clock(encoder, pipe_config);
>  
>  	intel_psr_compute_config(intel_dp, pipe_config);
> +	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> +				     constant_n);
>  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
>  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
>  
> @@ -7730,16 +7748,10 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  
> -	if (!crtc_state->has_drrs) {
> -		drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
> +	if (!crtc_state->has_drrs)
>  		return;
> -	}
>  
> -	if (dev_priv->psr.enabled) {
> -		drm_dbg_kms(&dev_priv->drm,
> -			    "PSR enabled. Not enabling DRRS.\n");
> -		return;
> -	}
> +	drm_dbg_kms(&dev_priv->drm, "Enabling DRRS\n");
>  
>  	mutex_lock(&dev_priv->drrs.mutex);
>  	if (dev_priv->drrs.dp) {
> -- 
> 2.28.0
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr
  2020-08-26  7:26 ` [Intel-gfx] [PATCH v3 1/3] " Anshuman Gupta
@ 2020-08-26 16:47   ` Souza, Jose
  2020-08-27 12:09     ` Anshuman Gupta
  0 siblings, 1 reply; 12+ messages in thread
From: Souza, Jose @ 2020-08-26 16:47 UTC (permalink / raw)
  To: Gupta, Anshuman; +Cc: intel-gfx, Pandey, Hariom, K, SrinivasX

On Wed, 2020-08-26 at 12:56 +0530, Anshuman Gupta wrote:
> On 2020-08-25 at 10:13:29 -0700, José Roberto de Souza wrote:
> > DRRS and PSR can't be enable together, so giving preference to PSR
> > as it allows more power-savings by complete shutting down display,
> > so to guarantee this, it should compute DRRS state after compute PSR.
> > 
> > Cc: Srinivas K <
> > srinivasx.k@intel.com
> > >
> > Cc: Hariom Pandey <
> > hariom.pandey@intel.com
> > >
> > Reviewed-by: Anshuman Gupta <
> > anshuman.gupta@intel.com
> > >
> > Signed-off-by: José Roberto de Souza <
> > jose.souza@intel.com
> > >
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp.c | 52 +++++++++++++++----------
> >  1 file changed, 32 insertions(+), 20 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 79c27f91f42c..a08d03c61b02 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
> >  		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
> >  }
> >  
> > +static void
> > +intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
> > +			     struct intel_crtc_state *pipe_config,
> > +			     int output_bpp, bool constant_n)
> > +{
> > +	struct intel_connector *intel_connector = intel_dp->attached_connector;
> > +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > +
> > +	/*
> > +	 * DRRS and PSR can't be enable together, so giving preference to PSR
> > +	 * as it allows more power-savings by complete shutting down display,
> > +	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
> > +	 * after intel_psr_compute_config().
> > +	 */
> > +	if (pipe_config->has_psr)
> > +		return;
> > +
> > +	if (!intel_connector->panel.downclock_mode ||
> > +	    dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
> > +		return;
> > +
> > +	pipe_config->has_drrs = true;
> > +	intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
> > +			       intel_connector->panel.downclock_mode->clock,
> > +			       pipe_config->port_clock, &pipe_config->dp_m2_n2,
> > +			       constant_n, pipe_config->fec_enable);
> > +}
> > +
> >  int
> >  intel_dp_compute_config(struct intel_encoder *encoder,
> >  			struct intel_crtc_state *pipe_config,
> > @@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >  	if (ret)
> >  		return ret;
> >  
> > -	pipe_config->has_drrs = false;
> 
> IMHO this assignment is required, i was thinking a case, when a crtc is attached to more than 
> one connector, suppose first eDP connector supports DRRS from panel.downclock_mode and
> drrs.type but another DP connector won't support it in that case has_drrs will be still
> true.
> Please correct me if i am wrong here. 

i915 only supports one connector per pipe/CRTC, if that was the case all other flags in intel_crtc_state would also have the same behaviour as
has_drrs.

> Thanks,
> Anshuman Gupta.
> >  	if (!intel_dp_port_has_audio(dev_priv, port))
> >  		pipe_config->has_audio = false;
> >  	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> > @@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >  			       &pipe_config->dp_m_n,
> >  			       constant_n, pipe_config->fec_enable);
> >  
> > -	if (intel_connector->panel.downclock_mode != NULL &&
> > -		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
> > -			pipe_config->has_drrs = true;
> > -			intel_link_compute_m_n(output_bpp,
> > -					       pipe_config->lane_count,
> > -					       intel_connector->panel.downclock_mode->clock,
> > -					       pipe_config->port_clock,
> > -					       &pipe_config->dp_m2_n2,
> > -					       constant_n, pipe_config->fec_enable);
> > -	}
> > -
> >  	if (!HAS_DDI(dev_priv))
> >  		intel_dp_set_clock(encoder, pipe_config);
> >  
> >  	intel_psr_compute_config(intel_dp, pipe_config);
> > +	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> > +				     constant_n);
> >  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> >  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
> >  
> > @@ -7730,16 +7748,10 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> >  
> > -	if (!crtc_state->has_drrs) {
> > -		drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
> > +	if (!crtc_state->has_drrs)
> >  		return;
> > -	}
> >  
> > -	if (dev_priv->psr.enabled) {
> > -		drm_dbg_kms(&dev_priv->drm,
> > -			    "PSR enabled. Not enabling DRRS.\n");
> > -		return;
> > -	}
> > +	drm_dbg_kms(&dev_priv->drm, "Enabling DRRS\n");
> >  
> >  	mutex_lock(&dev_priv->drrs.mutex);
> >  	if (dev_priv->drrs.dp) {
> > -- 
> > 2.28.0
> > 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr
  2020-08-26 16:47   ` Souza, Jose
@ 2020-08-27 12:09     ` Anshuman Gupta
  2020-08-27 16:51       ` Souza, Jose
  0 siblings, 1 reply; 12+ messages in thread
From: Anshuman Gupta @ 2020-08-27 12:09 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx, Pandey, Hariom, K, SrinivasX

On 2020-08-26 at 22:17:38 +0530, Souza, Jose wrote:
> On Wed, 2020-08-26 at 12:56 +0530, Anshuman Gupta wrote:
> > On 2020-08-25 at 10:13:29 -0700, José Roberto de Souza wrote:
> > > DRRS and PSR can't be enable together, so giving preference to PSR
> > > as it allows more power-savings by complete shutting down display,
> > > so to guarantee this, it should compute DRRS state after compute PSR.
> > > 
> > > Cc: Srinivas K <
> > > srinivasx.k@intel.com
> > > >
> > > Cc: Hariom Pandey <
> > > hariom.pandey@intel.com
> > > >
> > > Reviewed-by: Anshuman Gupta <
> > > anshuman.gupta@intel.com
> > > >
> > > Signed-off-by: José Roberto de Souza <
> > > jose.souza@intel.com
> > > >
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_dp.c | 52 +++++++++++++++----------
> > >  1 file changed, 32 insertions(+), 20 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index 79c27f91f42c..a08d03c61b02 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
> > >  		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
> > >  }
> > >  
> > > +static void
> > > +intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
> > > +			     struct intel_crtc_state *pipe_config,
> > > +			     int output_bpp, bool constant_n)
> > > +{
> > > +	struct intel_connector *intel_connector = intel_dp->attached_connector;
> > > +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > +
> > > +	/*
> > > +	 * DRRS and PSR can't be enable together, so giving preference to PSR
> > > +	 * as it allows more power-savings by complete shutting down display,
> > > +	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
> > > +	 * after intel_psr_compute_config().
> > > +	 */
> > > +	if (pipe_config->has_psr)
> > > +		return;
> > > +
> > > +	if (!intel_connector->panel.downclock_mode ||
> > > +	    dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
> > > +		return;
> > > +
> > > +	pipe_config->has_drrs = true;
> > > +	intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
> > > +			       intel_connector->panel.downclock_mode->clock,
> > > +			       pipe_config->port_clock, &pipe_config->dp_m2_n2,
> > > +			       constant_n, pipe_config->fec_enable);
> > > +}
> > > +
> > >  int
> > >  intel_dp_compute_config(struct intel_encoder *encoder,
> > >  			struct intel_crtc_state *pipe_config,
> > > @@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> > >  	if (ret)
> > >  		return ret;
> > >  
> > > -	pipe_config->has_drrs = false;
> > 
> > IMHO this assignment is required, i was thinking a case, when a crtc is attached to more than 
> > one connector, suppose first eDP connector supports DRRS from panel.downclock_mode and
> > drrs.type but another DP connector won't support it in that case has_drrs will be still
> > true.
> > Please correct me if i am wrong here. 
> 
> i915 only supports one connector per pipe/CRTC, if that was the case all other flags in intel_crtc_state would also have the same behaviour as
> has_drrs.
Actually once on kabylake i had witnessed this use case when a CRTC was attached to multiple connectors, AFAIU theortically also 
it seems possible as intel_modeset_pipe_config iterate for each connector in state for a given crtc i.e (connector_state->crtc == crtc)
and call encoder->compute_config().
If you are sure above case can't happen for drrs you can use my RB.
Applicable for [PATCH 3/3] of this series,
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> 
> > Thanks,
> > Anshuman Gupta.
> > >  	if (!intel_dp_port_has_audio(dev_priv, port))
> > >  		pipe_config->has_audio = false;
> > >  	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> > > @@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> > >  			       &pipe_config->dp_m_n,
> > >  			       constant_n, pipe_config->fec_enable);
> > >  
> > > -	if (intel_connector->panel.downclock_mode != NULL &&
> > > -		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
> > > -			pipe_config->has_drrs = true;
> > > -			intel_link_compute_m_n(output_bpp,
> > > -					       pipe_config->lane_count,
> > > -					       intel_connector->panel.downclock_mode->clock,
> > > -					       pipe_config->port_clock,
> > > -					       &pipe_config->dp_m2_n2,
> > > -					       constant_n, pipe_config->fec_enable);
> > > -	}
> > > -
> > >  	if (!HAS_DDI(dev_priv))
> > >  		intel_dp_set_clock(encoder, pipe_config);
> > >  
> > >  	intel_psr_compute_config(intel_dp, pipe_config);
> > > +	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> > > +				     constant_n);
> > >  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> > >  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
> > >  
> > > @@ -7730,16 +7748,10 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
> > >  {
> > >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > >  
> > > -	if (!crtc_state->has_drrs) {
> > > -		drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
> > > +	if (!crtc_state->has_drrs)
> > >  		return;
> > > -	}
> > >  
> > > -	if (dev_priv->psr.enabled) {
> > > -		drm_dbg_kms(&dev_priv->drm,
> > > -			    "PSR enabled. Not enabling DRRS.\n");
> > > -		return;
> > > -	}
> > > +	drm_dbg_kms(&dev_priv->drm, "Enabling DRRS\n");
> > >  
> > >  	mutex_lock(&dev_priv->drrs.mutex);
> > >  	if (dev_priv->drrs.dp) {
> > > -- 
> > > 2.28.0
> > > 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr
  2020-08-27 12:09     ` Anshuman Gupta
@ 2020-08-27 16:51       ` Souza, Jose
  0 siblings, 0 replies; 12+ messages in thread
From: Souza, Jose @ 2020-08-27 16:51 UTC (permalink / raw)
  To: Gupta, Anshuman; +Cc: intel-gfx, Pandey, Hariom, K, SrinivasX

On Thu, 2020-08-27 at 17:39 +0530, Anshuman Gupta wrote:
> On 2020-08-26 at 22:17:38 +0530, Souza, Jose wrote:
> > On Wed, 2020-08-26 at 12:56 +0530, Anshuman Gupta wrote:
> > > On 2020-08-25 at 10:13:29 -0700, José Roberto de Souza wrote:
> > > > DRRS and PSR can't be enable together, so giving preference to PSR
> > > > as it allows more power-savings by complete shutting down display,
> > > > so to guarantee this, it should compute DRRS state after compute PSR.
> > > > 
> > > > Cc: Srinivas K <
> > > > srinivasx.k@intel.com
> > > > 
> > > > 
> > > > Cc: Hariom Pandey <
> > > > hariom.pandey@intel.com
> > > > 
> > > > 
> > > > Reviewed-by: Anshuman Gupta <
> > > > anshuman.gupta@intel.com
> > > > 
> > > > 
> > > > Signed-off-by: José Roberto de Souza <
> > > > jose.souza@intel.com
> > > > 
> > > > 
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_dp.c | 52 +++++++++++++++----------
> > > >  1 file changed, 32 insertions(+), 20 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > index 79c27f91f42c..a08d03c61b02 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > @@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
> > > >  		intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
> > > >  }
> > > >  
> > > > +static void
> > > > +intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
> > > > +			     struct intel_crtc_state *pipe_config,
> > > > +			     int output_bpp, bool constant_n)
> > > > +{
> > > > +	struct intel_connector *intel_connector = intel_dp->attached_connector;
> > > > +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > > +
> > > > +	/*
> > > > +	 * DRRS and PSR can't be enable together, so giving preference to PSR
> > > > +	 * as it allows more power-savings by complete shutting down display,
> > > > +	 * so to guarantee this, intel_dp_drrs_compute_config() must be called
> > > > +	 * after intel_psr_compute_config().
> > > > +	 */
> > > > +	if (pipe_config->has_psr)
> > > > +		return;
> > > > +
> > > > +	if (!intel_connector->panel.downclock_mode ||
> > > > +	    dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
> > > > +		return;
> > > > +
> > > > +	pipe_config->has_drrs = true;
> > > > +	intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
> > > > +			       intel_connector->panel.downclock_mode->clock,
> > > > +			       pipe_config->port_clock, &pipe_config->dp_m2_n2,
> > > > +			       constant_n, pipe_config->fec_enable);
> > > > +}
> > > > +
> > > >  int
> > > >  intel_dp_compute_config(struct intel_encoder *encoder,
> > > >  			struct intel_crtc_state *pipe_config,
> > > > @@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> > > >  	if (ret)
> > > >  		return ret;
> > > >  
> > > > -	pipe_config->has_drrs = false;
> > > 
> > > IMHO this assignment is required, i was thinking a case, when a crtc is attached to more than 
> > > one connector, suppose first eDP connector supports DRRS from panel.downclock_mode and
> > > drrs.type but another DP connector won't support it in that case has_drrs will be still
> > > true.
> > > Please correct me if i am wrong here. 
> > 
> > i915 only supports one connector per pipe/CRTC, if that was the case all other flags in intel_crtc_state would also have the same behaviour as
> > has_drrs.
> 
> Actually once on kabylake i had witnessed this use case when a CRTC was attached to multiple connectors, AFAIU theortically also 
> it seems possible as intel_modeset_pipe_config iterate for each connector in state for a given crtc i.e (connector_state->crtc == crtc)
> and call encoder->compute_config().
> If you are sure above case can't happen for drrs you can use my RB.
> Applicable for [PATCH 3/3] of this series,
> Reviewed-by: Anshuman Gupta <
> anshuman.gupta@intel.com

PSR would have a lot of issues if such scenario was possible.Patches pushed, thanks for the review.

> >
> > > Thanks,
> > > Anshuman Gupta.
> > > >  	if (!intel_dp_port_has_audio(dev_priv, port))
> > > >  		pipe_config->has_audio = false;
> > > >  	else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
> > > > @@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> > > >  			       &pipe_config->dp_m_n,
> > > >  			       constant_n, pipe_config->fec_enable);
> > > >  
> > > > -	if (intel_connector->panel.downclock_mode != NULL &&
> > > > -		dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
> > > > -			pipe_config->has_drrs = true;
> > > > -			intel_link_compute_m_n(output_bpp,
> > > > -					       pipe_config->lane_count,
> > > > -					       intel_connector->panel.downclock_mode->clock,
> > > > -					       pipe_config->port_clock,
> > > > -					       &pipe_config->dp_m2_n2,
> > > > -					       constant_n, pipe_config->fec_enable);
> > > > -	}
> > > > -
> > > >  	if (!HAS_DDI(dev_priv))
> > > >  		intel_dp_set_clock(encoder, pipe_config);
> > > >  
> > > >  	intel_psr_compute_config(intel_dp, pipe_config);
> > > > +	intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> > > > +				     constant_n);
> > > >  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> > > >  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
> > > >  
> > > > @@ -7730,16 +7748,10 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
> > > >  {
> > > >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > >  
> > > > -	if (!crtc_state->has_drrs) {
> > > > -		drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
> > > > +	if (!crtc_state->has_drrs)
> > > >  		return;
> > > > -	}
> > > >  
> > > > -	if (dev_priv->psr.enabled) {
> > > > -		drm_dbg_kms(&dev_priv->drm,
> > > > -			    "PSR enabled. Not enabling DRRS.\n");
> > > > -		return;
> > > > -	}
> > > > +	drm_dbg_kms(&dev_priv->drm, "Enabling DRRS\n");
> > > >  
> > > >  	mutex_lock(&dev_priv->drrs.mutex);
> > > >  	if (dev_priv->drrs.dp) {
> > > > -- 
> > > > 2.28.0
> > > > 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx]  ✗ Fi.CI.IGT: failure for series starting with [v3,1/3] drm/i915/display: Compute has_drrs after compute has_psr
  2020-08-25 18:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2020-08-27 16:54   ` Souza, Jose
  0 siblings, 0 replies; 12+ messages in thread
From: Souza, Jose @ 2020-08-27 16:54 UTC (permalink / raw)
  To: intel-gfx

On Tue, 2020-08-25 at 18:50 +0000, Patchwork wrote:
> Patch Details
> Series:	series starting with [v3,1/3] drm/i915/display: Compute has_drrs after compute has_psr
> URL:	https://patchwork.freedesktop.org/series/80989/
> State:	failure
> Details:	https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18398/index.html
> CI Bug Log - changes from CI_DRM_8924_full -> Patchwork_18398_full
> Summary
> FAILURE
> 
> Serious unknown changes coming with Patchwork_18398_full absolutely need to be
> verified manually.
> 
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_18398_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
> 
> Possible new issues
> Here are the unknown changes that may have been introduced in Patchwork_18398_full:
> 
> IGT changes
> Possible regressions
> igt@gem_sync@basic-store-all:
> shard-tglb: PASS -> FAIL

Changes not related, so patches pushed to dinq.Thanks for the reviews Anshuman.


> Known issues
> Here are the changes found in Patchwork_18398_full that come from known issues:
> 
> IGT changes
> Issues hit
> igt@gem_exec_reloc@basic-concurrent0:
> 
> shard-apl: PASS -> TIMEOUT (i915#1635 / i915#1958) +1 similar issue
> igt@gem_exec_whisper@basic-fds-forked-all:
> 
> shard-kbl: PASS -> TIMEOUT (i915#1958) +1 similar issue
> igt@gem_exec_whisper@basic-queues-priority-all:
> 
> shard-glk: PASS -> TIMEOUT (i915#1958) +1 similar issue
> igt@i915_pm_dc@dc5-psr:
> 
> shard-skl: PASS -> INCOMPLETE (i915#198)
> igt@kms_big_fb@x-tiled-64bpp-rotate-0:
> 
> shard-glk: PASS -> DMESG-FAIL (i915#118 / i915#95) +1 similar issue
> igt@kms_big_fb@x-tiled-8bpp-rotate-0:
> 
> shard-apl: PASS -> DMESG-WARN (i915#1635 / i915#1982) +1 similar issue
> igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
> 
> shard-hsw: PASS -> FAIL (i915#96)
> igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic:
> 
> shard-kbl: PASS -> DMESG-WARN (i915#1982)
> igt@kms_cursor_legacy@flip-vs-cursor-legacy:
> 
> shard-skl: PASS -> FAIL (i915#2346)
> igt@kms_flip@flip-vs-expired-vblank@c-dp1:
> 
> shard-apl: PASS -> FAIL (i915#1635 / i915#79)
> igt@kms_flip@flip-vs-suspend@c-hdmi-a1:
> 
> shard-hsw: PASS -> INCOMPLETE (i915#2055)
> igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc:
> 
> shard-tglb: PASS -> DMESG-WARN (i915#1982) +1 similar issue
> igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-gtt:
> 
> shard-skl: PASS -> FAIL (i915#49)
> igt@kms_hdr@bpc-switch-suspend:
> 
> shard-kbl: PASS -> DMESG-WARN (i915#180) +7 similar issues
> igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
> 
> shard-skl: PASS -> FAIL (fdo#108145 / i915#265) +1 similar issue
> igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
> 
> shard-skl: PASS -> DMESG-WARN (i915#1982) +7 similar issues
> igt@kms_psr@psr2_sprite_plane_onoff:
> 
> shard-iclb: PASS -> SKIP (fdo#109441)
> igt@perf@blocking-parameterized:
> 
> shard-iclb: PASS -> FAIL (i915#1542)
> Possible fixes
> igt@gem_exec_gttfill@all:
> 
> shard-apl: TIMEOUT (i915#1635 / i915#1958) -> PASS
> igt@gem_exec_nop@basic-sequential:
> 
> shard-tglb: TIMEOUT (i915#1958) -> PASS +2 similar issues
> igt@gem_exec_parallel@engines@basic:
> 
> shard-kbl: INCOMPLETE -> PASS
> igt@gem_exec_reloc@basic-concurrent0:
> 
> shard-skl: TIMEOUT (i915#1958) -> PASS
> igt@gem_exec_whisper@basic-contexts:
> 
> shard-glk: TIMEOUT (i915#1958) -> PASS +3 similar issues
> igt@gem_exec_whisper@basic-forked:
> 
> shard-iclb: TIMEOUT (i915#1958) -> PASS +1 similar issue
> igt@gem_exec_whisper@basic-normal:
> 
> shard-kbl: TIMEOUT (i915#1958) -> PASS
> igt@gem_sync@basic-store-all:
> 
> shard-apl: FAIL (i915#1635) -> PASS
> 
> shard-kbl: FAIL -> PASS
> 
> igt@i915_selftest@mock@requests:
> 
> shard-skl: INCOMPLETE (i915#198 / i915#2278) -> PASS
> igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding:
> 
> shard-skl: DMESG-FAIL (i915#1982 / i915#54) -> PASS
> igt@kms_flip@2x-wf_vblank-ts-check@ab-vga1-hdmi-a1:
> 
> shard-hsw: DMESG-WARN (i915#1982) -> PASS
> igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
> 
> shard-kbl: DMESG-WARN (i915#180) -> PASS +6 similar issues
> igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
> 
> shard-skl: FAIL (i915#2122) -> PASS
> igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite:
> 
> shard-kbl: DMESG-WARN (i915#1982) -> PASS
> igt@kms_frontbuffer_tracking@fbcpsr-suspend:
> 
> shard-tglb: DMESG-WARN (i915#1982) -> PASS +3 similar issues
> igt@kms_hdr@bpc-switch-dpms:
> 
> shard-skl: FAIL (i915#1188) -> PASS
> igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping:
> 
> shard-iclb: DMESG-WARN (i915#1982) -> PASS
> igt@kms_psr@psr2_primary_mmap_cpu:
> 
> shard-iclb: SKIP (fdo#109441) -> PASS +1 similar issue
> igt@perf@gen8-unprivileged-single-ctx-counters:
> 
> shard-skl: DMESG-WARN (i915#1982) -> PASS +10 similar issues
> Warnings
> igt@gem_exec_reloc@basic-many-active@rcs0:
> 
> shard-apl: FAIL (i915#1635) -> FAIL (i915#1635 / i915#2389)
> igt@i915_pm_dc@dc3co-vpb-simulation:
> 
> shard-snb: SKIP (fdo#109271) -> INCOMPLETE (i915#82)
> igt@kms_content_protection@atomic:
> 
> shard-kbl: TIMEOUT (i915#1319) -> TIMEOUT (i915#1319 / i915#1958)
> igt@kms_psr2_su@page_flip:
> 
> shard-iclb: SKIP (i915#1911) -> SKIP (fdo#109642 / fdo#111068)
> igt@perf@polling-parameterized:
> 
> shard-skl: FAIL (i915#1542) -> DMESG-FAIL (i915#1982)
> igt@runner@aborted:
> 
> shard-skl: (FAIL, FAIL) (i915#1436 / i915#2029) -> FAIL (i915#1436)
> {name}: This element is suppressed. This means it is ignored when computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
> Participating hosts (10 -> 10)
> No changes in participating hosts
> 
> Build changes
> Linux: CI_DRM_8924 -> Patchwork_18398
> CI-20190529: 20190529
> CI_DRM_8924: a8c0611e412aab46eab5475b0117d074892b96e2 @ git://anongit.freedesktop.org/gfx-ci/linux
> IGT_5770: f1d0c240ea2e631dfb9f493f37f8fb61cb2b1cf2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
> Patchwork_18398: 7d42e19c12ea5344d13aa31756cf847649e9985b @ git://anongit.freedesktop.org/gfx-ci/linux
> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> 
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^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2020-08-27 17:09 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-08-25 17:13 [Intel-gfx] [PATCH v3 1/3] drm/i915/display: Compute has_drrs after compute has_psr José Roberto de Souza
2020-08-25 17:13 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Disable DRRS when needed in fastsets José Roberto de Souza
2020-08-26  7:20   ` Anshuman Gupta
2020-08-25 17:13 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/display: Fix DRRS debugfs José Roberto de Souza
2020-08-26  7:14   ` Anshuman Gupta
2020-08-25 17:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/3] drm/i915/display: Compute has_drrs after compute has_psr Patchwork
2020-08-25 18:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-08-27 16:54   ` Souza, Jose
2020-08-26  7:26 ` [Intel-gfx] [PATCH v3 1/3] " Anshuman Gupta
2020-08-26 16:47   ` Souza, Jose
2020-08-27 12:09     ` Anshuman Gupta
2020-08-27 16:51       ` Souza, Jose

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