From: Lee Shawn C <shawn.c.lee@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Cooper Chiou <cooper.chiou@intel.com>
Subject: [Intel-gfx] [PATCH v2] drm/i915: support two CSC module on gen11 and later
Date: Fri, 15 Jan 2021 13:46:04 +0800 [thread overview]
Message-ID: <20210115054604.27726-1-shawn.c.lee@intel.com> (raw)
In-Reply-To: <20210114092236.20477-1-shawn.c.lee@intel.com>
There are two CSC on pipeline on gen11 and later platform.
User space application is allowed to enable CTM and RGB
to YCbCr coversion at the same time now.
v2: check csc capability in {}_color_check function.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Shankar Uma <uma.shankar@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 45 ++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_display.c | 13 ------
2 files changed, 45 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 172d398081ee..22edcd0c9ad5 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1322,10 +1322,35 @@ static u32 i9xx_gamma_mode(struct intel_crtc_state *crtc_state)
return GAMMA_MODE_MODE_10BIT; /* i965+ only */
}
+static int check_csc(const struct intel_crtc_state *pipe_config)
+{
+ struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
+
+ if ((INTEL_GEN(dev_priv) < 11) &&
+ (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
+ pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) &&
+ pipe_config->hw.ctm) {
+ /*
+ * There is only one pipe CSC unit per pipe, and we need that
+ * for output conversion from RGB->YCBCR. So if CTM is already
+ * applied we can't support YCBCR420 output.
+ */
+ drm_dbg_kms(&dev_priv->drm,
+ "YCBCR420 and CTM together are not possible\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int i9xx_color_check(struct intel_crtc_state *crtc_state)
{
int ret;
+ ret = check_csc(crtc_state);
+ if (ret)
+ return ret;
+
ret = check_luts(crtc_state);
if (ret)
return ret;
@@ -1374,6 +1399,10 @@ static int chv_color_check(struct intel_crtc_state *crtc_state)
{
int ret;
+ ret = check_csc(crtc_state);
+ if (ret)
+ return ret;
+
ret = check_luts(crtc_state);
if (ret)
return ret;
@@ -1427,6 +1456,10 @@ static int ilk_color_check(struct intel_crtc_state *crtc_state)
{
int ret;
+ ret = check_csc(crtc_state);
+ if (ret)
+ return ret;
+
ret = check_luts(crtc_state);
if (ret)
return ret;
@@ -1488,6 +1521,10 @@ static int ivb_color_check(struct intel_crtc_state *crtc_state)
bool limited_color_range = ilk_csc_limited_range(crtc_state);
int ret;
+ ret = check_csc(crtc_state);
+ if (ret)
+ return ret;
+
ret = check_luts(crtc_state);
if (ret)
return ret;
@@ -1527,6 +1564,10 @@ static int glk_color_check(struct intel_crtc_state *crtc_state)
{
int ret;
+ ret = check_csc(crtc_state);
+ if (ret)
+ return ret;
+
ret = check_luts(crtc_state);
if (ret)
return ret;
@@ -1592,6 +1633,10 @@ static int icl_color_check(struct intel_crtc_state *crtc_state)
{
int ret;
+ ret = check_csc(crtc_state);
+ if (ret)
+ return ret;
+
ret = check_luts(crtc_state);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 66990e48c0d4..e60cbe8b0203 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7835,19 +7835,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
return -EINVAL;
}
- if ((pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
- pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) &&
- pipe_config->hw.ctm) {
- /*
- * There is only one pipe CSC unit per pipe, and we need that
- * for output conversion from RGB->YCBCR. So if CTM is already
- * applied we can't support YCBCR420 output.
- */
- drm_dbg_kms(&dev_priv->drm,
- "YCBCR420 and CTM together are not possible\n");
- return -EINVAL;
- }
-
/*
* Pipe horizontal size must be even in:
* - DVO ganged mode
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-01-15 5:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-14 9:22 [Intel-gfx] [PATCH] drm/i915: support two CSC module on gen11 and later Lee Shawn C
2021-01-14 10:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-01-14 14:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-14 15:31 ` [Intel-gfx] [PATCH] " Ville Syrjälä
2021-01-15 5:45 ` Lee, Shawn C
2021-01-15 5:46 ` Lee Shawn C [this message]
2021-01-15 16:04 ` [Intel-gfx] [PATCH v2] " Ville Syrjälä
2021-01-15 6:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: support two CSC module on gen11 and later (rev2) Patchwork
2021-01-15 12:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-18 2:27 ` [Intel-gfx] [PATCH v3] drm/i915: support two CSC module on gen11 and later Lee Shawn C
2021-01-18 15:08 ` Ville Syrjälä
2021-01-18 3:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: support two CSC module on gen11 and later (rev3) Patchwork
2021-01-18 9:59 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210115054604.27726-1-shawn.c.lee@intel.com \
--to=shawn.c.lee@intel.com \
--cc=cooper.chiou@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).