From: Lee Shawn C <shawn.c.lee@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Cooper Chiou <cooper.chiou@intel.com>
Subject: [Intel-gfx] [PATCH v3] drm/i915: support two CSC module on gen11 and later
Date: Mon, 18 Jan 2021 10:27:53 +0800 [thread overview]
Message-ID: <20210118022753.8798-1-shawn.c.lee@intel.com> (raw)
In-Reply-To: <20210114092236.20477-1-shawn.c.lee@intel.com>
There are two CSC on pipeline on gen11 and later platform.
User space application is allowed to enable CTM and RGB
to YCbCr coversion at the same time now.
v2: check csc capability in {}_color_check function.
v3: can't support two CSC at the same time in {ivb,glk}_color_check.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Shankar Uma <uma.shankar@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 16 ++++++++++++++++
drivers/gpu/drm/i915/display/intel_display.c | 13 -------------
2 files changed, 16 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 172d398081ee..ff7dcb7088bf 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1485,6 +1485,7 @@ static u32 ivb_csc_mode(const struct intel_crtc_state *crtc_state)
static int ivb_color_check(struct intel_crtc_state *crtc_state)
{
+ struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
bool limited_color_range = ilk_csc_limited_range(crtc_state);
int ret;
@@ -1492,6 +1493,13 @@ static int ivb_color_check(struct intel_crtc_state *crtc_state)
if (ret)
return ret;
+ if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB &&
+ crtc_state->hw.ctm) {
+ drm_dbg_kms(&dev_priv->drm,
+ "YCBCR and CTM together are not possible\n");
+ return -EINVAL;
+ }
+
crtc_state->gamma_enable =
(crtc_state->hw.gamma_lut ||
crtc_state->hw.degamma_lut) &&
@@ -1525,12 +1533,20 @@ static u32 glk_gamma_mode(const struct intel_crtc_state *crtc_state)
static int glk_color_check(struct intel_crtc_state *crtc_state)
{
+ struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
int ret;
ret = check_luts(crtc_state);
if (ret)
return ret;
+ if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB &&
+ crtc_state->hw.ctm) {
+ drm_dbg_kms(&dev_priv->drm,
+ "YCBCR and CTM together are not possible\n");
+ return -EINVAL;
+ }
+
crtc_state->gamma_enable =
crtc_state->hw.gamma_lut &&
!crtc_state->c8_planes;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b728792e0c27..b614987eddf1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6355,19 +6355,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
return -EINVAL;
}
- if ((pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
- pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) &&
- pipe_config->hw.ctm) {
- /*
- * There is only one pipe CSC unit per pipe, and we need that
- * for output conversion from RGB->YCBCR. So if CTM is already
- * applied we can't support YCBCR420 output.
- */
- drm_dbg_kms(&dev_priv->drm,
- "YCBCR420 and CTM together are not possible\n");
- return -EINVAL;
- }
-
/*
* Pipe horizontal size must be even in:
* - DVO ganged mode
--
2.17.1
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next prev parent reply other threads:[~2021-01-18 2:23 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-14 9:22 [Intel-gfx] [PATCH] drm/i915: support two CSC module on gen11 and later Lee Shawn C
2021-01-14 10:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-01-14 14:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-14 15:31 ` [Intel-gfx] [PATCH] " Ville Syrjälä
2021-01-15 5:45 ` Lee, Shawn C
2021-01-15 5:46 ` [Intel-gfx] [PATCH v2] " Lee Shawn C
2021-01-15 16:04 ` Ville Syrjälä
2021-01-15 6:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: support two CSC module on gen11 and later (rev2) Patchwork
2021-01-15 12:40 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-18 2:27 ` Lee Shawn C [this message]
2021-01-18 15:08 ` [Intel-gfx] [PATCH v3] drm/i915: support two CSC module on gen11 and later Ville Syrjälä
2021-01-18 3:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: support two CSC module on gen11 and later (rev3) Patchwork
2021-01-18 9:59 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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