* [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: don't trust the dma_buf->size @ 2021-01-22 17:35 Matthew Auld 2021-01-22 17:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: consolidate 2big error checking for object sizes Matthew Auld ` (2 more replies) 0 siblings, 3 replies; 9+ messages in thread From: Matthew Auld @ 2021-01-22 17:35 UTC (permalink / raw) To: intel-gfx At least for the time being, we need to limit our object sizes such that the number of pages can fit within a 32b signed int. It looks like we should also apply the same restriction to any imported dma-buf. Signed-off-by: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c index 04e9c04545ad..dc11497f830b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c @@ -244,6 +244,16 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev, } } + /* + * XXX: There is a prevalence of the assumption that we fit the + * object's page count inside a 32bit _signed_ variable. Let's document + * this and catch if we ever need to fix it. In the meantime, if you do + * spot such a local variable, please consider fixing! + */ + + if (dma_buf->size >> PAGE_SHIFT > INT_MAX) + return ERR_PTR(-E2BIG); + /* need to attach */ attach = dma_buf_attach(dma_buf, dev->dev); if (IS_ERR(attach)) -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915: consolidate 2big error checking for object sizes 2021-01-22 17:35 [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: don't trust the dma_buf->size Matthew Auld @ 2021-01-22 17:35 ` Matthew Auld 2021-01-22 17:43 ` Chris Wilson 2021-01-22 21:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/dmabuf: don't trust the dma_buf->size Patchwork 2021-01-23 4:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2 siblings, 1 reply; 9+ messages in thread From: Matthew Auld @ 2021-01-22 17:35 UTC (permalink / raw) To: intel-gfx Throw it into a simple helper, and throw a warning if we encounter an object which has been initialised with an object size that exceeds our limit of INT_MAX pages. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 9 +------ drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 ++ drivers/gpu/drm/i915/gem/i915_gem_object.h | 26 +++++++++++++++++++++ drivers/gpu/drm/i915/gem/i915_gem_region.c | 12 +--------- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 16 +------------ 5 files changed, 31 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c index dc11497f830b..5cc8a0b2387f 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c @@ -244,14 +244,7 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev, } } - /* - * XXX: There is a prevalence of the assumption that we fit the - * object's page count inside a 32bit _signed_ variable. Let's document - * this and catch if we ever need to fix it. In the meantime, if you do - * spot such a local variable, please consider fixing! - */ - - if (dma_buf->size >> PAGE_SHIFT > INT_MAX) + if (i915_gem_object_size_2big(dma_buf->size)) return ERR_PTR(-E2BIG); /* need to attach */ diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index 70f798405f7f..d3702ea8c6aa 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -62,6 +62,8 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, const struct drm_i915_gem_object_ops *ops, struct lock_class_key *key) { + GEM_CHECK_SIZE_OVERFLOW(obj->base.size); + __mutex_init(&obj->mm.lock, ops->name ?: "obj->mm.lock", key); spin_lock_init(&obj->vma.lock); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h index d0ae834d787a..d9cef56533ca 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h @@ -16,6 +16,32 @@ #include "i915_gem_gtt.h" #include "i915_vma_types.h" +/* + * XXX: There is a prevalence of the assumption that we fit the + * object's page count inside a 32bit _signed_ variable. Let's document + * this and catch if we ever need to fix it. In the meantime, if you do + * spot such a local variable, please consider fixing! + * + * Aside from our own locals (for which we have no excuse!): + * - sg_table embeds unsigned int for num_pages + * - get_user_pages*() mixed ints with longs + */ +#define GEM_CHECK_SIZE_OVERFLOW(sz) \ + GEM_WARN_ON((sz) >> PAGE_SHIFT > INT_MAX) + +static inline bool i915_gem_object_size_2big(u64 size) +{ + struct drm_i915_gem_object *obj; + + if (size >> PAGE_SHIFT > INT_MAX) + return true; + + if (overflows_type(size, obj->base.size)) + return true; + + return false; +} + void i915_gem_init__objects(struct drm_i915_private *i915); struct drm_i915_gem_object *i915_gem_object_alloc(void); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_region.c b/drivers/gpu/drm/i915/gem/i915_gem_region.c index 3e3dad22a683..77dfa908f156 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_region.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_region.c @@ -161,17 +161,7 @@ i915_gem_object_create_region(struct intel_memory_region *mem, GEM_BUG_ON(!size); GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_MIN_ALIGNMENT)); - /* - * XXX: There is a prevalence of the assumption that we fit the - * object's page count inside a 32bit _signed_ variable. Let's document - * this and catch if we ever need to fix it. In the meantime, if you do - * spot such a local variable, please consider fixing! - */ - - if (size >> PAGE_SHIFT > INT_MAX) - return ERR_PTR(-E2BIG); - - if (overflows_type(size, obj->base.size)) + if (i915_gem_object_size_2big(size)) return ERR_PTR(-E2BIG); obj = i915_gem_object_alloc(); diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c index f2eaed6aca3d..3e4785c2dfa2 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c @@ -770,21 +770,7 @@ i915_gem_userptr_ioctl(struct drm_device *dev, I915_USERPTR_UNSYNCHRONIZED)) return -EINVAL; - /* - * XXX: There is a prevalence of the assumption that we fit the - * object's page count inside a 32bit _signed_ variable. Let's document - * this and catch if we ever need to fix it. In the meantime, if you do - * spot such a local variable, please consider fixing! - * - * Aside from our own locals (for which we have no excuse!): - * - sg_table embeds unsigned int for num_pages - * - get_user_pages*() mixed ints with longs - */ - - if (args->user_size >> PAGE_SHIFT > INT_MAX) - return -E2BIG; - - if (overflows_type(args->user_size, obj->base.size)) + if (i915_gem_object_size_2big(args->user_size)) return -E2BIG; if (!args->user_size) -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: consolidate 2big error checking for object sizes 2021-01-22 17:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: consolidate 2big error checking for object sizes Matthew Auld @ 2021-01-22 17:43 ` Chris Wilson 2021-01-22 17:54 ` Matthew Auld 0 siblings, 1 reply; 9+ messages in thread From: Chris Wilson @ 2021-01-22 17:43 UTC (permalink / raw) To: Matthew Auld, intel-gfx Quoting Matthew Auld (2021-01-22 17:35:46) > Throw it into a simple helper, and throw a warning if we encounter an > object which has been initialised with an object size that exceeds our > limit of INT_MAX pages. > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > --- > drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 9 +------ > drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 ++ > drivers/gpu/drm/i915/gem/i915_gem_object.h | 26 +++++++++++++++++++++ > drivers/gpu/drm/i915/gem/i915_gem_region.c | 12 +--------- > drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 16 +------------ > 5 files changed, 31 insertions(+), 34 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c > index dc11497f830b..5cc8a0b2387f 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c > @@ -244,14 +244,7 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev, > } > } > > - /* > - * XXX: There is a prevalence of the assumption that we fit the > - * object's page count inside a 32bit _signed_ variable. Let's document > - * this and catch if we ever need to fix it. In the meantime, if you do > - * spot such a local variable, please consider fixing! > - */ > - > - if (dma_buf->size >> PAGE_SHIFT > INT_MAX) > + if (i915_gem_object_size_2big(dma_buf->size)) > return ERR_PTR(-E2BIG); > > /* need to attach */ > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c > index 70f798405f7f..d3702ea8c6aa 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c > @@ -62,6 +62,8 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, > const struct drm_i915_gem_object_ops *ops, > struct lock_class_key *key) > { > + GEM_CHECK_SIZE_OVERFLOW(obj->base.size); > + > __mutex_init(&obj->mm.lock, ops->name ?: "obj->mm.lock", key); > > spin_lock_init(&obj->vma.lock); > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h > index d0ae834d787a..d9cef56533ca 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h > @@ -16,6 +16,32 @@ > #include "i915_gem_gtt.h" > #include "i915_vma_types.h" > > +/* > + * XXX: There is a prevalence of the assumption that we fit the > + * object's page count inside a 32bit _signed_ variable. Let's document > + * this and catch if we ever need to fix it. In the meantime, if you do > + * spot such a local variable, please consider fixing! > + * > + * Aside from our own locals (for which we have no excuse!): > + * - sg_table embeds unsigned int for num_pages > + * - get_user_pages*() mixed ints with longs > + */ > +#define GEM_CHECK_SIZE_OVERFLOW(sz) \ > + GEM_WARN_ON((sz) >> PAGE_SHIFT > INT_MAX) > + > +static inline bool i915_gem_object_size_2big(u64 size) > +{ > + struct drm_i915_gem_object *obj; > + > + if (size >> PAGE_SHIFT > INT_MAX) > + return true; Macro here^ Make it easy to grep, everybody gets a warning as a reminder to fix it. And a prize to whoever does manage to trigger the warning. > + > + if (overflows_type(size, obj->base.size)) > + return true; > + > + return false; > +} _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: consolidate 2big error checking for object sizes 2021-01-22 17:43 ` Chris Wilson @ 2021-01-22 17:54 ` Matthew Auld 2021-01-22 17:59 ` Chris Wilson 0 siblings, 1 reply; 9+ messages in thread From: Matthew Auld @ 2021-01-22 17:54 UTC (permalink / raw) To: Chris Wilson; +Cc: Intel Graphics Development, Matthew Auld On Fri, 22 Jan 2021 at 17:43, Chris Wilson <chris@chris-wilson.co.uk> wrote: > > Quoting Matthew Auld (2021-01-22 17:35:46) > > Throw it into a simple helper, and throw a warning if we encounter an > > object which has been initialised with an object size that exceeds our > > limit of INT_MAX pages. > > > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > > --- > > drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 9 +------ > > drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 ++ > > drivers/gpu/drm/i915/gem/i915_gem_object.h | 26 +++++++++++++++++++++ > > drivers/gpu/drm/i915/gem/i915_gem_region.c | 12 +--------- > > drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 16 +------------ > > 5 files changed, 31 insertions(+), 34 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c > > index dc11497f830b..5cc8a0b2387f 100644 > > --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c > > @@ -244,14 +244,7 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev, > > } > > } > > > > - /* > > - * XXX: There is a prevalence of the assumption that we fit the > > - * object's page count inside a 32bit _signed_ variable. Let's document > > - * this and catch if we ever need to fix it. In the meantime, if you do > > - * spot such a local variable, please consider fixing! > > - */ > > - > > - if (dma_buf->size >> PAGE_SHIFT > INT_MAX) > > + if (i915_gem_object_size_2big(dma_buf->size)) > > return ERR_PTR(-E2BIG); > > > > /* need to attach */ > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c > > index 70f798405f7f..d3702ea8c6aa 100644 > > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c > > @@ -62,6 +62,8 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, > > const struct drm_i915_gem_object_ops *ops, > > struct lock_class_key *key) > > { > > + GEM_CHECK_SIZE_OVERFLOW(obj->base.size); > > + > > __mutex_init(&obj->mm.lock, ops->name ?: "obj->mm.lock", key); > > > > spin_lock_init(&obj->vma.lock); > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h > > index d0ae834d787a..d9cef56533ca 100644 > > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h > > @@ -16,6 +16,32 @@ > > #include "i915_gem_gtt.h" > > #include "i915_vma_types.h" > > > > +/* > > + * XXX: There is a prevalence of the assumption that we fit the > > + * object's page count inside a 32bit _signed_ variable. Let's document > > + * this and catch if we ever need to fix it. In the meantime, if you do > > + * spot such a local variable, please consider fixing! > > + * > > + * Aside from our own locals (for which we have no excuse!): > > + * - sg_table embeds unsigned int for num_pages > > + * - get_user_pages*() mixed ints with longs > > + */ > > +#define GEM_CHECK_SIZE_OVERFLOW(sz) \ > > + GEM_WARN_ON((sz) >> PAGE_SHIFT > INT_MAX) > > + > > +static inline bool i915_gem_object_size_2big(u64 size) > > +{ > > + struct drm_i915_gem_object *obj; > > + > > + if (size >> PAGE_SHIFT > INT_MAX) > > + return true; > > Macro here^ > > Make it easy to grep, everybody gets a warning as a reminder to fix it. > And a prize to whoever does manage to trigger the warning. But this code is user triggable, like with igt("create-massive")? What am I missing? > > > + > > + if (overflows_type(size, obj->base.size)) > > + return true; > > + > > + return false; > > +} > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: consolidate 2big error checking for object sizes 2021-01-22 17:54 ` Matthew Auld @ 2021-01-22 17:59 ` Chris Wilson 0 siblings, 0 replies; 9+ messages in thread From: Chris Wilson @ 2021-01-22 17:59 UTC (permalink / raw) To: Matthew Auld; +Cc: Intel Graphics Development, Matthew Auld Quoting Matthew Auld (2021-01-22 17:54:16) > On Fri, 22 Jan 2021 at 17:43, Chris Wilson <chris@chris-wilson.co.uk> wrote: > > > > Quoting Matthew Auld (2021-01-22 17:35:46) > > > Throw it into a simple helper, and throw a warning if we encounter an > > > object which has been initialised with an object size that exceeds our > > > limit of INT_MAX pages. > > > > > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > > > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > > > --- > > > drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 9 +------ > > > drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 ++ > > > drivers/gpu/drm/i915/gem/i915_gem_object.h | 26 +++++++++++++++++++++ > > > drivers/gpu/drm/i915/gem/i915_gem_region.c | 12 +--------- > > > drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 16 +------------ > > > 5 files changed, 31 insertions(+), 34 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c > > > index dc11497f830b..5cc8a0b2387f 100644 > > > --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c > > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c > > > @@ -244,14 +244,7 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev, > > > } > > > } > > > > > > - /* > > > - * XXX: There is a prevalence of the assumption that we fit the > > > - * object's page count inside a 32bit _signed_ variable. Let's document > > > - * this and catch if we ever need to fix it. In the meantime, if you do > > > - * spot such a local variable, please consider fixing! > > > - */ > > > - > > > - if (dma_buf->size >> PAGE_SHIFT > INT_MAX) > > > + if (i915_gem_object_size_2big(dma_buf->size)) > > > return ERR_PTR(-E2BIG); > > > > > > /* need to attach */ > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c > > > index 70f798405f7f..d3702ea8c6aa 100644 > > > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c > > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c > > > @@ -62,6 +62,8 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, > > > const struct drm_i915_gem_object_ops *ops, > > > struct lock_class_key *key) > > > { > > > + GEM_CHECK_SIZE_OVERFLOW(obj->base.size); > > > + > > > __mutex_init(&obj->mm.lock, ops->name ?: "obj->mm.lock", key); > > > > > > spin_lock_init(&obj->vma.lock); > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h > > > index d0ae834d787a..d9cef56533ca 100644 > > > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h > > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h > > > @@ -16,6 +16,32 @@ > > > #include "i915_gem_gtt.h" > > > #include "i915_vma_types.h" > > > > > > +/* > > > + * XXX: There is a prevalence of the assumption that we fit the > > > + * object's page count inside a 32bit _signed_ variable. Let's document > > > + * this and catch if we ever need to fix it. In the meantime, if you do > > > + * spot such a local variable, please consider fixing! > > > + * > > > + * Aside from our own locals (for which we have no excuse!): > > > + * - sg_table embeds unsigned int for num_pages > > > + * - get_user_pages*() mixed ints with longs > > > + */ > > > +#define GEM_CHECK_SIZE_OVERFLOW(sz) \ > > > + GEM_WARN_ON((sz) >> PAGE_SHIFT > INT_MAX) > > > + > > > +static inline bool i915_gem_object_size_2big(u64 size) > > > +{ > > > + struct drm_i915_gem_object *obj; > > > + > > > + if (size >> PAGE_SHIFT > INT_MAX) > > > + return true; > > > > Macro here^ > > > > Make it easy to grep, everybody gets a warning as a reminder to fix it. > > And a prize to whoever does manage to trigger the warning. > > But this code is user triggable, like with igt("create-massive")? What > am I missing? GEM_WARN_ON() only emits a warning in debug builds, and we try very hard not to let that be enabled in production. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/dmabuf: don't trust the dma_buf->size 2021-01-22 17:35 [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: don't trust the dma_buf->size Matthew Auld 2021-01-22 17:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: consolidate 2big error checking for object sizes Matthew Auld @ 2021-01-22 21:06 ` Patchwork 2021-01-23 4:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2021-01-22 21:06 UTC (permalink / raw) To: Matthew Auld; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 2594 bytes --] == Series Details == Series: series starting with [1/2] drm/i915/dmabuf: don't trust the dma_buf->size URL : https://patchwork.freedesktop.org/series/86191/ State : success == Summary == CI Bug Log - changes from CI_DRM_9670 -> Patchwork_19465 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/index.html Known issues ------------ Here are the changes found in Patchwork_19465 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@prime_vgem@basic-gtt: - fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/fi-tgl-y/igt@prime_vgem@basic-gtt.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/fi-tgl-y/igt@prime_vgem@basic-gtt.html #### Possible fixes #### * igt@vgem_basic@setversion: - fi-tgl-y: [DMESG-WARN][3] ([i915#402]) -> [PASS][4] +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/fi-tgl-y/igt@vgem_basic@setversion.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/fi-tgl-y/igt@vgem_basic@setversion.html #### Warnings #### * igt@debugfs_test@read_all_entries: - fi-tgl-y: [DMESG-WARN][5] ([i915#402]) -> [DMESG-WARN][6] ([i915#1982] / [i915#402]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/fi-tgl-y/igt@debugfs_test@read_all_entries.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/fi-tgl-y/igt@debugfs_test@read_all_entries.html [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 Participating hosts (41 -> 37) ------------------------------ Missing (4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u Build changes ------------- * Linux: CI_DRM_9670 -> Patchwork_19465 CI-20190529: 20190529 CI_DRM_9670: 85fd189b9fbfb6e7af8d956d37be012fdd6ae0ad @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5964: 0949766cb9846d7d55fac9cdf31d3d8e8ed1d0c6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19465: 41343541a581dd3cbf09c831e5b1004a68de375d @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 41343541a581 drm/i915: consolidate 2big error checking for object sizes 3ca6a40fc60c drm/i915/dmabuf: don't trust the dma_buf->size == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/index.html [-- Attachment #1.2: Type: text/html, Size: 3450 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/dmabuf: don't trust the dma_buf->size 2021-01-22 17:35 [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: don't trust the dma_buf->size Matthew Auld 2021-01-22 17:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: consolidate 2big error checking for object sizes Matthew Auld 2021-01-22 21:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/dmabuf: don't trust the dma_buf->size Patchwork @ 2021-01-23 4:39 ` Patchwork 2 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2021-01-23 4:39 UTC (permalink / raw) To: Matthew Auld; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 19832 bytes --] == Series Details == Series: series starting with [1/2] drm/i915/dmabuf: don't trust the dma_buf->size URL : https://patchwork.freedesktop.org/series/86191/ State : success == Summary == CI Bug Log - changes from CI_DRM_9670_full -> Patchwork_19465_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_19465_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_fair@basic-deadline: - shard-kbl: [PASS][1] -> [FAIL][2] ([i915#2846]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-kbl3/igt@gem_exec_fair@basic-deadline.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-kbl4/igt@gem_exec_fair@basic-deadline.html - shard-glk: [PASS][3] -> [FAIL][4] ([i915#2846]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-glk7/igt@gem_exec_fair@basic-deadline.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-glk6/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [PASS][5] -> [FAIL][6] ([i915#2842]) +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html * igt@gem_exec_fair@basic-none@rcs0: - shard-kbl: [PASS][7] -> [FAIL][8] ([i915#2842]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-kbl2/igt@gem_exec_fair@basic-none@rcs0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-kbl4/igt@gem_exec_fair@basic-none@rcs0.html * igt@gem_exec_fair@basic-none@vecs0: - shard-apl: [PASS][9] -> [FAIL][10] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-apl4/igt@gem_exec_fair@basic-none@vecs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-apl4/igt@gem_exec_fair@basic-none@vecs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-iclb: NOTRUN -> [FAIL][11] ([i915#2842]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-iclb2/igt@gem_exec_fair@basic-pace@vcs1.html * igt@gem_exec_schedule@u-fairslice@rcs0: - shard-skl: [PASS][12] -> [DMESG-WARN][13] ([i915#1610] / [i915#2803]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl1/igt@gem_exec_schedule@u-fairslice@rcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl9/igt@gem_exec_schedule@u-fairslice@rcs0.html * igt@gem_spin_batch@spin-each: - shard-skl: [PASS][14] -> [FAIL][15] ([i915#2898]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl4/igt@gem_spin_batch@spin-each.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl4/igt@gem_spin_batch@spin-each.html * igt@i915_pm_dc@dc6-dpms: - shard-skl: NOTRUN -> [FAIL][16] ([i915#454]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl3/igt@i915_pm_dc@dc6-dpms.html * igt@i915_selftest@live@late_gt_pm: - shard-skl: NOTRUN -> [INCOMPLETE][17] ([i915#198]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl8/igt@i915_selftest@live@late_gt_pm.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-apl: [PASS][18] -> [FAIL][19] ([i915#2521]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-apl2/igt@kms_async_flips@alternate-sync-async-flip.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-apl7/igt@kms_async_flips@alternate-sync-async-flip.html * igt@kms_color_chamelium@pipe-invalid-degamma-lut-sizes: - shard-skl: NOTRUN -> [SKIP][20] ([fdo#109271] / [fdo#111827]) +7 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl3/igt@kms_color_chamelium@pipe-invalid-degamma-lut-sizes.html * igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#54]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl7/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl5/igt@kms_cursor_crc@pipe-b-cursor-64x64-offscreen.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-skl: [PASS][23] -> [FAIL][24] ([i915#2346]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_cursor_legacy@pipe-a-single-move: - shard-skl: NOTRUN -> [DMESG-WARN][25] ([i915#1982]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl3/igt@kms_cursor_legacy@pipe-a-single-move.html * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible: - shard-skl: NOTRUN -> [SKIP][26] ([fdo#109271]) +47 similar issues [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl4/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1: - shard-tglb: [PASS][27] -> [FAIL][28] ([i915#2598]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-tglb6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-tglb8/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html * igt@kms_flip@flip-vs-expired-vblank@c-edp1: - shard-skl: [PASS][29] -> [FAIL][30] ([i915#79]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html * igt@kms_flip@plain-flip-ts-check@a-edp1: - shard-skl: [PASS][31] -> [FAIL][32] ([i915#2122]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl1/igt@kms_flip@plain-flip-ts-check@a-edp1.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl9/igt@kms_flip@plain-flip-ts-check@a-edp1.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - shard-kbl: [PASS][33] -> [DMESG-WARN][34] ([i915#180]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [PASS][35] -> [FAIL][36] ([fdo#108145] / [i915#265]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: - shard-skl: NOTRUN -> [FAIL][37] ([fdo#108145] / [i915#265]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html * igt@kms_psr@psr2_sprite_mmap_gtt: - shard-iclb: [PASS][38] -> [SKIP][39] ([fdo#109441]) +1 similar issue [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-iclb6/igt@kms_psr@psr2_sprite_mmap_gtt.html * igt@perf@polling-parameterized: - shard-iclb: [PASS][40] -> [FAIL][41] ([i915#1542]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-iclb1/igt@perf@polling-parameterized.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-iclb8/igt@perf@polling-parameterized.html #### Possible fixes #### * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [FAIL][42] ([i915#2842]) -> [PASS][43] +2 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-kbl2/igt@gem_exec_fair@basic-none@vcs0.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-kbl4/igt@gem_exec_fair@basic-none@vcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-tglb: [FAIL][44] ([i915#2842]) -> [PASS][45] [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-tglb3/igt@gem_exec_fair@basic-pace-solo@rcs0.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-tglb5/igt@gem_exec_fair@basic-pace-solo@rcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-glk: [FAIL][46] ([i915#2842]) -> [PASS][47] +1 similar issue [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-glk4/igt@gem_exec_fair@basic-throttle@rcs0.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-glk9/igt@gem_exec_fair@basic-throttle@rcs0.html - shard-iclb: [FAIL][48] ([i915#2849]) -> [PASS][49] [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-iclb4/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_exec_whisper@basic-queues: - shard-glk: [DMESG-WARN][50] ([i915#118] / [i915#95]) -> [PASS][51] [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-glk7/igt@gem_exec_whisper@basic-queues.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-glk6/igt@gem_exec_whisper@basic-queues.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [SKIP][52] ([i915#2190]) -> [PASS][53] [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-tglb6/igt@gem_huc_copy@huc-copy.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-tglb2/igt@gem_huc_copy@huc-copy.html * igt@i915_selftest@live@execlists: - shard-skl: [INCOMPLETE][54] ([CI#80] / [i915#1037]) -> [PASS][55] [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl7/igt@i915_selftest@live@execlists.html [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl8/igt@i915_selftest@live@execlists.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-skl: [FAIL][56] ([i915#2521]) -> [PASS][57] [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl6/igt@kms_async_flips@alternate-sync-async-flip.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl6/igt@kms_async_flips@alternate-sync-async-flip.html * igt@kms_cursor_crc@pipe-c-cursor-64x64-random: - shard-skl: [FAIL][58] ([i915#54]) -> [PASS][59] +7 similar issues [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl9/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl7/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html * igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1: - shard-skl: [DMESG-WARN][60] ([i915#1982]) -> [PASS][61] +1 similar issue [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl7/igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1.html [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl8/igt@kms_flip@flip-vs-dpms-off-vs-modeset-interruptible@a-edp1.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-skl: [FAIL][62] ([i915#79]) -> [PASS][63] +1 similar issue [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1: - shard-skl: [FAIL][64] ([i915#2122]) -> [PASS][65] +3 similar issues [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-skl: [INCOMPLETE][66] ([i915#198]) -> [PASS][67] [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html * igt@kms_psr@psr2_primary_page_flip: - shard-iclb: [SKIP][68] ([fdo#109441]) -> [PASS][69] +1 similar issue [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-iclb4/igt@kms_psr@psr2_primary_page_flip.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html #### Warnings #### * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-iclb: [FAIL][70] ([i915#2852]) -> [FAIL][71] ([i915#2842]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-iclb8/igt@gem_exec_fair@basic-none-rrul@rcs0.html [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-iclb5/igt@gem_exec_fair@basic-none-rrul@rcs0.html * igt@i915_pm_rc6_residency@rc6-idle: - shard-iclb: [WARN][72] ([i915#1804] / [i915#2684]) -> [WARN][73] ([i915#2681] / [i915#2684]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html * igt@i915_pm_rpm@system-suspend-execbuf: - shard-kbl: [INCOMPLETE][74] ([i915#151] / [i915#155]) -> [INCOMPLETE][75] ([i915#151]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-kbl3/igt@i915_pm_rpm@system-suspend-execbuf.html [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-kbl4/igt@i915_pm_rpm@system-suspend-execbuf.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3: - shard-iclb: [SKIP][76] ([i915#658]) -> [SKIP][77] ([i915#2920]) +1 similar issue [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-iclb6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1: - shard-iclb: [SKIP][78] ([i915#2920]) -> [SKIP][79] ([i915#658]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-iclb6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html * igt@runner@aborted: - shard-kbl: [FAIL][80] ([i915#2295]) -> ([FAIL][81], [FAIL][82]) ([i915#1814] / [i915#2295]) [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-kbl2/igt@runner@aborted.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-kbl7/igt@runner@aborted.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-kbl1/igt@runner@aborted.html - shard-skl: ([FAIL][83], [FAIL][84]) ([i915#1436] / [i915#2295]) -> ([FAIL][85], [FAIL][86], [FAIL][87]) ([i915#1436] / [i915#2295] / [i915#2426]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl8/igt@runner@aborted.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9670/shard-skl3/igt@runner@aborted.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl9/igt@runner@aborted.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl1/igt@runner@aborted.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/shard-skl10/igt@runner@aborted.html [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1037]: https://gitlab.freedesktop.org/drm/intel/issues/1037 [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151 [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542 [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155 [i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804 [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814 [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426 [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521 [i915#2598]: https://gitlab.freedesktop.org/drm/intel/issues/2598 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681 [i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684 [i915#2803]: https://gitlab.freedesktop.org/drm/intel/issues/2803 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846 [i915#2849]: https://gitlab.freedesktop.org/drm/intel/issues/2849 [i915#2852]: https://gitlab.freedesktop.org/drm/intel/issues/2852 [i915#2898]: https://gitlab.freedesktop.org/drm/intel/issues/2898 [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_9670 -> Patchwork_19465 CI-20190529: 20190529 CI_DRM_9670: 85fd189b9fbfb6e7af8d956d37be012fdd6ae0ad @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5964: 0949766cb9846d7d55fac9cdf31d3d8e8ed1d0c6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_19465: 41343541a581dd3cbf09c831e5b1004a68de375d @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19465/index.html [-- Attachment #1.2: Type: text/html, Size: 23249 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: don't trust the dma_buf->size @ 2021-01-22 18:15 Matthew Auld 2021-01-22 18:24 ` Chris Wilson 0 siblings, 1 reply; 9+ messages in thread From: Matthew Auld @ 2021-01-22 18:15 UTC (permalink / raw) To: intel-gfx At least for the time being, we need to limit our object sizes such that the number of pages can fit within a 32b signed int. It looks like we should also apply the same restriction to any imported dma-buf. Signed-off-by: Matthew Auld <matthew.auld@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c index 04e9c04545ad..dc11497f830b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c @@ -244,6 +244,16 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev, } } + /* + * XXX: There is a prevalence of the assumption that we fit the + * object's page count inside a 32bit _signed_ variable. Let's document + * this and catch if we ever need to fix it. In the meantime, if you do + * spot such a local variable, please consider fixing! + */ + + if (dma_buf->size >> PAGE_SHIFT > INT_MAX) + return ERR_PTR(-E2BIG); + /* need to attach */ attach = dma_buf_attach(dma_buf, dev->dev); if (IS_ERR(attach)) -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: don't trust the dma_buf->size 2021-01-22 18:15 [Intel-gfx] [PATCH 1/2] " Matthew Auld @ 2021-01-22 18:24 ` Chris Wilson 0 siblings, 0 replies; 9+ messages in thread From: Chris Wilson @ 2021-01-22 18:24 UTC (permalink / raw) To: Matthew Auld, intel-gfx Quoting Matthew Auld (2021-01-22 18:15:13) > At least for the time being, we need to limit our object sizes such that > the number of pages can fit within a 32b signed int. It looks like we > should also apply the same restriction to any imported dma-buf. > > Signed-off-by: Matthew Auld <matthew.auld@intel.com> From behind the grumbling that we really should have sorted this out by now, Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-01-23 4:39 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-01-22 17:35 [Intel-gfx] [PATCH 1/2] drm/i915/dmabuf: don't trust the dma_buf->size Matthew Auld 2021-01-22 17:35 ` [Intel-gfx] [PATCH 2/2] drm/i915: consolidate 2big error checking for object sizes Matthew Auld 2021-01-22 17:43 ` Chris Wilson 2021-01-22 17:54 ` Matthew Auld 2021-01-22 17:59 ` Chris Wilson 2021-01-22 21:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/dmabuf: don't trust the dma_buf->size Patchwork 2021-01-23 4:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2021-01-22 18:15 [Intel-gfx] [PATCH 1/2] " Matthew Auld 2021-01-22 18:24 ` Chris Wilson
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).