* [Intel-gfx] [PATCH 2/8] drm/i915/selftests: Use a coherent map to setup scratch batch buffers
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
@ 2021-01-25 14:17 ` Chris Wilson
2021-01-27 15:48 ` Matthew Auld
2021-01-25 14:17 ` [Intel-gfx] [PATCH 3/8] drm/i915/selftests: Replace the unbounded set-domain with an explicit wait Chris Wilson
` (8 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2021-01-25 14:17 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
Instead of manipulating the object's cache domain, just use the device
coherent map to write the batch buffer.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
.../drm/i915/gem/selftests/i915_gem_context.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index d3f87dc4eda3..e02299fffe60 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -1622,7 +1622,7 @@ static int read_from_scratch(struct i915_gem_context *ctx,
if (err)
goto out_vm;
- cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ cmd = i915_gem_object_pin_map(obj, I915_MAP_WC);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto out;
@@ -1658,7 +1658,7 @@ static int read_from_scratch(struct i915_gem_context *ctx,
if (err)
goto out_vm;
- cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ cmd = i915_gem_object_pin_map(obj, I915_MAP_WC);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto out;
@@ -1707,15 +1707,17 @@ static int read_from_scratch(struct i915_gem_context *ctx,
i915_vma_unpin(vma);
+ i915_request_get(rq);
i915_request_add(rq);
- i915_gem_object_lock(obj, NULL);
- err = i915_gem_object_set_to_cpu_domain(obj, false);
- i915_gem_object_unlock(obj);
- if (err)
+ if (i915_request_wait(rq, 0, HZ / 5) < 0) {
+ i915_request_put(rq);
+ err = -ETIME;
goto out_vm;
+ }
+ i915_request_put(rq);
- cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
+ cmd = i915_gem_object_pin_map(obj, I915_MAP_WC);
if (IS_ERR(cmd)) {
err = PTR_ERR(cmd);
goto out_vm;
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Intel-gfx] [PATCH 3/8] drm/i915/selftests: Replace the unbounded set-domain with an explicit wait
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
2021-01-25 14:17 ` [Intel-gfx] [PATCH 2/8] drm/i915/selftests: Use a coherent map to setup scratch batch buffers Chris Wilson
@ 2021-01-25 14:17 ` Chris Wilson
2021-01-27 16:00 ` Matthew Auld
2021-01-25 14:17 ` [Intel-gfx] [PATCH 4/8] drm/i915/selftests: Remove redundant set-to-gtt-domain Chris Wilson
` (7 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2021-01-25 14:17 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
After running client_blt, we flush the object by changing its domain.
This causes us to wait forever instead of an bounded wait suitable for
the selftest timeout. So do an explicit wait with a suitable timeout --
which in turn means we have to limit the size of the object/blit to run
within reason.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
.../i915/gem/selftests/i915_gem_client_blt.c | 26 ++++++++++++++-----
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
index 6a674a7994df..175581724d44 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
@@ -23,12 +23,19 @@ static int __igt_client_fill(struct intel_engine_cs *engine)
I915_RND_STATE(prng);
IGT_TIMEOUT(end);
u32 *vaddr;
+ u64 limit;
int err = 0;
+ /* Try to keep the blits within the timeout */
+ limit = min_t(u64, ce->vm->total >> 4,
+ jiffies_to_msecs(i915_selftest.timeout_jiffies) * SZ_2M);
+ if (!limit)
+ limit = SZ_4K;
+
intel_engine_pm_get(engine);
do {
const u32 max_block_size = S16_MAX * PAGE_SIZE;
- u32 sz = min_t(u64, ce->vm->total >> 4, prandom_u32_state(&prng));
+ u32 sz = min_t(u64, limit, prandom_u32_state(&prng));
u32 phys_sz = sz % (max_block_size + 1);
u32 val = prandom_u32_state(&prng);
u32 i;
@@ -73,13 +80,20 @@ static int __igt_client_fill(struct intel_engine_cs *engine)
if (err)
goto err_unpin;
- i915_gem_object_lock(obj, NULL);
- err = i915_gem_object_set_to_cpu_domain(obj, false);
- i915_gem_object_unlock(obj);
- if (err)
+ err = i915_gem_object_wait(obj,
+ I915_WAIT_INTERRUPTIBLE,
+ 2 * i915_selftest.timeout_jiffies);
+ if (err) {
+ pr_err("%s fill %zxB timed out\n",
+ engine->name, obj->base.size);
goto err_unpin;
+ }
- for (i = 0; i < huge_gem_object_phys_size(obj) / sizeof(u32); ++i) {
+ for (i = 0;
+ i < huge_gem_object_phys_size(obj) / sizeof(u32);
+ i += 17) {
+ if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ))
+ clflush(&vaddr[i]);
if (vaddr[i] != val) {
pr_err("vaddr[%u]=%x, expected=%x\n", i,
vaddr[i], val);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Intel-gfx] [PATCH 4/8] drm/i915/selftests: Remove redundant set-to-gtt-domain
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
2021-01-25 14:17 ` [Intel-gfx] [PATCH 2/8] drm/i915/selftests: Use a coherent map to setup scratch batch buffers Chris Wilson
2021-01-25 14:17 ` [Intel-gfx] [PATCH 3/8] drm/i915/selftests: Replace the unbounded set-domain with an explicit wait Chris Wilson
@ 2021-01-25 14:17 ` Chris Wilson
2021-01-27 16:03 ` Matthew Auld
2021-01-25 14:18 ` [Intel-gfx] [PATCH 5/8] drm/i915/selftests: Replace unbound set-domain waits with explicit timeouts Chris Wilson
` (6 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2021-01-25 14:17 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
Since the vma's backing store is flushed upon first creation, remove the
manual calls to set-to-gtt-domain.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
.../gpu/drm/i915/gem/selftests/i915_gem_mman.c | 16 ----------------
drivers/gpu/drm/i915/selftests/i915_vma.c | 6 ------
2 files changed, 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index d429c7643ff2..39293d98f34d 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -104,14 +104,6 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj,
GEM_BUG_ON(i915_gem_object_get_tiling(obj) != tile->tiling);
GEM_BUG_ON(i915_gem_object_get_stride(obj) != tile->stride);
- i915_gem_object_lock(obj, NULL);
- err = i915_gem_object_set_to_gtt_domain(obj, true);
- i915_gem_object_unlock(obj);
- if (err) {
- pr_err("Failed to flush to GTT write domain; err=%d\n", err);
- return err;
- }
-
page = i915_prandom_u32_max_state(npages, prng);
view = compute_partial_view(obj, page, MIN_CHUNK_PAGES);
@@ -189,14 +181,6 @@ static int check_partial_mappings(struct drm_i915_gem_object *obj,
GEM_BUG_ON(i915_gem_object_get_tiling(obj) != tile->tiling);
GEM_BUG_ON(i915_gem_object_get_stride(obj) != tile->stride);
- i915_gem_object_lock(obj, NULL);
- err = i915_gem_object_set_to_gtt_domain(obj, true);
- i915_gem_object_unlock(obj);
- if (err) {
- pr_err("Failed to flush to GTT write domain; err=%d\n", err);
- return err;
- }
-
for_each_prime_number_from(page, 1, npages) {
struct i915_ggtt_view view =
compute_partial_view(obj, page, MIN_CHUNK_PAGES);
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index 1b6125e4c1ac..065a9d82ad5c 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -892,12 +892,6 @@ static int igt_vma_remapped_gtt(void *arg)
unsigned int x, y;
int err;
- i915_gem_object_lock(obj, NULL);
- err = i915_gem_object_set_to_gtt_domain(obj, true);
- i915_gem_object_unlock(obj);
- if (err)
- goto out;
-
vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Intel-gfx] [PATCH 5/8] drm/i915/selftests: Replace unbound set-domain waits with explicit timeouts
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
` (2 preceding siblings ...)
2021-01-25 14:17 ` [Intel-gfx] [PATCH 4/8] drm/i915/selftests: Remove redundant set-to-gtt-domain Chris Wilson
@ 2021-01-25 14:18 ` Chris Wilson
2021-01-27 16:19 ` Matthew Auld
2021-01-25 14:18 ` [Intel-gfx] [PATCH 6/8] drm/i915/selftests: Replace an unbounded set-domain wait with a timeout Chris Wilson
` (5 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2021-01-25 14:18 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
Let's prefer to use explicit request tracking and bounded timeouts in
our selftests.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
.../gpu/drm/i915/gt/selftest_workarounds.c | 106 +++++++-----------
1 file changed, 40 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 37ea46907a7d..0c6372d67084 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -93,56 +93,27 @@ reference_lists_fini(struct intel_gt *gt, struct wa_lists *lists)
intel_wa_list_free(&lists->gt_wa_list);
}
-static struct drm_i915_gem_object *
-read_nonprivs(struct intel_context *ce)
+static struct i915_request *
+read_nonprivs(struct intel_context *ce, struct i915_vma *result)
{
struct intel_engine_cs *engine = ce->engine;
const u32 base = engine->mmio_base;
- struct drm_i915_gem_object *result;
struct i915_request *rq;
- struct i915_vma *vma;
u32 srm, *cs;
int err;
int i;
- result = i915_gem_object_create_internal(engine->i915, PAGE_SIZE);
- if (IS_ERR(result))
- return result;
-
- i915_gem_object_set_cache_coherency(result, I915_CACHE_LLC);
-
- cs = i915_gem_object_pin_map(result, I915_MAP_WB);
- if (IS_ERR(cs)) {
- err = PTR_ERR(cs);
- goto err_obj;
- }
- memset(cs, 0xc5, PAGE_SIZE);
- i915_gem_object_flush_map(result);
- i915_gem_object_unpin_map(result);
-
- vma = i915_vma_instance(result, &engine->gt->ggtt->vm, NULL);
- if (IS_ERR(vma)) {
- err = PTR_ERR(vma);
- goto err_obj;
- }
-
- err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL);
- if (err)
- goto err_obj;
-
rq = intel_context_create_request(ce);
- if (IS_ERR(rq)) {
- err = PTR_ERR(rq);
- goto err_pin;
- }
+ if (IS_ERR(rq))
+ return rq;
- i915_vma_lock(vma);
- err = i915_request_await_object(rq, vma->obj, true);
+ i915_vma_lock(result);
+ err = i915_request_await_object(rq, result->obj, true);
if (err == 0)
- err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
- i915_vma_unlock(vma);
+ err = i915_vma_move_to_active(result, rq, EXEC_OBJECT_WRITE);
+ i915_vma_unlock(result);
if (err)
- goto err_req;
+ goto err_rq;
srm = MI_STORE_REGISTER_MEM | MI_SRM_LRM_GLOBAL_GTT;
if (INTEL_GEN(engine->i915) >= 8)
@@ -151,28 +122,24 @@ read_nonprivs(struct intel_context *ce)
cs = intel_ring_begin(rq, 4 * RING_MAX_NONPRIV_SLOTS);
if (IS_ERR(cs)) {
err = PTR_ERR(cs);
- goto err_req;
+ goto err_rq;
}
for (i = 0; i < RING_MAX_NONPRIV_SLOTS; i++) {
*cs++ = srm;
*cs++ = i915_mmio_reg_offset(RING_FORCE_TO_NONPRIV(base, i));
- *cs++ = i915_ggtt_offset(vma) + sizeof(u32) * i;
+ *cs++ = i915_ggtt_offset(result) + sizeof(u32) * i;
*cs++ = 0;
}
intel_ring_advance(rq, cs);
+ i915_request_get(rq);
i915_request_add(rq);
- i915_vma_unpin(vma);
- return result;
+ return rq;
-err_req:
+err_rq:
i915_request_add(rq);
-err_pin:
- i915_vma_unpin(vma);
-err_obj:
- i915_gem_object_put(result);
return ERR_PTR(err);
}
@@ -203,32 +170,36 @@ print_results(const struct intel_engine_cs *engine, const u32 *results)
static int check_whitelist(struct intel_context *ce)
{
struct intel_engine_cs *engine = ce->engine;
- struct drm_i915_gem_object *results;
- struct intel_wedge_me wedge;
+ struct i915_vma *result;
+ struct i915_request *rq;
+ int err = 0;
u32 *vaddr;
- int err;
int i;
- results = read_nonprivs(ce);
- if (IS_ERR(results))
- return PTR_ERR(results);
+ result = __vm_create_scratch_for_read(&engine->gt->ggtt->vm, PAGE_SIZE);
+ if (IS_ERR(result))
+ return PTR_ERR(result);
- err = 0;
- i915_gem_object_lock(results, NULL);
- intel_wedge_on_timeout(&wedge, engine->gt, HZ / 5) /* safety net! */
- err = i915_gem_object_set_to_cpu_domain(results, false);
- i915_gem_object_unlock(results);
- if (intel_gt_is_wedged(engine->gt))
- err = -EIO;
- if (err)
- goto out_put;
-
- vaddr = i915_gem_object_pin_map(results, I915_MAP_WB);
+ vaddr = i915_gem_object_pin_map(result->obj, I915_MAP_WB);
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto out_put;
}
+ memset(vaddr, 0xc5, PAGE_SIZE);
+ i915_gem_object_flush_map(result->obj);
+
+ rq = read_nonprivs(ce, result);
+ if (IS_ERR(rq)) {
+ err = PTR_ERR(rq);
+ goto out_map;
+ }
+
+ if (i915_request_wait(rq, 0, HZ / 5) < 0) {
+ err = -EIO;
+ goto out_rq;
+ }
+
for (i = 0; i < RING_MAX_NONPRIV_SLOTS; i++) {
u32 expected = get_whitelist_reg(engine, i);
u32 actual = vaddr[i];
@@ -243,9 +214,12 @@ static int check_whitelist(struct intel_context *ce)
}
}
- i915_gem_object_unpin_map(results);
+out_rq:
+ i915_request_put(rq);
+out_map:
+ i915_gem_object_unpin_map(result->obj);
out_put:
- i915_gem_object_put(results);
+ i915_vma_put(result);
return err;
}
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Intel-gfx] [PATCH 6/8] drm/i915/selftests: Replace an unbounded set-domain wait with a timeout
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
` (3 preceding siblings ...)
2021-01-25 14:18 ` [Intel-gfx] [PATCH 5/8] drm/i915/selftests: Replace unbound set-domain waits with explicit timeouts Chris Wilson
@ 2021-01-25 14:18 ` Chris Wilson
2021-01-27 16:06 ` Matthew Auld
2021-01-25 14:18 ` [Intel-gfx] [PATCH 7/8] drm/i915/selftests: Remove redundant set-to-gtt-domain before batch submission Chris Wilson
` (4 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2021-01-25 14:18 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
After the memory-region test completes, it flushes the test by calling
set-to-cpu-domain. Use the igt_flush_test as it includes a timeout,
recovery and reports and error for miscreant tests.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/selftests/intel_memory_region.c | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/intel_memory_region.c b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
index ce7adfa3bca0..c8f27a22e2f9 100644
--- a/drivers/gpu/drm/i915/selftests/intel_memory_region.c
+++ b/drivers/gpu/drm/i915/selftests/intel_memory_region.c
@@ -662,11 +662,10 @@ static int igt_lmem_write_cpu(void *arg)
if (err)
goto out_unpin;
- i915_gem_object_lock(obj, NULL);
- err = i915_gem_object_set_to_wc_domain(obj, true);
- i915_gem_object_unlock(obj);
- if (err)
+ if (igt_flush_test(engine->i915)) {
+ err = -EIO;
goto out_unpin;
+ }
count = ARRAY_SIZE(bytes);
order = i915_random_order(count * count, &prng);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Intel-gfx] [PATCH 7/8] drm/i915/selftests: Remove redundant set-to-gtt-domain before batch submission
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
` (4 preceding siblings ...)
2021-01-25 14:18 ` [Intel-gfx] [PATCH 6/8] drm/i915/selftests: Replace an unbounded set-domain wait with a timeout Chris Wilson
@ 2021-01-25 14:18 ` Chris Wilson
2021-01-27 16:07 ` Matthew Auld
2021-01-25 14:18 ` [Intel-gfx] [PATCH 8/8] drm/i915/gem: Manage all set-domain waits explicitly Chris Wilson
` (3 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2021-01-25 14:18 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
In construction the rpcs_query batch we know that it is device coherent
and ready for execution, the set-to-gtt-domain here is redudant.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index e02299fffe60..df949320f2b5 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -954,8 +954,6 @@ emit_rpcs_query(struct drm_i915_gem_object *obj,
err = i915_gem_object_lock(obj, &ww);
if (!err)
err = i915_gem_object_lock(rpcs, &ww);
- if (!err)
- err = i915_gem_object_set_to_gtt_domain(obj, false);
if (!err)
err = i915_vma_pin_ww(vma, &ww, 0, 0, PIN_USER);
if (err)
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Intel-gfx] [PATCH 8/8] drm/i915/gem: Manage all set-domain waits explicitly
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
` (5 preceding siblings ...)
2021-01-25 14:18 ` [Intel-gfx] [PATCH 7/8] drm/i915/selftests: Remove redundant set-to-gtt-domain before batch submission Chris Wilson
@ 2021-01-25 14:18 ` Chris Wilson
2021-01-25 18:47 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/selftests: Set cache status for huge_gem_object Patchwork
` (2 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2021-01-25 14:18 UTC (permalink / raw)
To: intel-gfx; +Cc: Chris Wilson
Only perform the domain transition under the object lock, and push the
required waits to outside the lock.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 9 +-
drivers/gpu/drm/i915/gem/i915_gem_clflush.h | 2 -
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 4 +-
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 157 +++++-------------
drivers/gpu/drm/i915/gem/i915_gem_object.h | 12 +-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 6 +
.../gpu/drm/i915/gem/selftests/huge_pages.c | 8 -
.../i915/gem/selftests/i915_gem_coherency.c | 30 +++-
.../drm/i915/gem/selftests/i915_gem_phys.c | 8 +-
.../drm/i915/gem/selftests/igt_gem_utils.c | 3 +
drivers/gpu/drm/i915/i915_gem.c | 12 +-
11 files changed, 89 insertions(+), 162 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
index bc0223716906..a28f8c912a3e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
@@ -57,8 +57,6 @@ static struct clflush *clflush_work_create(struct drm_i915_gem_object *obj)
{
struct clflush *clflush;
- GEM_BUG_ON(!obj->cache_dirty);
-
clflush = kmalloc(sizeof(*clflush), GFP_KERNEL);
if (!clflush)
return NULL;
@@ -102,13 +100,10 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
trace_i915_gem_object_clflush(obj);
- clflush = NULL;
- if (!(flags & I915_CLFLUSH_SYNC))
- clflush = clflush_work_create(obj);
+ clflush = clflush_work_create(obj);
if (clflush) {
i915_sw_fence_await_reservation(&clflush->base.chain,
- obj->base.resv, NULL, true,
- i915_fence_timeout(to_i915(obj->base.dev)),
+ obj->base.resv, NULL, true, 0,
I915_FENCE_GFP);
dma_resv_add_excl_fence(obj->base.resv, &clflush->base.dma);
dma_fence_work_commit(&clflush->base);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_clflush.h b/drivers/gpu/drm/i915/gem/i915_gem_clflush.h
index e6c382973129..4cd5787d1507 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_clflush.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_clflush.h
@@ -9,12 +9,10 @@
#include <linux/types.h>
-struct drm_i915_private;
struct drm_i915_gem_object;
bool i915_gem_clflush_object(struct drm_i915_gem_object *obj,
unsigned int flags);
#define I915_CLFLUSH_FORCE BIT(0)
-#define I915_CLFLUSH_SYNC BIT(1)
#endif /* __I915_GEM_CLFLUSH_H__ */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index 5cc8a0b2387f..d804b0003e0d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -133,7 +133,7 @@ static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_dire
if (err)
goto out;
- err = i915_gem_object_set_to_cpu_domain(obj, write);
+ i915_gem_object_set_to_cpu_domain(obj, write);
i915_gem_object_unlock(obj);
out:
@@ -154,7 +154,7 @@ static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direct
if (err)
goto out;
- err = i915_gem_object_set_to_gtt_domain(obj, false);
+ i915_gem_object_set_to_gtt_domain(obj, false);
i915_gem_object_unlock(obj);
out:
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 36f54cedaaeb..0478b069c202 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -49,7 +49,7 @@ flush_write_domain(struct drm_i915_gem_object *obj, unsigned int flush_domains)
break;
case I915_GEM_DOMAIN_CPU:
- i915_gem_clflush_object(obj, I915_CLFLUSH_SYNC);
+ i915_gem_clflush_object(obj, 0);
break;
case I915_GEM_DOMAIN_RENDER:
@@ -97,34 +97,13 @@ void i915_gem_object_flush_if_display_locked(struct drm_i915_gem_object *obj)
* This function returns when the move is complete, including waiting on
* flushes to occur.
*/
-int
+void
i915_gem_object_set_to_wc_domain(struct drm_i915_gem_object *obj, bool write)
{
- int ret;
-
assert_object_held(obj);
- ret = i915_gem_object_wait(obj,
- I915_WAIT_INTERRUPTIBLE |
- (write ? I915_WAIT_ALL : 0),
- MAX_SCHEDULE_TIMEOUT);
- if (ret)
- return ret;
-
if (obj->write_domain == I915_GEM_DOMAIN_WC)
- return 0;
-
- /* Flush and acquire obj->pages so that we are coherent through
- * direct access in memory with previous cached writes through
- * shmemfs and that our cache domain tracking remains valid.
- * For example, if the obj->filp was moved to swap without us
- * being notified and releasing the pages, we would mistakenly
- * continue to assume that the obj remained out of the CPU cached
- * domain.
- */
- ret = i915_gem_object_pin_pages(obj);
- if (ret)
- return ret;
+ return;
flush_write_domain(obj, ~I915_GEM_DOMAIN_WC);
@@ -145,9 +124,6 @@ i915_gem_object_set_to_wc_domain(struct drm_i915_gem_object *obj, bool write)
obj->write_domain = I915_GEM_DOMAIN_WC;
obj->mm.dirty = true;
}
-
- i915_gem_object_unpin_pages(obj);
- return 0;
}
/**
@@ -158,34 +134,13 @@ i915_gem_object_set_to_wc_domain(struct drm_i915_gem_object *obj, bool write)
* This function returns when the move is complete, including waiting on
* flushes to occur.
*/
-int
+void
i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
{
- int ret;
-
assert_object_held(obj);
- ret = i915_gem_object_wait(obj,
- I915_WAIT_INTERRUPTIBLE |
- (write ? I915_WAIT_ALL : 0),
- MAX_SCHEDULE_TIMEOUT);
- if (ret)
- return ret;
-
if (obj->write_domain == I915_GEM_DOMAIN_GTT)
- return 0;
-
- /* Flush and acquire obj->pages so that we are coherent through
- * direct access in memory with previous cached writes through
- * shmemfs and that our cache domain tracking remains valid.
- * For example, if the obj->filp was moved to swap without us
- * being notified and releasing the pages, we would mistakenly
- * continue to assume that the obj remained out of the CPU cached
- * domain.
- */
- ret = i915_gem_object_pin_pages(obj);
- if (ret)
- return ret;
+ return;
flush_write_domain(obj, ~I915_GEM_DOMAIN_GTT);
@@ -214,9 +169,6 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
i915_vma_set_ggtt_write(vma);
spin_unlock(&obj->vma.lock);
}
-
- i915_gem_object_unpin_pages(obj);
- return 0;
}
/**
@@ -442,25 +394,23 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
* This function returns when the move is complete, including waiting on
* flushes to occur.
*/
-int
+void
i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
{
- int ret;
-
assert_object_held(obj);
- ret = i915_gem_object_wait(obj,
- I915_WAIT_INTERRUPTIBLE |
- (write ? I915_WAIT_ALL : 0),
- MAX_SCHEDULE_TIMEOUT);
- if (ret)
- return ret;
-
flush_write_domain(obj, ~I915_GEM_DOMAIN_CPU);
/* Flush the CPU cache if it's still invalid. */
if ((obj->read_domains & I915_GEM_DOMAIN_CPU) == 0) {
- i915_gem_clflush_object(obj, I915_CLFLUSH_SYNC);
+ /*
+ * While we track when we write though the CPU cache
+ * (with obj->cache_dirty), this is only a guide as we do
+ * not know when the CPU may have speculatively populated
+ * the cache. We have to invalidate such speculative cachelines
+ * prior to reading writes by the GPU.
+ */
+ i915_gem_clflush_object(obj, 0);
obj->read_domains |= I915_GEM_DOMAIN_CPU;
}
@@ -474,8 +424,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
*/
if (write)
__start_cpu_write(obj);
-
- return 0;
}
/**
@@ -513,19 +461,6 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
if (!obj)
return -ENOENT;
- /*
- * Try to flush the object off the GPU without holding the lock.
- * We will repeat the flush holding the lock in the normal manner
- * to catch cases where we are gazumped.
- */
- err = i915_gem_object_wait(obj,
- I915_WAIT_INTERRUPTIBLE |
- I915_WAIT_PRIORITY |
- (write_domain ? I915_WAIT_ALL : 0),
- MAX_SCHEDULE_TIMEOUT);
- if (err)
- goto out;
-
/*
* Proxy objects do not control access to the backing storage, ergo
* they cannot be used as a means to manipulate the cache domain
@@ -561,21 +496,27 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
* without having to further check the requested write_domain.
*/
if (READ_ONCE(obj->write_domain) == read_domains)
- goto out_unpin;
+ goto out_wait;
err = i915_gem_object_lock_interruptible(obj, NULL);
if (err)
goto out_unpin;
if (read_domains & I915_GEM_DOMAIN_WC)
- err = i915_gem_object_set_to_wc_domain(obj, write_domain);
+ i915_gem_object_set_to_wc_domain(obj, write_domain);
else if (read_domains & I915_GEM_DOMAIN_GTT)
- err = i915_gem_object_set_to_gtt_domain(obj, write_domain);
+ i915_gem_object_set_to_gtt_domain(obj, write_domain);
else
- err = i915_gem_object_set_to_cpu_domain(obj, write_domain);
+ i915_gem_object_set_to_cpu_domain(obj, write_domain);
i915_gem_object_unlock(obj);
+out_wait:
+ err = i915_gem_object_wait(obj,
+ I915_WAIT_INTERRUPTIBLE |
+ I915_WAIT_PRIORITY |
+ (write_domain ? I915_WAIT_ALL : 0),
+ MAX_SCHEDULE_TIMEOUT);
if (write_domain)
i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU);
@@ -602,26 +543,21 @@ int i915_gem_object_prepare_read(struct drm_i915_gem_object *obj,
assert_object_held(obj);
- ret = i915_gem_object_wait(obj,
- I915_WAIT_INTERRUPTIBLE,
- MAX_SCHEDULE_TIMEOUT);
- if (ret)
- return ret;
-
ret = i915_gem_object_pin_pages(obj);
if (ret)
return ret;
if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ ||
- !static_cpu_has(X86_FEATURE_CLFLUSH)) {
- ret = i915_gem_object_set_to_cpu_domain(obj, false);
- if (ret)
- goto err_unpin;
- else
- goto out;
- }
+ !static_cpu_has(X86_FEATURE_CLFLUSH))
+ i915_gem_object_set_to_cpu_domain(obj, false);
+ else
+ flush_write_domain(obj, ~I915_GEM_DOMAIN_CPU);
- flush_write_domain(obj, ~I915_GEM_DOMAIN_CPU);
+ ret = i915_gem_object_wait(obj,
+ I915_WAIT_INTERRUPTIBLE,
+ MAX_SCHEDULE_TIMEOUT);
+ if (ret)
+ goto err_unpin;
/* If we're not in the cpu read domain, set ourself into the gtt
* read domain and manually flush cachelines (if required). This
@@ -632,7 +568,6 @@ int i915_gem_object_prepare_read(struct drm_i915_gem_object *obj,
!(obj->read_domains & I915_GEM_DOMAIN_CPU))
*needs_clflush = CLFLUSH_BEFORE;
-out:
/* return with the pages pinned */
return 0;
@@ -652,27 +587,22 @@ int i915_gem_object_prepare_write(struct drm_i915_gem_object *obj,
assert_object_held(obj);
- ret = i915_gem_object_wait(obj,
- I915_WAIT_INTERRUPTIBLE |
- I915_WAIT_ALL,
- MAX_SCHEDULE_TIMEOUT);
- if (ret)
- return ret;
-
ret = i915_gem_object_pin_pages(obj);
if (ret)
return ret;
if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE ||
- !static_cpu_has(X86_FEATURE_CLFLUSH)) {
- ret = i915_gem_object_set_to_cpu_domain(obj, true);
- if (ret)
- goto err_unpin;
- else
- goto out;
- }
+ !static_cpu_has(X86_FEATURE_CLFLUSH))
+ i915_gem_object_set_to_cpu_domain(obj, true);
+ else
+ flush_write_domain(obj, ~I915_GEM_DOMAIN_CPU);
- flush_write_domain(obj, ~I915_GEM_DOMAIN_CPU);
+ ret = i915_gem_object_wait(obj,
+ I915_WAIT_INTERRUPTIBLE |
+ I915_WAIT_ALL,
+ MAX_SCHEDULE_TIMEOUT);
+ if (ret)
+ goto err_unpin;
/* If we're not in the cpu write domain, set ourself into the
* gtt write domain and manually flush cachelines (as required).
@@ -690,7 +620,6 @@ int i915_gem_object_prepare_write(struct drm_i915_gem_object *obj,
*needs_clflush |= CLFLUSH_BEFORE;
}
-out:
i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU);
obj->mm.dirty = true;
/* return with the pages pinned */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 3411ad197fa6..35a8d90f14f1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -513,12 +513,12 @@ void i915_gem_object_set_cache_coherency(struct drm_i915_gem_object *obj,
void i915_gem_object_flush_if_display(struct drm_i915_gem_object *obj);
void i915_gem_object_flush_if_display_locked(struct drm_i915_gem_object *obj);
-int __must_check
-i915_gem_object_set_to_wc_domain(struct drm_i915_gem_object *obj, bool write);
-int __must_check
-i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write);
-int __must_check
-i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write);
+void i915_gem_object_set_to_wc_domain(struct drm_i915_gem_object *obj,
+ bool write);
+void i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj,
+ bool write);
+void i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj,
+ bool write);
struct i915_vma * __must_check
i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
u32 alignment,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 0438e00d4ca7..0a1fdbac882e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -183,6 +183,12 @@ struct drm_i915_gem_object {
unsigned int cache_coherent:2;
#define I915_BO_CACHE_COHERENT_FOR_READ BIT(0)
#define I915_BO_CACHE_COHERENT_FOR_WRITE BIT(1)
+ /*
+ * Note cache_dirty is only a guide; we know when we have written
+ * through the CPU cache, but we do not know when the CPU may have
+ * speculatively populated the cache. Before a read via the cache
+ * of GPU written memory, we have to cautiously invalidate the cache.
+ */
unsigned int cache_dirty:1;
/**
diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index f6329e462cfc..10ee24b252dd 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -962,14 +962,6 @@ static int gpu_write(struct intel_context *ce,
u32 dw,
u32 val)
{
- int err;
-
- i915_gem_object_lock(vma->obj, NULL);
- err = i915_gem_object_set_to_gtt_domain(vma->obj, true);
- i915_gem_object_unlock(vma->obj);
- if (err)
- return err;
-
return igt_gpu_fill_dw(ce, vma, dw * sizeof(u32),
vma->size >> PAGE_SHIFT, val);
}
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
index 1117d2a44518..b5dbf15570fc 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
@@ -90,8 +90,13 @@ static int gtt_set(struct context *ctx, unsigned long offset, u32 v)
int err = 0;
i915_gem_object_lock(ctx->obj, NULL);
- err = i915_gem_object_set_to_gtt_domain(ctx->obj, true);
+ i915_gem_object_set_to_gtt_domain(ctx->obj, true);
i915_gem_object_unlock(ctx->obj);
+
+ err = i915_gem_object_wait(ctx->obj,
+ I915_WAIT_ALL |
+ I915_WAIT_INTERRUPTIBLE,
+ HZ / 2);
if (err)
return err;
@@ -123,8 +128,12 @@ static int gtt_get(struct context *ctx, unsigned long offset, u32 *v)
int err = 0;
i915_gem_object_lock(ctx->obj, NULL);
- err = i915_gem_object_set_to_gtt_domain(ctx->obj, false);
+ i915_gem_object_set_to_gtt_domain(ctx->obj, false);
i915_gem_object_unlock(ctx->obj);
+
+ err = i915_gem_object_wait(ctx->obj,
+ I915_WAIT_INTERRUPTIBLE,
+ HZ / 2);
if (err)
return err;
@@ -155,8 +164,13 @@ static int wc_set(struct context *ctx, unsigned long offset, u32 v)
int err;
i915_gem_object_lock(ctx->obj, NULL);
- err = i915_gem_object_set_to_wc_domain(ctx->obj, true);
+ i915_gem_object_set_to_wc_domain(ctx->obj, true);
i915_gem_object_unlock(ctx->obj);
+
+ err = i915_gem_object_wait(ctx->obj,
+ I915_WAIT_ALL |
+ I915_WAIT_INTERRUPTIBLE,
+ HZ / 2);
if (err)
return err;
@@ -178,8 +192,12 @@ static int wc_get(struct context *ctx, unsigned long offset, u32 *v)
int err;
i915_gem_object_lock(ctx->obj, NULL);
- err = i915_gem_object_set_to_wc_domain(ctx->obj, false);
+ i915_gem_object_set_to_wc_domain(ctx->obj, false);
i915_gem_object_unlock(ctx->obj);
+
+ err = i915_gem_object_wait(ctx->obj,
+ I915_WAIT_INTERRUPTIBLE,
+ HZ / 2);
if (err)
return err;
@@ -201,9 +219,7 @@ static int gpu_set(struct context *ctx, unsigned long offset, u32 v)
int err;
i915_gem_object_lock(ctx->obj, NULL);
- err = i915_gem_object_set_to_gtt_domain(ctx->obj, true);
- if (err)
- goto out_unlock;
+ i915_gem_object_set_to_gtt_domain(ctx->obj, false);
vma = i915_gem_object_ggtt_pin(ctx->obj, NULL, 0, 0, 0);
if (IS_ERR(vma)) {
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c
index 8cee68c6a6dc..b62d02cb9579 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_phys.c
@@ -45,14 +45,10 @@ static int mock_phys_object(void *arg)
/* Make the object dirty so that put_pages must do copy back the data */
i915_gem_object_lock(obj, NULL);
- err = i915_gem_object_set_to_gtt_domain(obj, true);
+ i915_gem_object_set_to_gtt_domain(obj, true);
i915_gem_object_unlock(obj);
- if (err) {
- pr_err("i915_gem_object_set_to_gtt_domain failed with err=%d\n",
- err);
- goto out_obj;
- }
+ err = 0;
out_obj:
i915_gem_object_put(obj);
out:
diff --git a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
index d6783061bc72..b7e064667d39 100644
--- a/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
+++ b/drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c
@@ -7,6 +7,7 @@
#include "igt_gem_utils.h"
#include "gem/i915_gem_context.h"
+#include "gem/i915_gem_clflush.h"
#include "gem/i915_gem_pm.h"
#include "gt/intel_context.h"
#include "gt/intel_gpu_commands.h"
@@ -138,6 +139,8 @@ int igt_gpu_fill_dw(struct intel_context *ce,
goto skip_request;
i915_vma_lock(vma);
+ if (vma->obj->cache_dirty & ~vma->obj->cache_coherent)
+ i915_gem_clflush_object(vma->obj, 0);
err = i915_request_await_object(rq, vma->obj, true);
if (err == 0)
err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f2f344ecf547..b2e3b5cfccb4 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -306,11 +306,7 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
if (ret)
goto out_unpin;
- ret = i915_gem_object_set_to_gtt_domain(obj, false);
- if (ret) {
- i915_gem_object_unlock(obj);
- goto out_unpin;
- }
+ i915_gem_object_set_to_gtt_domain(obj, false);
fence = i915_gem_object_lock_fence(obj);
i915_gem_object_unlock(obj);
@@ -511,11 +507,7 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
if (ret)
goto out_unpin;
- ret = i915_gem_object_set_to_gtt_domain(obj, true);
- if (ret) {
- i915_gem_object_unlock(obj);
- goto out_unpin;
- }
+ i915_gem_object_set_to_gtt_domain(obj, true);
fence = i915_gem_object_lock_fence(obj);
i915_gem_object_unlock(obj);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/selftests: Set cache status for huge_gem_object
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
` (6 preceding siblings ...)
2021-01-25 14:18 ` [Intel-gfx] [PATCH 8/8] drm/i915/gem: Manage all set-domain waits explicitly Chris Wilson
@ 2021-01-25 18:47 ` Patchwork
2021-01-26 0:06 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-27 15:44 ` [Intel-gfx] [PATCH 1/8] " Matthew Auld
9 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2021-01-25 18:47 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4332 bytes --]
== Series Details ==
Series: series starting with [1/8] drm/i915/selftests: Set cache status for huge_gem_object
URL : https://patchwork.freedesktop.org/series/86261/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9680 -> Patchwork_19489
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19489/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19489:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_psr@cursor_plane_move:
- {fi-rkl-11500t}: NOTRUN -> [SKIP][1] +23 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19489/fi-rkl-11500t/igt@kms_psr@cursor_plane_move.html
Known issues
------------
Here are the changes found in Patchwork_19489 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@nop-compute0:
- fi-tgl-y: NOTRUN -> [SKIP][2] ([fdo#109315] / [i915#2575]) +8 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19489/fi-tgl-y/igt@amdgpu/amd_cs_nop@nop-compute0.html
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9680/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19489/fi-tgl-y/igt@debugfs_test@read_all_entries.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [PASS][5] -> [DMESG-WARN][6] ([i915#262])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9680/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19489/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
#### Possible fixes ####
* igt@gem_linear_blits@basic:
- fi-tgl-y: [DMESG-WARN][7] ([i915#402]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9680/fi-tgl-y/igt@gem_linear_blits@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19489/fi-tgl-y/igt@gem_linear_blits@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (39 -> 36)
------------------------------
Additional (1): fi-rkl-11500t
Missing (4): fi-ctg-p8600 fi-jsl-1 fi-ilk-m540 fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_9680 -> Patchwork_19489
CI-20190529: 20190529
CI_DRM_9680: 9e03236ed9687144929d42404341384cc1e501b7 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5971: abef2b7d6ff30f3b948b3e5d39653debb73083f3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19489: 7ebba2ed04b4e790e44d4669a8d53d6c5a1cc17b @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
7ebba2ed04b4 drm/i915/gem: Manage all set-domain waits explicitly
938797dc9f60 drm/i915/selftests: Remove redundant set-to-gtt-domain before batch submission
3a1cf052b54e drm/i915/selftests: Replace an unbounded set-domain wait with a timeout
f7eab4110dce drm/i915/selftests: Replace unbound set-domain waits with explicit timeouts
2ec5d0f4cb3c drm/i915/selftests: Remove redundant set-to-gtt-domain
72da77628d26 drm/i915/selftests: Replace the unbounded set-domain with an explicit wait
abec5e98c217 drm/i915/selftests: Use a coherent map to setup scratch batch buffers
f410e1fc82a2 drm/i915/selftests: Set cache status for huge_gem_object
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19489/index.html
[-- Attachment #1.2: Type: text/html, Size: 4965 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/8] drm/i915/selftests: Set cache status for huge_gem_object
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
` (7 preceding siblings ...)
2021-01-25 18:47 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/selftests: Set cache status for huge_gem_object Patchwork
@ 2021-01-26 0:06 ` Patchwork
2021-01-27 15:44 ` [Intel-gfx] [PATCH 1/8] " Matthew Auld
9 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2021-01-26 0:06 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30302 bytes --]
== Series Details ==
Series: series starting with [1/8] drm/i915/selftests: Set cache status for huge_gem_object
URL : https://patchwork.freedesktop.org/series/86261/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9680_full -> Patchwork_19489_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19489_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@sysfs_clients@busy@rcs0}:
- shard-glk: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9680/shard-glk8/igt@sysfs_clients@busy@rcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19489/shard-glk7/igt@sysfs_clients@busy@rcs0.html
New tests
---------
New tests have been introduced between CI_DRM_9680_full and Patchwork_19489_full:
### New IGT tests (1749) ###
* igt@core_auth@many-magics:
- Statuses : 6 pass(s)
- Exec time: [0.15, 0.84] s
* igt@core_getclient:
- Statuses : 7 pass(s)
- Exec time: [0.07, 0.23] s
* igt@core_getstats:
- Statuses : 6 pass(s)
- Exec time: [0.07, 0.25] s
* igt@core_getversion:
- Statuses : 7 pass(s)
- Exec time: [0.07, 0.17] s
* igt@core_setmaster_vs_auth:
- Statuses : 7 pass(s)
- Exec time: [0.07, 0.21] s
* igt@debugfs_test@read_all_entries_display_off:
- Statuses : 7 pass(s)
- Exec time: [0.09, 1.13] s
* igt@debugfs_test@read_all_entries_display_on:
- Statuses :
- Exec time: [None] s
* igt@drm_import_export@flink:
- Statuses : 7 pass(s)
- Exec time: [10.74, 10.75] s
* igt@drm_import_export@import-close-race-flink:
- Statuses : 7 pass(s)
- Exec time: [10.74, 10.75] s
* igt@drm_import_export@import-close-race-prime:
- Statuses : 7 pass(s)
- Exec time: [10.74] s
* igt@drm_import_export@prime:
- Statuses : 7 pass(s)
- Exec time: [10.74, 10.75] s
* igt@drm_read@empty-block:
- Statuses : 2 pass(s)
- Exec time: [1.0] s
* igt@drm_read@empty-nonblock:
- Statuses : 6 pass(s)
- Exec time: [0.0] s
* igt@drm_read@fault-buffer:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@drm_read@invalid-buffer:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@drm_read@short-buffer-block:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@drm_read@short-buffer-nonblock:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@dumb_buffer@create-clear:
- Statuses : 7 pass(s)
- Exec time: [36.83, 48.07] s
* igt@dumb_buffer@create-valid-dumb:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@dumb_buffer@invalid-bpp:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@dumb_buffer@map-invalid-size:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@dumb_buffer@map-uaf:
- Statuses : 7 pass(s)
- Exec time: [0.03, 0.10] s
* igt@dumb_buffer@map-valid:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_bad_reloc@negative-reloc-bltcopy:
- Statuses : 7 pass(s)
- Exec time: [0.33, 4.14] s
* igt@gem_blits@basic:
- Statuses : 7 pass(s)
- Exec time: [1.45, 14.38] s
* igt@gem_busy@close-race:
- Statuses : 7 pass(s)
- Exec time: [21.72, 23.43] s
* igt@gem_caching@read-writes:
- Statuses : 7 pass(s)
- Exec time: [4.43, 23.11] s
* igt@gem_caching@reads:
- Statuses : 7 pass(s)
- Exec time: [0.65, 5.83] s
* igt@gem_caching@writes:
- Statuses : 7 pass(s)
- Exec time: [2.29, 13.45] s
* igt@gem_close@basic:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_close@many-handles-one-vma:
- Statuses : 7 pass(s)
- Exec time: [0.02, 0.10] s
* igt@gem_create@create-invalid-size:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_create@create-valid-nonaligned:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_bad_destroy@double-destroy:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_ctx_bad_destroy@invalid-ctx:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_bad_destroy@invalid-default-ctx:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_bad_destroy@invalid-pad:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_ctx_exec@basic-invalid-context:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_ctx_freq@sysfs:
- Statuses : 7 pass(s)
- Exec time: [4.80, 4.97] s
* igt@gem_ctx_param@basic:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@basic-default:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@get-priority-new-ctx:
- Statuses : 5 pass(s) 2 skip(s)
- Exec time: [0.0, 0.00] s
* igt@gem_ctx_param@invalid-ctx-get:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@invalid-ctx-set:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@invalid-param-get:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@invalid-param-set:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@invalid-size-get:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@invalid-size-set:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@non-root-set:
- Statuses : 6 pass(s)
- Exec time: [0.01, 0.04] s
* igt@gem_ctx_param@non-root-set-no-zeromap:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.04] s
* igt@gem_ctx_param@root-set:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@root-set-no-zeromap-disabled:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@root-set-no-zeromap-enabled:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@set-priority-invalid-size:
- Statuses : 5 pass(s) 1 skip(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@set-priority-not-supported:
- Statuses : 2 pass(s) 5 skip(s)
- Exec time: [0.0] s
* igt@gem_ctx_param@set-priority-range:
- Statuses : 5 pass(s) 2 skip(s)
- Exec time: [0.0, 0.07] s
* igt@gem_eio@banned:
- Statuses : 7 pass(s)
- Exec time: [0.05, 0.44] s
* igt@gem_eio@execbuf:
- Statuses : 7 pass(s)
- Exec time: [0.02, 0.05] s
* igt@gem_eio@hibernate:
- Statuses : 7 pass(s)
- Exec time: [12.59, 17.02] s
* igt@gem_eio@in-flight-10ms:
- Statuses : 7 pass(s)
- Exec time: [0.47, 2.36] s
* igt@gem_eio@in-flight-1us:
- Statuses : 7 pass(s)
- Exec time: [0.36, 2.66] s
* igt@gem_eio@in-flight-contexts-10ms:
- Statuses : 7 pass(s)
- Exec time: [1.08, 36.59] s
* igt@gem_eio@in-flight-contexts-1us:
- Statuses : 7 pass(s)
- Exec time: [1.07, 36.48] s
* igt@gem_eio@in-flight-contexts-immediate:
- Statuses : 6 pass(s)
- Exec time: [2.28, 36.24] s
* igt@gem_eio@in-flight-external:
- Statuses : 7 pass(s)
- Exec time: [0.03, 0.25] s
* igt@gem_eio@in-flight-immediate:
- Statuses : 7 pass(s)
- Exec time: [0.36, 2.22] s
* igt@gem_eio@in-flight-internal-10ms:
- Statuses : 7 pass(s)
- Exec time: [0.04, 0.28] s
* igt@gem_eio@in-flight-internal-1us:
- Statuses : 7 pass(s)
- Exec time: [0.03, 0.26] s
* igt@gem_eio@in-flight-internal-immediate:
- Statuses : 7 pass(s)
- Exec time: [0.03, 0.26] s
* igt@gem_eio@in-flight-suspend:
- Statuses : 7 pass(s)
- Exec time: [0.96, 2.69] s
* igt@gem_eio@reset-stress:
- Statuses : 7 pass(s)
- Exec time: [28.45, 38.63] s
* igt@gem_eio@suspend:
- Statuses : 7 pass(s)
- Exec time: [10.98, 12.60] s
* igt@gem_eio@throttle:
- Statuses : 7 pass(s)
- Exec time: [0.02, 0.07] s
* igt@gem_eio@unwedge-stress:
- Statuses : 7 pass(s)
- Exec time: [28.43, 40.07] s
* igt@gem_eio@wait-10ms:
- Statuses : 7 pass(s)
- Exec time: [0.04, 0.17] s
* igt@gem_eio@wait-1us:
- Statuses : 7 pass(s)
- Exec time: [0.03, 0.17] s
* igt@gem_eio@wait-immediate:
- Statuses : 7 pass(s)
- Exec time: [0.03, 0.16] s
* igt@gem_eio@wait-wedge-10ms:
- Statuses : 7 pass(s)
- Exec time: [0.04, 0.27] s
* igt@gem_eio@wait-wedge-1us:
- Statuses : 7 pass(s)
- Exec time: [0.03, 0.26] s
* igt@gem_eio@wait-wedge-immediate:
- Statuses : 7 pass(s)
- Exec time: [0.04, 0.25] s
* igt@gem_exec_alignment@single:
- Statuses :
- Exec time: [None] s
* igt@gem_exec_await@wide-all:
- Statuses : 7 pass(s)
- Exec time: [21.80, 22.54] s
* igt@gem_exec_await@wide-contexts:
- Statuses : 7 pass(s)
- Exec time: [21.61, 22.21] s
* igt@gem_exec_balancer@bonded-chain:
- Statuses : 4 pass(s) 2 skip(s)
- Exec time: [0.0, 7.21] s
* igt@gem_exec_balancer@bonded-semaphore:
- Statuses : 5 pass(s) 2 skip(s)
- Exec time: [0.0, 4.57] s
* igt@gem_exec_balancer@hang:
- Statuses : 5 pass(s) 2 skip(s)
- Exec time: [0.0, 4.47] s
* igt@gem_exec_capture@userptr:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.05] s
* igt@gem_exec_create@forked:
- Statuses : 7 pass(s)
- Exec time: [20.05, 20.14] s
* igt@gem_exec_create@madvise:
- Statuses : 7 pass(s)
- Exec time: [20.04, 22.09] s
* igt@gem_exec_fence@basic-busy-all:
- Statuses : 6 pass(s)
- Exec time: [0.02, 0.03] s
* igt@gem_exec_fence@basic-wait-all:
- Statuses : 6 pass(s)
- Exec time: [0.02, 0.03] s
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- Statuses : 3 pass(s) 3 skip(s)
- Exec time: [0.0, 6.01] s
* igt@gem_exec_flush@basic-batch-kernel-default-uc:
- Statuses : 6 pass(s)
- Exec time: [5.47, 6.0] s
* igt@gem_exec_flush@basic-batch-kernel-default-wb:
- Statuses : 7 pass(s)
- Exec time: [5.46, 6.07] s
* igt@gem_exec_flush@basic-uc-pro-default:
- Statuses : 2 pass(s)
- Exec time: [5.42, 5.43] s
* igt@gem_exec_flush@basic-uc-prw-default:
- Statuses :
- Exec time: [None] s
* igt@gem_exec_flush@basic-uc-ro-default:
- Statuses : 7 pass(s)
- Exec time: [5.41, 5.51] s
* igt@gem_exec_flush@basic-uc-rw-default:
- Statuses : 7 pass(s)
- Exec time: [5.42, 5.46] s
* igt@gem_exec_flush@basic-uc-set-default:
- Statuses : 7 pass(s)
- Exec time: [5.41, 5.46] s
* igt@gem_exec_flush@basic-wb-pro-default:
- Statuses : 7 pass(s)
- Exec time: [5.41, 5.58] s
* igt@gem_exec_flush@basic-wb-prw-default:
- Statuses : 7 pass(s)
- Exec time: [5.41, 5.46] s
* igt@gem_exec_flush@basic-wb-ro-before-default:
- Statuses : 7 pass(s)
- Exec time: [5.41, 5.46] s
* igt@gem_exec_flush@basic-wb-ro-default:
- Statuses : 7 pass(s)
- Exec time: [5.41, 5.46] s
* igt@gem_exec_flush@basic-wb-rw-before-default:
- Statuses : 7 pass(s)
- Exec time: [5.41, 5.46] s
* igt@gem_exec_flush@basic-wb-rw-default:
- Statuses : 7 pass(s)
- Exec time: [5.41, 5.47] s
* igt@gem_exec_flush@basic-wb-set-default:
- Statuses : 7 pass(s)
- Exec time: [5.41, 5.48] s
* igt@gem_exec_nop@basic-parallel:
- Statuses : 7 pass(s)
- Exec time: [2.78, 3.33] s
* igt@gem_exec_nop@basic-sequential:
- Statuses : 7 pass(s)
- Exec time: [2.77, 3.33] s
* igt@gem_exec_nop@basic-series:
- Statuses : 7 pass(s)
- Exec time: [2.75, 3.31] s
* igt@gem_exec_parallel@basic:
- Statuses :
- Exec time: [None] s
* igt@gem_exec_parallel@contexts:
- Statuses :
- Exec time: [None] s
* igt@gem_exec_parallel@fds:
- Statuses :
- Exec time: [None] s
* igt@gem_exec_params@batch-first:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_params@cliprects-invalid:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@cliprects_ptr-dirt:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@dr1-dirt:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@dr4-dirt:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@invalid-bsd-ring:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@invalid-bsd1-flag-on-blt:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@invalid-bsd1-flag-on-render:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@invalid-bsd1-flag-on-vebox:
- Statuses : 6 pass(s) 1 skip(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@invalid-bsd2-flag-on-blt:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@invalid-bsd2-flag-on-render:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_exec_params@invalid-bsd2-flag-on-vebox:
- Statuses :
- Exec time: [None] s
* igt@gem_exec_params@invalid-fence-in:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@invalid-flag:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_exec_params@invalid-ring:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.01] s
* igt@gem_exec_params@invalid-ring2:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@no-blt:
- Statuses :
- Exec time: [None] s
* igt@gem_exec_params@no-bsd:
- Statuses : 7 skip(s)
- Exec time: [0.0] s
* igt@gem_exec_params@no-vebox:
- Statuses : 1 pass(s) 6 skip(s)
- Exec time: [0.0] s
* igt@gem_exec_params@rel-constants-invalid:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_exec_params@rel-constants-invalid-rel-gen5:
- Statuses : 6 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@rel-constants-invalid-ring:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_exec_params@rs-invalid:
- Statuses : 6 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_params@rsvd2-dirt:
- Statuses : 7 skip(s)
- Exec time: [0.0] s
* igt@gem_exec_params@secure-non-master:
- Statuses : 7 skip(s)
- Exec time: [0.0] s
* igt@gem_exec_params@secure-non-root:
- Statuses : 7 skip(s)
- Exec time: [0.0] s
* igt@gem_exec_params@sol-reset-invalid:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_params@sol-reset-not-gen7:
- Statuses : 6 pass(s) 1 skip(s)
- Exec time: [0.0, 0.01] s
* igt@gem_exec_reloc@basic-active:
- Statuses :
- Exec time: [None] s
* igt@gem_exec_reloc@basic-cpu:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-cpu-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.17] s
* igt@gem_exec_reloc@basic-cpu-gtt:
- Statuses :
- Exec time: [None] s
* igt@gem_exec_reloc@basic-cpu-gtt-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.16] s
* igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-cpu-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-cpu-read:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-cpu-read-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.16] s
* igt@gem_exec_reloc@basic-cpu-read-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-cpu-wc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.03] s
* igt@gem_exec_reloc@basic-cpu-wc-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.16] s
* igt@gem_exec_reloc@basic-cpu-wc-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-gtt:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.03] s
* igt@gem_exec_reloc@basic-gtt-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.18] s
* igt@gem_exec_reloc@basic-gtt-cpu:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-gtt-cpu-active:
- Statuses : 6 pass(s)
- Exec time: [0.11, 0.17] s
* igt@gem_exec_reloc@basic-gtt-cpu-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-gtt-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-gtt-read:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-gtt-read-active:
- Statuses : 6 pass(s)
- Exec time: [0.11, 0.17] s
* igt@gem_exec_reloc@basic-gtt-read-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-gtt-wc:
- Statuses : 6 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-gtt-wc-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.16] s
* igt@gem_exec_reloc@basic-gtt-wc-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-range:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.11] s
* igt@gem_exec_reloc@basic-range-active:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.17] s
* igt@gem_exec_reloc@basic-softpin:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-wc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-wc-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.16] s
* igt@gem_exec_reloc@basic-wc-cpu:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.03] s
* igt@gem_exec_reloc@basic-wc-cpu-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.17] s
* igt@gem_exec_reloc@basic-wc-cpu-noreloc:
- Statuses : 6 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-wc-gtt:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.03] s
* igt@gem_exec_reloc@basic-wc-gtt-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.16] s
* igt@gem_exec_reloc@basic-wc-gtt-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-wc-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-wc-read:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-wc-read-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.16] s
* igt@gem_exec_reloc@basic-wc-read-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-write-cpu:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-write-cpu-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.17] s
* igt@gem_exec_reloc@basic-write-cpu-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-write-gtt:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-write-gtt-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.16] s
* igt@gem_exec_reloc@basic-write-gtt-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.02] s
* igt@gem_exec_reloc@basic-write-read:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-write-read-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.15] s
* igt@gem_exec_reloc@basic-write-read-noreloc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_reloc@basic-write-wc:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_exec_reloc@basic-write-wc-active:
- Statuses : 7 pass(s)
- Exec time: [0.11, 0.16] s
* igt@gem_exec_reloc@basic-write-wc-noreloc:
- Statuses : 6 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_exec_schedule@smoketest-all:
- Statuses : 5 pass(s) 2 skip(s)
- Exec time: [0.0, 32.32] s
* igt@gem_exec_suspend@basic:
- Statuses : 7 pass(s)
- Exec time: [0.18, 1.55] s
* igt@gem_exec_suspend@basic-s3-devices:
- Statuses : 7 pass(s)
- Exec time: [6.13, 10.74] s
* igt@gem_exec_suspend@basic-s4-devices:
- Statuses : 7 pass(s)
- Exec time: [7.25, 11.79] s
* igt@gem_fence_thrash@bo-copy:
- Statuses : 7 pass(s)
- Exec time: [1.14, 1.76] s
* igt@gem_fence_thrash@bo-write-verify-none:
- Statuses : 7 pass(s)
- Exec time: [1.10, 1.21] s
* igt@gem_fence_thrash@bo-write-verify-threaded-none:
- Statuses : 7 pass(s)
- Exec time: [1.20, 2.99] s
* igt@gem_fence_thrash@bo-write-verify-threaded-x:
- Statuses :
- Exec time: [None] s
* igt@gem_fence_thrash@bo-write-verify-threaded-y:
- Statuses :
- Exec time: [None] s
* igt@gem_fence_thrash@bo-write-verify-x:
- Statuses : 7 pass(s)
- Exec time: [1.10, 1.27] s
* igt@gem_fence_thrash@bo-write-verify-y:
- Statuses : 7 pass(s)
- Exec time: [1.10, 1.32] s
* igt@gem_fenced_exec_thrash@2-spare-fences:
- Statuses : 7 pass(s)
- Exec time: [2.15, 2.17] s
* igt@gem_fenced_exec_thrash@no-spare-fences:
- Statuses : 7 pass(s)
- Exec time: [2.15, 2.17] s
* igt@gem_fenced_exec_thrash@no-spare-fences-busy:
- Statuses : 7 pass(s)
- Exec time: [2.16, 2.18] s
* igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible:
- Statuses : 7 pass(s)
- Exec time: [2.16, 2.19] s
* igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
- Statuses : 7 pass(s)
- Exec time: [2.15, 2.16] s
* igt@gem_fenced_exec_thrash@too-many-fences:
- Statuses : 7 pass(s)
- Exec time: [2.15, 2.17] s
* igt@gem_flink_race@flink_close:
- Statuses : 7 pass(s)
- Exec time: [5.01, 5.02] s
* igt@gem_flink_race@flink_name:
- Statuses : 7 pass(s)
- Exec time: [5.37] s
* igt@gem_gpgpu_fill:
- Statuses : 1 pass(s) 1 skip(s)
- Exec time: [0.10] s
* igt@gem_gtt_cpu_tlb:
- Statuses : 7 pass(s)
- Exec time: [0.09, 0.25] s
* igt@gem_linear_blits@interruptible:
- Statuses : 7 pass(s)
- Exec time: [1.66, 23.63] s
* igt@gem_linear_blits@normal:
- Statuses : 7 pass(s)
- Exec time: [1.88, 20.36] s
* igt@gem_madvise@dontneed-after-mmap:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.02] s
* igt@gem_madvise@dontneed-before-exec:
- Statuses : 6 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_madvise@dontneed-before-mmap:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_madvise@dontneed-before-pwrite:
- Statuses : 7 pass(s)
- Exec time: [0.00] s
* igt@gem_media_fill:
- Statuses : 6 pass(s) 1 skip(s)
- Exec time: [0.08, 0.18] s
* igt@gem_mmap@bad-object:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_mmap@basic-small-bo:
- Statuses : 7 pass(s)
- Exec time: [0.57, 2.10] s
* igt@gem_mmap@big-bo:
- Statuses : 6 pass(s)
- Exec time: [0.66, 2.56] s
* igt@gem_mmap@short-mmap:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_mmap_gtt@basic-copy:
- Statuses : 7 pass(s)
- Exec time: [0.17, 0.90] s
* igt@gem_mmap_gtt@basic-read:
- Statuses : 7 pass(s)
- Exec time: [0.03, 0.13] s
* igt@gem_mmap_gtt@basic-read-write:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.05] s
* igt@gem_mmap_gtt@basic-read-write-distinct:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.05] s
* igt@gem_mmap_gtt@basic-short:
- Statuses : 7 pass(s)
- Exec time: [0.02, 0.07] s
* igt@gem_mmap_gtt@basic-small-bo:
- Statuses :
- Exec time: [None] s
* igt@gem_mmap_gtt@basic-small-bo-tiledx:
- Statuses : 7 pass(s)
- Exec time: [0.23, 2.01] s
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- Statuses : 7 pass(s)
- Exec time: [0.22, 0.80] s
* igt@gem_mmap_gtt@basic-small-copy:
- Statuses : 7 pass(s)
- Exec time: [0.40, 3.15] s
* igt@gem_mmap_gtt@basic-small-copy-odd:
- Statuses : 7 pass(s)
- Exec time: [0.72, 4.23] s
* igt@gem_mmap_gtt@basic-small-copy-xy:
- Statuses : 6 pass(s)
- Exec time: [0.86, 4.60] s
* igt@gem_mmap_gtt@basic-wc:
- Statuses : 6 pass(s)
- Exec time: [0.64] s
* igt@gem_mmap_gtt@basic-write:
- Statuses : 7 pass(s)
- Exec time: [0.12, 0.48] s
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- Statuses : 5 pass(s) 2 skip(s)
- Exec time: [0.0, 0.31] s
* igt@gem_mmap_gtt@basic-write-gtt:
- Statuses : 7 pass(s)
- Exec time: [0.11, 1.26] s
* igt@gem_mmap_gtt@basic-write-read:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.05] s
* igt@gem_mmap_gtt@basic-write-read-distinct:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.05] s
* igt@gem_mmap_gtt@big-bo:
- Statuses : 7 pass(s)
- Exec time: [0.26, 1.02] s
* igt@gem_mmap_gtt@big-bo-tiledx:
- Statuses : 7 pass(s)
- Exec time: [0.50, 1.90] s
* igt@gem_mmap_gtt@big-bo-tiledy:
- Statuses : 7 pass(s)
- Exec time: [0.31, 1.15] s
* igt@gem_mmap_gtt@big-copy:
- Statuses : 7 pass(s)
- Exec time: [1.36, 11.11] s
* igt@gem_mmap_gtt@big-copy-odd:
- Statuses : 7 pass(s)
- Exec time: [1.57, 12.27] s
* igt@gem_mmap_gtt@big-copy-xy:
- Statuses : 7 pass(s)
- Exec time: [1.55, 16.78] s
* igt@gem_mmap_gtt@coherency:
- Statuses : 3 pass(s) 4 skip(s)
- Exec time: [0.0, 0.09] s
* igt@gem_mmap_gtt@fault-concurrent:
- Statuses : 7 pass(s)
- Exec time: [2.63, 3.82] s
* igt@gem_mmap_gtt@hang:
- Statuses : 7 pass(s)
- Exec time: [5.43, 5.50] s
* igt@gem_mmap_gtt@medium-copy:
- Statuses : 7 pass(s)
- Exec time: [0.99, 6.64] s
* igt@gem_mmap_gtt@medium-copy-odd:
- Statuses : 7 pass(s)
- Exec time: [0.81, 6.26] s
* igt@gem_mmap_gtt@medium-copy-xy:
- Statuses : 7 pass(s)
- Exec time: [0.83, 8.18] s
* igt@gem_mmap_gtt@zero-extend:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_mmap_offset@bad-extensions:
- Statuses : 7 pass(s)
- Exec time: [0.0] s
* igt@gem_mmap_offset@bad-flags:
- Statuses :
- Exec time: [None] s
* igt@gem_mmap_offset@bad-object:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_mmap_offset@basic-uaf:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_mmap_offset@clear:
- Statuses : 7 pass(s)
- Exec time: [23.97, 43.89] s
* igt@gem_mmap_offset@close-race:
- Statuses : 7 pass(s)
- Exec time: [20.05, 20.10] s
* igt@gem_mmap_offset@isolation:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_mmap_offset@open-flood:
- Statuses : 7 pass(s)
- Exec time: [21.50, 21.56] s
* igt@gem_mmap_offset@pf-nonblock:
- Statuses : 7 pass(s)
- Exec time: [0.00, 0.01] s
* igt@gem_mmap_wc@close:
- Statuses : 7 pass(s)
- Exec time: [0.04, 0.14] s
* igt@gem_mmap_wc@coherency:
- Statuses : 7 pass(s)
- Exec time: [0.08, 0.22] s
* igt@gem_mmap_wc@copy:
- Statuses : 6 pass(s)
- Exec time: [0.17, 0.41] s
* igt@gem_mmap_wc@fault-concurrent:
- Statuses : 7 pass(s)
- Exec time: [0.54, 2.30] s
* igt@gem_mmap_wc@invalid-flags:
- Statuses : 7 pass(s)
- Exec time: [0.0, 0.00] s
* igt@gem_mmap_wc@read:
- Statuses : 7 pass(s)
- Exec time: [0.05, 0.20] s
* igt@gem_mmap_wc@read-write:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.10] s
* igt@gem_mmap_wc@read-write-distinct:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.05] s
* igt@gem_mmap_wc@set-cache-level:
- Statuses : 2 pass(s)
- Exec time: [0.00] s
* igt@gem_mmap_wc@write:
- Statuses : 7 pass(s)
- Exec time: [0.08, 0.25] s
* igt@gem_mmap_wc@write-cpu-read-wc:
- Statuses : 7 pass(s)
- Exec time: [0.10, 0.34] s
* igt@gem_mmap_wc@write-cpu-read-wc-unflushed:
- Statuses : 7 pass(s)
- Exec time: [0.10, 0.33] s
* igt@gem_mmap_wc@write-gtt-read-wc:
- Statuses : 7 pass(s)
- Exec time: [0.10, 0.54] s
* igt@gem_mmap_wc@write-read:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.06] s
* igt@gem_mmap_wc@write-read-distinct:
- Statuses : 7 pass(s)
- Exec time: [0.01, 0.06] s
* igt@gem_partial_pwrite_pread@reads:
- Statuses : 7 pass(s)
- Exec time: [0.67, 5.53] s
* igt@gem_partial_pwrite_pread@reads-display:
- Statuses : 7 pass(s)
- Exec time: [0.66, 6.03] s
* igt@gem_partial_pwrite_pread@reads-snoop:
- Statuses : 7 pass(s)
- Exec time: [0.65, 5.67] s
* igt@gem_partial_pwrite_pread@reads-uncached:
- Statuses : 7 pass(s)
- Exec time: [0.65, 5.73] s
* igt@gem_partial_pwrite_pread@write:
- Statuses : 7 pass(s)
- Exec time: [3.19, 13.21] s
* igt@gem_partial_pwrite_pread@write-display:
- Statuses : 2 pass(s)
- Exec time: [3.21, 3.27] s
* igt@gem_partial_pwrite_pread@write-snoop:
- Statuses : 6 pass(s)
- Exec time: [3.20, 13.49] s
* igt@gem_partial_pwrite_pread@write-uncached:
- Statuses : 7 pass(s)
- Exec time: [3.20, 13.48] s
* igt@gem_partial_pwrite_pread@writes-after-reads:
- Statuses : 7 pass(s)
- Exec time: [3.84, 19.53] s
* igt@gem_partial_pwrite_pread@writes-after-reads-display:
- Statuses : 7 pass(s)
- Exec time: [3.88, 19.36] s
* igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
- Statuses : 6 pass(s)
- Exec time: [3.83, 18.98] s
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- Statuses : 7 pass(s)
- Exec time: [3.81, 18.93] s
* igt@gem_pipe_control_store_loop@fresh-buffer:
- Statuses : 7 pass(s)
- Exec time: [2.15] s
* igt@gem_pipe_control_store_loop@reused-buffer:
- Statuses : 2 pass(s)
- Exec time: [2.15] s
* igt@gem_ppgtt@blt-vs-render-ctx0:
- Statuses :
- Exec time: [None] s
* igt@gem_ppgtt@blt-vs-render-ctxn:
- Statuses : 7 pass(s)
- Exec time: [32.68, 33.78] s
* igt@gem_ppgtt@flink-and-close-vma-leak:
- Statuses : 5 pass(s) 2 skip(s)
- Exec time: [0.0, 0.01] s
* igt@gem_pread@display:
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19489/index.html
[-- Attachment #1.2: Type: text/html, Size: 39742 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object
2021-01-25 14:17 [Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object Chris Wilson
` (8 preceding siblings ...)
2021-01-26 0:06 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2021-01-27 15:44 ` Matthew Auld
9 siblings, 0 replies; 17+ messages in thread
From: Matthew Auld @ 2021-01-27 15:44 UTC (permalink / raw)
To: Chris Wilson; +Cc: Intel Graphics Development
On Mon, 25 Jan 2021 at 14:18, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> Set the cache coherency and status using the set-coherency helper.
> Otherwise, we forget to mark the new pages as cache dirty.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread