From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Subject: [Intel-gfx] [PATCH v7 40/63] drm/i915: Use a single page table lock for each gtt.
Date: Thu, 28 Jan 2021 17:25:49 +0100 [thread overview]
Message-ID: <20210128162612.927917-41-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20210128162612.927917-1-maarten.lankhorst@linux.intel.com>
We may create page table objects on the fly, but we may need to
wait with the ww lock held. Instead of waiting on a freed obj
lock, ensure we have the same lock for each object to keep
-EDEADLK working. This ensures that i915_vma_pin_ww can lock
the page tables when required.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 8 +++++-
drivers/gpu/drm/i915/gt/intel_gtt.c | 38 ++++++++++++++++++++++++++-
drivers/gpu/drm/i915/gt/intel_gtt.h | 5 ++++
drivers/gpu/drm/i915/gt/intel_ppgtt.c | 3 ++-
drivers/gpu/drm/i915/i915_vma.c | 5 ++++
5 files changed, 56 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 2b273652b0f0..4bb6197be9e2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -647,7 +647,9 @@ static int init_aliasing_ppgtt(struct i915_ggtt *ggtt)
if (err)
goto err_ppgtt;
+ i915_gem_object_lock(ppgtt->vm.scratch[0], NULL);
err = i915_vm_pin_pt_stash(&ppgtt->vm, &stash);
+ i915_gem_object_unlock(ppgtt->vm.scratch[0]);
if (err)
goto err_stash;
@@ -734,6 +736,7 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
mutex_unlock(&ggtt->vm.mutex);
i915_address_space_fini(&ggtt->vm);
+ dma_resv_fini(&ggtt->vm.resv);
arch_phys_wc_del(ggtt->mtrr);
@@ -1115,6 +1118,7 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct intel_gt *gt)
ggtt->vm.gt = gt;
ggtt->vm.i915 = i915;
ggtt->vm.dma = &i915->drm.pdev->dev;
+ dma_resv_init(&ggtt->vm.resv);
if (INTEL_GEN(i915) <= 5)
ret = i915_gmch_probe(ggtt);
@@ -1122,8 +1126,10 @@ static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct intel_gt *gt)
ret = gen6_gmch_probe(ggtt);
else
ret = gen8_gmch_probe(ggtt);
- if (ret)
+ if (ret) {
+ dma_resv_fini(&ggtt->vm.resv);
return ret;
+ }
if ((ggtt->vm.total - 1) >> 32) {
drm_err(&i915->drm,
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 444d9bacfafd..941f8af016d6 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -13,16 +13,36 @@
struct drm_i915_gem_object *alloc_pt_dma(struct i915_address_space *vm, int sz)
{
+ struct drm_i915_gem_object *obj;
+
if (I915_SELFTEST_ONLY(should_fail(&vm->fault_attr, 1)))
i915_gem_shrink_all(vm->i915);
- return i915_gem_object_create_internal(vm->i915, sz);
+ obj = i915_gem_object_create_internal(vm->i915, sz);
+ /* ensure all dma objects have the same reservation class */
+ if (!IS_ERR(obj))
+ obj->base.resv = &vm->resv;
+ return obj;
}
int pin_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
{
int err;
+ i915_gem_object_lock(obj, NULL);
+ err = i915_gem_object_pin_pages(obj);
+ i915_gem_object_unlock(obj);
+ if (err)
+ return err;
+
+ i915_gem_object_make_unshrinkable(obj);
+ return 0;
+}
+
+int pin_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
+{
+ int err;
+
err = i915_gem_object_pin_pages(obj);
if (err)
return err;
@@ -56,6 +76,20 @@ void __i915_vm_close(struct i915_address_space *vm)
mutex_unlock(&vm->mutex);
}
+/* lock the vm into the current ww, if we lock one, we lock all */
+int i915_vm_lock_objects(struct i915_address_space *vm,
+ struct i915_gem_ww_ctx *ww)
+{
+ if (vm->scratch[0]->base.resv == &vm->resv) {
+ return i915_gem_object_lock(vm->scratch[0], ww);
+ } else {
+ struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
+
+ /* We borrowed the scratch page from ggtt, take the top level object */
+ return i915_gem_object_lock(ppgtt->pd->pt.base, ww);
+ }
+}
+
void i915_address_space_fini(struct i915_address_space *vm)
{
drm_mm_takedown(&vm->mm);
@@ -69,6 +103,7 @@ static void __i915_vm_release(struct work_struct *work)
vm->cleanup(vm);
i915_address_space_fini(vm);
+ dma_resv_fini(&vm->resv);
kfree(vm);
}
@@ -98,6 +133,7 @@ void i915_address_space_init(struct i915_address_space *vm, int subclass)
mutex_init(&vm->mutex);
lockdep_set_subclass(&vm->mutex, subclass);
i915_gem_shrinker_taints_mutex(vm->i915, &vm->mutex);
+ dma_resv_init(&vm->resv);
GEM_BUG_ON(!vm->total);
drm_mm_init(&vm->mm, 0, vm->total);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index af90090c3d18..8f7c49efa190 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -238,6 +238,7 @@ struct i915_address_space {
atomic_t open;
struct mutex mutex; /* protects vma and our lists */
+ struct dma_resv resv; /* reservation lock for all pd objects, and buffer pool */
#define VM_CLASS_GGTT 0
#define VM_CLASS_PPGTT 1
@@ -346,6 +347,9 @@ struct i915_ppgtt {
#define i915_is_ggtt(vm) ((vm)->is_ggtt)
+int __must_check
+i915_vm_lock_objects(struct i915_address_space *vm, struct i915_gem_ww_ctx *ww);
+
static inline bool
i915_vm_is_4lvl(const struct i915_address_space *vm)
{
@@ -522,6 +526,7 @@ struct i915_page_directory *alloc_pd(struct i915_address_space *vm);
struct i915_page_directory *__alloc_pd(int npde);
int pin_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj);
+int pin_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object *obj);
void free_px(struct i915_address_space *vm,
struct i915_page_table *pt, int lvl);
diff --git a/drivers/gpu/drm/i915/gt/intel_ppgtt.c b/drivers/gpu/drm/i915/gt/intel_ppgtt.c
index 96b85a10ef33..0e7f10f87939 100644
--- a/drivers/gpu/drm/i915/gt/intel_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ppgtt.c
@@ -262,7 +262,7 @@ int i915_vm_pin_pt_stash(struct i915_address_space *vm,
for (n = 0; n < ARRAY_SIZE(stash->pt); n++) {
for (pt = stash->pt[n]; pt; pt = pt->stash) {
- err = pin_pt_dma(vm, pt->base);
+ err = pin_pt_dma_locked(vm, pt->base);
if (err)
return err;
}
@@ -304,6 +304,7 @@ void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt)
ppgtt->vm.dma = &i915->drm.pdev->dev;
ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size);
+ dma_resv_init(&ppgtt->vm.resv);
i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT);
ppgtt->vm.vma_ops.bind_vma = ppgtt_bind_vma;
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 265e3a3079e2..c5b9f30ac0a3 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -884,6 +884,11 @@ int i915_vma_pin_ww(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm);
if (flags & vma->vm->bind_async_flags) {
+ /* lock VM */
+ err = i915_vm_lock_objects(vma->vm, ww);
+ if (err)
+ goto err_rpm;
+
work = i915_vma_work();
if (!work) {
err = -ENOMEM;
--
2.30.0
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next prev parent reply other threads:[~2021-01-28 16:27 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-28 16:25 [Intel-gfx] [PATCH v7 00/63] drm/i915: Remove obj->mm.lock! Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 01/63] drm/i915: Do not share hwsp across contexts any more, v7 Maarten Lankhorst
2021-01-28 17:42 ` Chris Wilson
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 02/63] drm/i915: Pin timeline map after first timeline pin, v3 Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 03/63] drm/i915: Move cmd parser pinning to execbuffer Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 04/63] drm/i915: Add missing -EDEADLK handling to execbuf pinning, v2 Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 05/63] drm/i915: Ensure we hold the object mutex in pin correctly Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 06/63] drm/i915: Add gem object locking to madvise Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 07/63] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 08/63] drm/i915: Rework struct phys attachment handling Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 09/63] drm/i915: Convert i915_gem_object_attach_phys() to ww locking, v2 Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 10/63] drm/i915: make lockdep slightly happier about execbuf Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 11/63] drm/i915: Disable userptr pread/pwrite support Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 12/63] drm/i915: No longer allow exporting userptr through dma-buf Maarten Lankhorst
2021-01-28 16:44 ` Jason Ekstrand
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 13/63] drm/i915: Reject more ioctls for userptr Maarten Lankhorst
2021-01-28 16:47 ` Jason Ekstrand
2021-01-29 11:42 ` Maarten Lankhorst
2021-02-01 19:11 ` Jason Ekstrand
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 14/63] drm/i915: Reject UNSYNCHRONIZED for userptr, v2 Maarten Lankhorst
2021-01-28 16:49 ` Jason Ekstrand
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 15/63] drm/i915: Make compilation of userptr code depend on MMU_NOTIFIER Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 16/63] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v6 Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 17/63] drm/i915: Flatten obj->mm.lock Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 18/63] drm/i915: Populate logical context during first pin Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 19/63] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2 Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 20/63] drm/i915: Handle ww locking in init_status_page Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 21/63] drm/i915: Rework clflush to work correctly without obj->mm.lock Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 22/63] drm/i915: Pass ww ctx to intel_pin_to_display_plane Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 23/63] drm/i915: Add object locking to vm_fault_cpu Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 24/63] drm/i915: Move pinning to inside engine_wa_list_verify() Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 25/63] drm/i915: Take reservation lock around i915_vma_pin Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 26/63] drm/i915: Make lrc_init_wa_ctx compatible with ww locking, v2 Maarten Lankhorst
2021-02-01 12:50 ` [Intel-gfx] [PATCH] drm/i915: Make lrc_init_wa_ctx compatible with ww locking, v3 Maarten Lankhorst
2021-02-01 13:03 ` Thomas Hellström
2021-02-01 13:08 ` Chris Wilson
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 27/63] drm/i915: Make __engine_unpark() compatible with ww locking Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 28/63] drm/i915: Take obj lock around set_domain ioctl Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 29/63] drm/i915: Defer pin calls in buffer pool until first use by caller Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 30/63] drm/i915: Fix pread/pwrite to work with new locking rules Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 31/63] drm/i915: Fix workarounds selftest, part 1 Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 32/63] drm/i915: Prepare for obj->mm.lock removal, v2 Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 33/63] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 34/63] drm/i915: Add ww locking around vm_access() Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 35/63] drm/i915: Increase ww locking for perf Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 36/63] drm/i915: Lock ww in ucode objects correctly Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 37/63] drm/i915: Add ww locking to dma-buf ops Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 38/63] drm/i915: Add missing ww lock in intel_dsb_prepare Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 39/63] drm/i915: Fix ww locking in shmem_create_from_object Maarten Lankhorst
2021-01-28 16:25 ` Maarten Lankhorst [this message]
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 41/63] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 42/63] drm/i915/selftests: Prepare client blit " Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 43/63] drm/i915/selftests: Prepare coherency tests " Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 44/63] drm/i915/selftests: Prepare context " Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 45/63] drm/i915/selftests: Prepare dma-buf " Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 46/63] drm/i915/selftests: Prepare execbuf " Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 47/63] drm/i915/selftests: Prepare mman testcases " Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 48/63] drm/i915/selftests: Prepare object tests " Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 49/63] drm/i915/selftests: Prepare object blit " Maarten Lankhorst
2021-01-28 16:25 ` [Intel-gfx] [PATCH v7 50/63] drm/i915/selftests: Prepare igt_gem_utils " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 51/63] drm/i915/selftests: Prepare context selftest " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 52/63] drm/i915/selftests: Prepare hangcheck " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 53/63] drm/i915/selftests: Prepare execlists and lrc selftests " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 54/63] drm/i915/selftests: Prepare mocs tests " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 55/63] drm/i915/selftests: Prepare ring submission " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 56/63] drm/i915/selftests: Prepare timeline tests " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 57/63] drm/i915/selftests: Prepare i915_request " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 58/63] drm/i915/selftests: Prepare memory region " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 59/63] drm/i915/selftests: Prepare cs engine " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 60/63] drm/i915/selftests: Prepare gtt " Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 61/63] drm/i915: Finally remove obj->mm.lock Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 62/63] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2 Maarten Lankhorst
2021-01-28 16:26 ` [Intel-gfx] [PATCH v7 63/63] drm/i915: Move gt_revoke() slightly Maarten Lankhorst
2021-01-28 17:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev14) Patchwork
2021-01-28 17:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-28 17:54 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-01-28 18:20 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-01-29 15:28 ` [Intel-gfx] ✗ Fi.CI.IGT: " Patchwork
2021-02-01 16:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev15) Patchwork
2021-02-01 16:22 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-01 16:25 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-02-01 16:51 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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