intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, drmdevel@freedesktop.org
Cc: <daniel.vetter@ffwll.ch>
Subject: [Intel-gfx] [PATCH 06/21] drm/i915/selftests: Add a cancel request selftest that triggers a reset
Date: Sun, 15 Aug 2021 13:15:44 -0700	[thread overview]
Message-ID: <20210815201559.1150-7-matthew.brost@intel.com> (raw)
In-Reply-To: <20210815201559.1150-1-matthew.brost@intel.com>

Add a cancel request selftest that results in an engine reset to cancel
the request as it is non-preemptable. Also insert a NOP request after
the cancelled request and confirm that it completely successfully.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/i915/selftests/i915_request.c | 94 +++++++++++++++++++
 1 file changed, 94 insertions(+)

diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
index d67710d10615..bf1cf7b5af76 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -772,6 +772,98 @@ static int __cancel_completed(struct intel_engine_cs *engine)
 	return err;
 }
 
+static int __cancel_reset(struct intel_engine_cs *engine)
+{
+	struct intel_context *ce;
+	struct igt_spinner spin;
+	struct i915_request *rq, *nop;
+	unsigned long preempt_timeout_ms;
+	int err = 0;
+
+	preempt_timeout_ms = engine->props.preempt_timeout_ms;
+	engine->props.preempt_timeout_ms = 100;
+
+	if (igt_spinner_init(&spin, engine->gt))
+		goto out_restore;
+
+	ce = intel_context_create(engine);
+	if (IS_ERR(ce)) {
+		err = PTR_ERR(ce);
+		goto out_spin;
+	}
+
+	rq = igt_spinner_create_request(&spin, ce, MI_NOOP);
+	if (IS_ERR(rq)) {
+		err = PTR_ERR(rq);
+		goto out_ce;
+	}
+
+	pr_debug("%s: Cancelling active request\n", engine->name);
+	i915_request_get(rq);
+	i915_request_add(rq);
+	if (!igt_wait_for_spinner(&spin, rq)) {
+		struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
+
+		pr_err("Failed to start spinner on %s\n", engine->name);
+		intel_engine_dump(engine, &p, "%s\n", engine->name);
+		err = -ETIME;
+		goto out_rq;
+	}
+
+	nop = intel_context_create_request(ce);
+	if (IS_ERR(nop))
+		goto out_nop;
+	i915_request_get(nop);
+	i915_request_add(nop);
+
+	i915_request_cancel(rq, -EINTR);
+
+	if (i915_request_wait(rq, 0, HZ) < 0) {
+		struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
+
+		pr_err("%s: Failed to cancel hung request\n", engine->name);
+		intel_engine_dump(engine, &p, "%s\n", engine->name);
+		err = -ETIME;
+		goto out_nop;
+	}
+
+	if (rq->fence.error != -EINTR) {
+		pr_err("%s: fence not cancelled (%u)\n",
+		       engine->name, rq->fence.error);
+		err = -EINVAL;
+		goto out_nop;
+	}
+
+	if (i915_request_wait(nop, 0, HZ) < 0) {
+		struct drm_printer p = drm_info_printer(engine->i915->drm.dev);
+
+		pr_err("%s: Failed to complete nop request\n", engine->name);
+		intel_engine_dump(engine, &p, "%s\n", engine->name);
+		err = -ETIME;
+		goto out_nop;
+	}
+
+	if (nop->fence.error != 0) {
+		pr_err("%s: Nop request errored (%u)\n",
+		       engine->name, nop->fence.error);
+		err = -EINVAL;
+	}
+
+out_nop:
+	i915_request_put(nop);
+out_rq:
+	i915_request_put(rq);
+out_ce:
+	intel_context_put(ce);
+out_spin:
+	igt_spinner_fini(&spin);
+out_restore:
+	engine->props.preempt_timeout_ms = preempt_timeout_ms;
+	if (err)
+		pr_err("%s: %s error %d\n", __func__, engine->name, err);
+	return err;
+}
+
 static int live_cancel_request(void *arg)
 {
 	struct drm_i915_private *i915 = arg;
@@ -798,6 +890,8 @@ static int live_cancel_request(void *arg)
 			err = __cancel_active(engine);
 		if (err == 0)
 			err = __cancel_completed(engine);
+		if (err == 0)
+			err = __cancel_reset(engine);
 
 		err2 = igt_live_test_end(&t);
 		if (err)
-- 
2.32.0


  parent reply	other threads:[~2021-08-15 20:21 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-15 20:15 [Intel-gfx] [PATCH 00/21] Clean up GuC CI failures, simplify locking, and kernel DOC Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 01/21] drm/i915/guc: Fix blocked context accounting Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 02/21] drm/i915/guc: outstanding G2H accounting Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 03/21] drm/i915/guc: Unwind context requests in reverse order Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 04/21] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 05/21] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Matthew Brost
2021-08-15 20:15 ` Matthew Brost [this message]
2021-08-15 20:15 ` [Intel-gfx] [PATCH 07/21] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 08/21] drm/i915/selftests: Fix memory corruption in live_lrc_isolation Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 09/21] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 10/21] drm/i915/guc: Take context ref when cancelling request Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 11/21] drm/i915/guc: Don't touch guc_state.sched_state without a lock Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 12/21] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 13/21] drm/i915: Allocate error capture in atomic context Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 14/21] drm/i915/guc: Flush G2H work queue during reset Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 15/21] drm/i915/guc: Release submit fence from an IRQ Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 16/21] drm/i915/guc: Move guc_blocked fence to struct guc_state Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 17/21] drm/i915/guc: Rework and simplify locking Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 18/21] drm/i915/guc: Proper xarray usage for contexts_lookup Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 19/21] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 20/21] drm/i915/guc: Move GuC priority fields in context under guc_active Matthew Brost
2021-08-15 20:15 ` [Intel-gfx] [PATCH 21/21] drm/i915/guc: Add GuC kernel doc Matthew Brost
2021-08-15 20:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC Patchwork
2021-08-15 20:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-15 21:15 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-08-15 21:54   ` Matthew Brost

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210815201559.1150-7-matthew.brost@intel.com \
    --to=matthew.brost@intel.com \
    --cc=daniel.vetter@ffwll.ch \
    --cc=drmdevel@freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).