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From: Matthew Brost <matthew.brost@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	daniel.vetter@ffwll.ch
Subject: Re: [Intel-gfx] [PATCH 14/22] drm/i915: Allocate error capture in atomic context
Date: Tue, 17 Aug 2021 09:12:02 -0700	[thread overview]
Message-ID: <20210817161201.GA30699@jons-linux-dev-box> (raw)
In-Reply-To: <YRuKGIAqBXwv6e6J@phenom.ffwll.local>

On Tue, Aug 17, 2021 at 12:06:16PM +0200, Daniel Vetter wrote:
> On Mon, Aug 16, 2021 at 06:51:31AM -0700, Matthew Brost wrote:
> > Error captures can now be done in a work queue processing G2H messages.
> > These messages need to be completely done being processed in the reset
> > path, to avoid races in the missing G2H cleanup, which create a
> > dependency on memory allocations and dma fences (i915_requests).
> > Requests depend on resets, thus now we have a circular dependency. To
> > work around this, allocate the error capture in an atomic context.
> > 
> > Fixes: dc0dad365c5e ("Fix for error capture after full GPU reset with GuC")
> > Fixes: 573ba126aef3 ("Capture error state on context reset")
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gpu_error.c | 37 +++++++++++++--------------
> >  1 file changed, 18 insertions(+), 19 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> > index 0f08bcfbe964..453376aa6d9f 100644
> > --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> > @@ -49,7 +49,6 @@
> >  #include "i915_memcpy.h"
> >  #include "i915_scatterlist.h"
> >  
> > -#define ALLOW_FAIL (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
> >  #define ATOMIC_MAYFAIL (GFP_ATOMIC | __GFP_NOWARN)
> 
> This one doesn't make much sense. GFP_ATOMIC essentially means we're
> high-priority and failure would be a pretty bad day. Meanwhile
> __GFP_NOWARN means we can totally cope with failure, pls don't holler.
> 
> GFP_NOWAIT | __GFP_NOWARN would the more consistent one here I think.
> 
> gfp.h for all the docs for this.
> 
> Separate patch ofc. This one is definitely the right direction, since
> GFP_KERNEL from the reset worker is not a good idea.

Lockdep is happy with GFP_NOWAIT so this works for me.

Matt

> -Daniel
> 
> >  
> >  static void __sg_set_buf(struct scatterlist *sg,
> > @@ -79,7 +78,7 @@ static bool __i915_error_grow(struct drm_i915_error_state_buf *e, size_t len)
> >  	if (e->cur == e->end) {
> >  		struct scatterlist *sgl;
> >  
> > -		sgl = (typeof(sgl))__get_free_page(ALLOW_FAIL);
> > +		sgl = (typeof(sgl))__get_free_page(ATOMIC_MAYFAIL);
> >  		if (!sgl) {
> >  			e->err = -ENOMEM;
> >  			return false;
> > @@ -99,10 +98,10 @@ static bool __i915_error_grow(struct drm_i915_error_state_buf *e, size_t len)
> >  	}
> >  
> >  	e->size = ALIGN(len + 1, SZ_64K);
> > -	e->buf = kmalloc(e->size, ALLOW_FAIL);
> > +	e->buf = kmalloc(e->size, ATOMIC_MAYFAIL);
> >  	if (!e->buf) {
> >  		e->size = PAGE_ALIGN(len + 1);
> > -		e->buf = kmalloc(e->size, GFP_KERNEL);
> > +		e->buf = kmalloc(e->size, ATOMIC_MAYFAIL);
> >  	}
> >  	if (!e->buf) {
> >  		e->err = -ENOMEM;
> > @@ -243,12 +242,12 @@ static bool compress_init(struct i915_vma_compress *c)
> >  {
> >  	struct z_stream_s *zstream = &c->zstream;
> >  
> > -	if (pool_init(&c->pool, ALLOW_FAIL))
> > +	if (pool_init(&c->pool, ATOMIC_MAYFAIL))
> >  		return false;
> >  
> >  	zstream->workspace =
> >  		kmalloc(zlib_deflate_workspacesize(MAX_WBITS, MAX_MEM_LEVEL),
> > -			ALLOW_FAIL);
> > +			ATOMIC_MAYFAIL);
> >  	if (!zstream->workspace) {
> >  		pool_fini(&c->pool);
> >  		return false;
> > @@ -256,7 +255,7 @@ static bool compress_init(struct i915_vma_compress *c)
> >  
> >  	c->tmp = NULL;
> >  	if (i915_has_memcpy_from_wc())
> > -		c->tmp = pool_alloc(&c->pool, ALLOW_FAIL);
> > +		c->tmp = pool_alloc(&c->pool, ATOMIC_MAYFAIL);
> >  
> >  	return true;
> >  }
> > @@ -280,7 +279,7 @@ static void *compress_next_page(struct i915_vma_compress *c,
> >  	if (dst->page_count >= dst->num_pages)
> >  		return ERR_PTR(-ENOSPC);
> >  
> > -	page = pool_alloc(&c->pool, ALLOW_FAIL);
> > +	page = pool_alloc(&c->pool, ATOMIC_MAYFAIL);
> >  	if (!page)
> >  		return ERR_PTR(-ENOMEM);
> >  
> > @@ -376,7 +375,7 @@ struct i915_vma_compress {
> >  
> >  static bool compress_init(struct i915_vma_compress *c)
> >  {
> > -	return pool_init(&c->pool, ALLOW_FAIL) == 0;
> > +	return pool_init(&c->pool, ATOMIC_MAYFAIL) == 0;
> >  }
> >  
> >  static bool compress_start(struct i915_vma_compress *c)
> > @@ -391,7 +390,7 @@ static int compress_page(struct i915_vma_compress *c,
> >  {
> >  	void *ptr;
> >  
> > -	ptr = pool_alloc(&c->pool, ALLOW_FAIL);
> > +	ptr = pool_alloc(&c->pool, ATOMIC_MAYFAIL);
> >  	if (!ptr)
> >  		return -ENOMEM;
> >  
> > @@ -997,7 +996,7 @@ i915_vma_coredump_create(const struct intel_gt *gt,
> >  
> >  	num_pages = min_t(u64, vma->size, vma->obj->base.size) >> PAGE_SHIFT;
> >  	num_pages = DIV_ROUND_UP(10 * num_pages, 8); /* worstcase zlib growth */
> > -	dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), ALLOW_FAIL);
> > +	dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), ATOMIC_MAYFAIL);
> >  	if (!dst)
> >  		return NULL;
> >  
> > @@ -1433,7 +1432,7 @@ capture_engine(struct intel_engine_cs *engine,
> >  	struct i915_request *rq = NULL;
> >  	unsigned long flags;
> >  
> > -	ee = intel_engine_coredump_alloc(engine, GFP_KERNEL);
> > +	ee = intel_engine_coredump_alloc(engine, ATOMIC_MAYFAIL);
> >  	if (!ee)
> >  		return NULL;
> >  
> > @@ -1481,7 +1480,7 @@ gt_record_engines(struct intel_gt_coredump *gt,
> >  		struct intel_engine_coredump *ee;
> >  
> >  		/* Refill our page pool before entering atomic section */
> > -		pool_refill(&compress->pool, ALLOW_FAIL);
> > +		pool_refill(&compress->pool, ATOMIC_MAYFAIL);
> >  
> >  		ee = capture_engine(engine, compress);
> >  		if (!ee)
> > @@ -1507,7 +1506,7 @@ gt_record_uc(struct intel_gt_coredump *gt,
> >  	const struct intel_uc *uc = &gt->_gt->uc;
> >  	struct intel_uc_coredump *error_uc;
> >  
> > -	error_uc = kzalloc(sizeof(*error_uc), ALLOW_FAIL);
> > +	error_uc = kzalloc(sizeof(*error_uc), ATOMIC_MAYFAIL);
> >  	if (!error_uc)
> >  		return NULL;
> >  
> > @@ -1518,8 +1517,8 @@ gt_record_uc(struct intel_gt_coredump *gt,
> >  	 * As modparams are generally accesible from the userspace make
> >  	 * explicit copies of the firmware paths.
> >  	 */
> > -	error_uc->guc_fw.path = kstrdup(uc->guc.fw.path, ALLOW_FAIL);
> > -	error_uc->huc_fw.path = kstrdup(uc->huc.fw.path, ALLOW_FAIL);
> > +	error_uc->guc_fw.path = kstrdup(uc->guc.fw.path, ATOMIC_MAYFAIL);
> > +	error_uc->huc_fw.path = kstrdup(uc->huc.fw.path, ATOMIC_MAYFAIL);
> >  	error_uc->guc_log =
> >  		i915_vma_coredump_create(gt->_gt,
> >  					 uc->guc.log.vma, "GuC log buffer",
> > @@ -1778,7 +1777,7 @@ i915_vma_capture_prepare(struct intel_gt_coredump *gt)
> >  {
> >  	struct i915_vma_compress *compress;
> >  
> > -	compress = kmalloc(sizeof(*compress), ALLOW_FAIL);
> > +	compress = kmalloc(sizeof(*compress), ATOMIC_MAYFAIL);
> >  	if (!compress)
> >  		return NULL;
> >  
> > @@ -1811,11 +1810,11 @@ i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask)
> >  	if (IS_ERR(error))
> >  		return error;
> >  
> > -	error = i915_gpu_coredump_alloc(i915, ALLOW_FAIL);
> > +	error = i915_gpu_coredump_alloc(i915, ATOMIC_MAYFAIL);
> >  	if (!error)
> >  		return ERR_PTR(-ENOMEM);
> >  
> > -	error->gt = intel_gt_coredump_alloc(gt, ALLOW_FAIL);
> > +	error->gt = intel_gt_coredump_alloc(gt, ATOMIC_MAYFAIL);
> >  	if (error->gt) {
> >  		struct i915_vma_compress *compress;
> >  
> > -- 
> > 2.32.0
> > 
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch

  reply	other threads:[~2021-08-17 16:17 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-16 13:51 [Intel-gfx] [PATCH 00/22] Clean up GuC CI failures, simplify locking, and kernel DOC Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 01/22] drm/i915/guc: Fix blocked context accounting Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 02/22] drm/i915/guc: Fix outstanding G2H accounting Matthew Brost
2021-08-17  9:39   ` Daniel Vetter
2021-08-17 18:17     ` Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 03/22] drm/i915/guc: Unwind context requests in reverse order Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 04/22] drm/i915/guc: Don't drop ce->guc_active.lock when unwinding context Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 05/22] drm/i915/guc: Workaround reset G2H is received after schedule done G2H Matthew Brost
2021-08-17  9:32   ` Daniel Vetter
2021-08-17 15:03     ` Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 06/22] drm/i915/execlists: Do not propagate errors to dependent fences Matthew Brost
2021-08-17  9:21   ` Daniel Vetter
2021-08-17 15:08     ` Matthew Brost
2021-08-17 15:49       ` Daniel Vetter
2021-08-16 13:51 ` [Intel-gfx] [PATCH 07/22] drm/i915/selftests: Add a cancel request selftest that triggers a reset Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 08/22] drm/i915/guc: Don't enable scheduling on a banned context, guc_id invalid, not registered Matthew Brost
2021-08-17  9:47   ` Daniel Vetter
2021-08-17  9:57     ` Daniel Vetter
2021-08-17 16:44     ` Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 09/22] drm/i915/selftests: Fix memory corruption in live_lrc_isolation Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 10/22] drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 11/22] drm/i915/guc: Take context ref when cancelling request Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 12/22] drm/i915/guc: Don't touch guc_state.sched_state without a lock Matthew Brost
2021-08-17  7:21   ` kernel test robot
2021-08-16 13:51 ` [Intel-gfx] [PATCH 13/22] drm/i915/guc: Reset LRC descriptor if register returns -ENODEV Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 14/22] drm/i915: Allocate error capture in atomic context Matthew Brost
2021-08-17 10:06   ` Daniel Vetter
2021-08-17 16:12     ` Matthew Brost [this message]
2021-08-16 13:51 ` [Intel-gfx] [PATCH 15/22] drm/i915/guc: Flush G2H work queue during reset Matthew Brost
2021-08-17 10:06   ` Daniel Vetter
2021-08-16 13:51 ` [Intel-gfx] [PATCH 16/22] drm/i915/guc: Release submit fence from an IRQ Matthew Brost
2021-08-17 10:08   ` Daniel Vetter
2021-08-16 13:51 ` [Intel-gfx] [PATCH 17/22] drm/i915/guc: Move guc_blocked fence to struct guc_state Matthew Brost
2021-08-17 10:10   ` Daniel Vetter
2021-08-16 13:51 ` [Intel-gfx] [PATCH 18/22] drm/i915/guc: Rework and simplify locking Matthew Brost
2021-08-17 10:15   ` Daniel Vetter
2021-08-17 15:30     ` Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 19/22] drm/i915/guc: Proper xarray usage for contexts_lookup Matthew Brost
2021-08-17 10:27   ` Daniel Vetter
2021-08-17 15:26     ` Matthew Brost
2021-08-17 17:13       ` Daniel Vetter
2021-08-17 17:13         ` Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 20/22] drm/i915/guc: Drop pin count check trick between sched_disable and re-pin Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 21/22] drm/i915/guc: Move GuC priority fields in context under guc_active Matthew Brost
2021-08-16 13:51 ` [Intel-gfx] [PATCH 22/22] drm/i915/guc: Add GuC kernel doc Matthew Brost
2021-08-17 11:11   ` Daniel Vetter
2021-08-17 16:36     ` Matthew Brost
2021-08-17 17:20       ` Daniel Vetter
2021-08-17 17:27         ` Michal Wajdeczko
2021-08-17 17:34           ` Daniel Vetter
2021-08-17 20:41             ` Michal Wajdeczko
2021-08-17 21:49               ` Daniel Vetter
2021-08-17 12:49 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clean up GuC CI failures, simplify locking, and kernel DOC (rev2) Patchwork
2021-08-17 12:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-17 13:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-17 14:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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