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From: Matt Roper <matthew.d.roper@intel.com>
To: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
Cc: intel-gfx@lists.freedesktop.org, CQ Tang <cq.tang@intel.com>
Subject: Re: [Intel-gfx] [PATCH V5 1/5] drm/i915/gt: Add support of mocs propagation
Date: Tue, 14 Sep 2021 20:39:02 -0700	[thread overview]
Message-ID: <20210915033902.GF3389343@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <20210903092153.535736-2-ayaz.siddiqui@intel.com>

On Fri, Sep 03, 2021 at 02:51:49PM +0530, Ayaz A Siddiqui wrote:
> Now there are lots of Command and registers that require mocs index
> programming.
> So propagating mocs_index from mocs to gt so that it can be
> used directly without having platform-specific checks.
> 
> V2:
> Changed 'i915_mocs_index_gt' to anonymous structure.
> 
> Cc: CQ Tang<cq.tang@intel.com>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt.c       |  2 ++
>  drivers/gpu/drm/i915/gt/intel_gt_types.h |  4 ++++
>  drivers/gpu/drm/i915/gt/intel_mocs.c     | 13 +++++++++++++
>  drivers/gpu/drm/i915/gt/intel_mocs.h     |  1 +
>  4 files changed, 20 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 62d40c9866427..2aeaae036a6f8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -682,6 +682,8 @@ int intel_gt_init(struct intel_gt *gt)
>  		goto err_pm;
>  	}
>  
> +	set_mocs_index(gt);
> +
>  	err = intel_engines_init(gt);
>  	if (err)
>  		goto err_engines;
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index a81e21bf1bd1a..6fdcde64c1800 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -192,6 +192,10 @@ struct intel_gt {
>  
>  		unsigned long mslice_mask;
>  	} info;
> +
> +	struct {
> +		u8 uc_index;
> +	} mocs;
>  };
>  
>  enum intel_gt_scratch_field {
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 582c4423b95d6..7ccac15d9a331 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -22,6 +22,7 @@ struct drm_i915_mocs_table {
>  	unsigned int size;
>  	unsigned int n_entries;
>  	const struct drm_i915_mocs_entry *table;
> +	u8 uc_index;
>  };
>  
>  /* Defines for the tables (XXX_MOCS_0 - XXX_MOCS_63) */
> @@ -340,14 +341,18 @@ static unsigned int get_mocs_settings(const struct drm_i915_private *i915,
>  {
>  	unsigned int flags;
>  
> +	memset(table, 0, sizeof(struct drm_i915_mocs_table));
> +
>  	if (IS_DG1(i915)) {
>  		table->size = ARRAY_SIZE(dg1_mocs_table);
>  		table->table = dg1_mocs_table;
> +		table->uc_index = 1;
>  		table->n_entries = GEN9_NUM_MOCS_ENTRIES;
>  	} else if (GRAPHICS_VER(i915) >= 12) {
>  		table->size  = ARRAY_SIZE(tgl_mocs_table);
>  		table->table = tgl_mocs_table;
>  		table->n_entries = GEN9_NUM_MOCS_ENTRIES;
> +		table->uc_index = 3;
>  	} else if (GRAPHICS_VER(i915) == 11) {
>  		table->size  = ARRAY_SIZE(icl_mocs_table);
>  		table->table = icl_mocs_table;
> @@ -504,6 +509,14 @@ static u32 global_mocs_offset(void)
>  	return i915_mmio_reg_offset(GEN12_GLOBAL_MOCS(0));
>  }
>  
> +void set_mocs_index(struct intel_gt *gt)

Hi Ayaz,

I overlooked it when doing my review before, but for non-static
functions like this we should have a proper function name prefix
(intel_* in this case).

Would you mind writing a small patch to rename this?

Thanks.


Matt

> +{
> +	struct drm_i915_mocs_table table;
> +
> +	get_mocs_settings(gt->i915, &table);
> +	gt->mocs.uc_index = table.uc_index;
> +}
> +
>  void intel_mocs_init(struct intel_gt *gt)
>  {
>  	struct drm_i915_mocs_table table;
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.h b/drivers/gpu/drm/i915/gt/intel_mocs.h
> index d83274f5163bd..8a09d64b115f7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.h
> @@ -36,5 +36,6 @@ struct intel_gt;
>  
>  void intel_mocs_init(struct intel_gt *gt);
>  void intel_mocs_init_engine(struct intel_engine_cs *engine);
> +void set_mocs_index(struct intel_gt *gt);
>  
>  #endif
> -- 
> 2.26.2
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

  reply	other threads:[~2021-09-15  3:39 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-03  9:21 [Intel-gfx] [PATCH V5 0/5] drm/i915/gt: Initialize unused MOCS entries to L3_WB Ayaz A Siddiqui
2021-09-03  9:21 ` [Intel-gfx] [PATCH V5 1/5] drm/i915/gt: Add support of mocs propagation Ayaz A Siddiqui
2021-09-15  3:39   ` Matt Roper [this message]
2021-09-16  7:13     ` Siddiqui, Ayaz A
2021-09-03  9:21 ` [Intel-gfx] [PATCH V5 2/5] drm/i915/gt: Set CMD_CCTL to UC for Gen12 Onward Ayaz A Siddiqui
2021-09-03  9:21 ` [Intel-gfx] [PATCH V5 3/5] drm/i915/gt: Set BLIT_CCTL reg to un-cached Ayaz A Siddiqui
2021-09-03  9:21 ` [Intel-gfx] [PATCH V5 4/5] drm/i915/gt: Initialize unused MOCS entries with device specific values Ayaz A Siddiqui
2021-09-03  9:21 ` [Intel-gfx] [PATCH V5 5/5] drm/i915/gt: Initialize L3CC table in mocs init Ayaz A Siddiqui
2021-09-03  9:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Initialize unused MOCS entries to L3_WB Patchwork
2021-09-03 10:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-03 11:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-03 12:58 ` [Intel-gfx] [PATCH V5 0/5] " Siddiqui, Ayaz A
2021-09-03 13:41   ` Kattamanchi, JaswanthX
2021-09-03 15:20     ` Ramalingam C
2021-09-03 13:35 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork

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