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* [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
@ 2022-10-24 18:40 Alan Previn
  2022-10-24 23:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/1] " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 9+ messages in thread
From: Alan Previn @ 2022-10-24 18:40 UTC (permalink / raw)
  To: intel-gfx

Previously, we only used PXP FW interface version-42 structures for
PXP arbitration session on ADL/TGL products and version-43 for HuC
authentication on DG2. That worked fine despite not differentiating such
versioning of the PXP firmware interaction structures. This was okay
back then because the only commands used via version 42 was not
used via version 43 and vice versa.

With MTL, we'll need both these versions side by side for the same
commands (PXP-session) with the older platform feature support. That
said, let's create separate files to define the structures and definitions
for both version-42 and 43 of PXP FW interfaces.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 .../drm/i915/pxp/intel_pxp_cmd_interface_42.h | 39 +++++++++++++
 .../drm/i915/pxp/intel_pxp_cmd_interface_43.h | 45 +++++++++++++++
 .../i915/pxp/intel_pxp_cmd_interface_cmn.h    | 27 +++++++++
 drivers/gpu/drm/i915/pxp/intel_pxp_huc.c      | 20 +++----
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c      | 12 ++--
 .../drm/i915/pxp/intel_pxp_tee_interface.h    | 57 -------------------
 6 files changed, 127 insertions(+), 73 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
 delete mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
new file mode 100644
index 000000000000..501012d3084d
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_FW_INTERFACE_42_H__
+#define __INTEL_PXP_FW_INTERFACE_42_H__
+
+#include <linux/types.h>
+#include "intel_pxp_cmd_interface_cmn.h"
+
+/* PXP API Version 42 Core Definitions */
+#define PXP42_APIVER 0x00040002
+
+/* PXP-Cmd-Op definitions */
+#define PXP42_CMDID_INIT_SESSION 0x1e
+
+/* PXP-In/Out-Cmd-Header */
+struct pxp42_cmd_header {
+	struct pxpcmn_cmd_header header;
+	u32 status;
+	/* Length of the message (excluding the header) */
+	u32 buffer_len;
+} __packed;
+
+/* PXP-Input-Packet: Create-Arb-Session */
+#define PXP42_INIT_SESSION_PROTECTION_ARB 0x2
+struct pxp42_create_arb_in {
+	struct pxp42_cmd_header header;
+	u32 protection_mode;
+	u32 session_id;
+} __packed;
+
+/* PXP-Output-Packet: Create-Arb-Session */
+struct pxp42_create_arb_out {
+	struct pxp42_cmd_header header;
+} __packed;
+
+#endif /* __INTEL_PXP_FW_INTERFACE_42_H__ */
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
new file mode 100644
index 000000000000..d7d93876bbef
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2022, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_FW_INTERFACE_43_H__
+#define __INTEL_PXP_FW_INTERFACE_43_H__
+
+#include <linux/types.h>
+#include "intel_pxp_cmd_interface_cmn.h"
+
+/* PXP API Version 43 Core Definitions */
+#define PXP43_APIVER 0x00040003
+#define PXP43_MAX_HECI_IN_SIZE (32 * 1024)
+#define PXP43_MAX_HECI_OUT_SIZE (32 * 1024)
+
+/* PXP-Cmd-Op definitions */
+#define PXP43_CMDID_START_HUC_AUTH 0x0000003A
+
+/* PXP-In/Out-Cmd-Header */
+struct pxp43_cmd_header {
+	struct pxpcmn_cmd_header header;
+	u32 in_out_data;
+	/* Length of the message (excluding the header) */
+	u32 buffer_len;
+} __packed;
+
+/* PXP-Input-Packet: HUC-Authentication */
+struct pxp43_start_huc_auth_in {
+	struct pxpcmn_cmd_header header;
+	u32 status;
+	/* Length of the message (excluding the header) */
+	u32 buffer_len;
+	__le64                  huc_base_address;
+} __packed;
+
+/* PXP-Output-Packet: HUC-Authentication */
+struct pxp43_start_huc_auth_out {
+	struct pxpcmn_cmd_header header;
+	u32 status;
+	/* Length of the message (excluding the header) */
+	u32 buffer_len;
+} __packed;
+
+#endif /* __INTEL_PXP_FW_INTERFACE_43_H__ */
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
new file mode 100644
index 000000000000..5c301ddc55e2
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2022, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_FW_INTERFACE_CMN_H__
+#define __INTEL_PXP_FW_INTERFACE_CMN_H__
+
+#include <linux/types.h>
+
+/*
+ * there are a lot of status codes for PXP, but we only define the cross-API
+ * common ones that we actually can handle in the kernel driver. Other failure
+ * codes should be printed to error msg for debug.
+ */
+enum pxp_status {
+	PXP_STATUS_SUCCESS = 0x0,
+	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
+};
+
+/* Common PXP FW message header */
+struct pxpcmn_cmd_header {
+	u32 api_version;
+	u32 command_id;
+} __packed;
+
+#endif /* __INTEL_PXP_FW_INTERFACE_CMN_H__ */
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
index 7ec36d94e758..ea8389d54963 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
@@ -13,14 +13,14 @@
 #include "intel_pxp_huc.h"
 #include "intel_pxp_tee.h"
 #include "intel_pxp_types.h"
-#include "intel_pxp_tee_interface.h"
+#include "intel_pxp_cmd_interface_43.h"
 
 int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
 {
 	struct intel_gt *gt = pxp_to_gt(pxp);
 	struct intel_huc *huc = &gt->uc.huc;
-	struct pxp_tee_start_huc_auth_in huc_in = {0};
-	struct pxp_tee_start_huc_auth_out huc_out = {0};
+	struct pxp43_start_huc_auth_in huc_in = {0};
+	struct pxp43_start_huc_auth_out huc_out = {0};
 	dma_addr_t huc_phys_addr;
 	u8 client_id = 0;
 	u8 fence_id = 0;
@@ -32,10 +32,10 @@ int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
 	huc_phys_addr = i915_gem_object_get_dma_address(huc->fw.obj, 0);
 
 	/* write the PXP message into the lmem (the sg list) */
-	huc_in.header.api_version = PXP_TEE_43_APIVER;
-	huc_in.header.command_id  = PXP_TEE_43_START_HUC_AUTH;
-	huc_in.header.status      = 0;
-	huc_in.header.buffer_len  = sizeof(huc_in.huc_base_address);
+	huc_in.header.api_version = PXP43_APIVER;
+	huc_in.header.command_id  = PXP43_CMDID_START_HUC_AUTH;
+	huc_in.status             = 0;
+	huc_in.buffer_len         = sizeof(huc_in.huc_base_address);
 	huc_in.huc_base_address   = huc_phys_addr;
 
 	err = intel_pxp_tee_stream_message(pxp, client_id, fence_id,
@@ -57,11 +57,11 @@ int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
 	 * returned with HuC not loaded we'll still catch it when we check the
 	 * authentication bit later.
 	 */
-	if (huc_out.header.status != PXP_STATUS_SUCCESS &&
-	    huc_out.header.status != PXP_STATUS_OP_NOT_PERMITTED) {
+	if (huc_out.status != PXP_STATUS_SUCCESS &&
+	    huc_out.status != PXP_STATUS_OP_NOT_PERMITTED) {
 		drm_err(&gt->i915->drm,
 			"HuC load failed with GSC error = 0x%x\n",
-			huc_out.header.status);
+			huc_out.status);
 		return -EPROTO;
 	}
 
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index 052fd2f9a583..7226becc0a82 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -14,7 +14,7 @@
 #include "intel_pxp.h"
 #include "intel_pxp_session.h"
 #include "intel_pxp_tee.h"
-#include "intel_pxp_tee_interface.h"
+#include "intel_pxp_cmd_interface_42.h"
 #include "intel_pxp_huc.h"
 
 static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
@@ -286,14 +286,14 @@ int intel_pxp_tee_cmd_create_arb_session(struct intel_pxp *pxp,
 					 int arb_session_id)
 {
 	struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
-	struct pxp_tee_create_arb_in msg_in = {0};
-	struct pxp_tee_create_arb_out msg_out = {0};
+	struct pxp42_create_arb_in msg_in = {0};
+	struct pxp42_create_arb_out msg_out = {0};
 	int ret;
 
-	msg_in.header.api_version = PXP_TEE_APIVER;
-	msg_in.header.command_id = PXP_TEE_ARB_CMDID;
+	msg_in.header.header.api_version = PXP42_APIVER;
+	msg_in.header.header.command_id = PXP42_CMDID_INIT_SESSION;
 	msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header);
-	msg_in.protection_mode = PXP_TEE_ARB_PROTECTION_MODE;
+	msg_in.protection_mode = PXP42_INIT_SESSION_PROTECTION_ARB;
 	msg_in.session_id = arb_session_id;
 
 	ret = intel_pxp_tee_io_message(pxp,
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
deleted file mode 100644
index 7edc1760f142..000000000000
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright(c) 2020-2022, Intel Corporation. All rights reserved.
- */
-
-#ifndef __INTEL_PXP_TEE_INTERFACE_H__
-#define __INTEL_PXP_TEE_INTERFACE_H__
-
-#include <linux/types.h>
-
-#define PXP_TEE_APIVER 0x40002
-#define PXP_TEE_43_APIVER 0x00040003
-#define PXP_TEE_ARB_CMDID 0x1e
-#define PXP_TEE_ARB_PROTECTION_MODE 0x2
-#define PXP_TEE_43_START_HUC_AUTH   0x0000003A
-
-/*
- * there are a lot of status codes for PXP, but we only define the ones we
- * actually can handle in the driver. other failure codes will be printed to
- * error msg for debug.
- */
-enum pxp_status {
-	PXP_STATUS_SUCCESS = 0x0,
-	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
-};
-
-/* PXP TEE message header */
-struct pxp_tee_cmd_header {
-	u32 api_version;
-	u32 command_id;
-	u32 status;
-	/* Length of the message (excluding the header) */
-	u32 buffer_len;
-} __packed;
-
-/* PXP TEE message input to create a arbitrary session */
-struct pxp_tee_create_arb_in {
-	struct pxp_tee_cmd_header header;
-	u32 protection_mode;
-	u32 session_id;
-} __packed;
-
-/* PXP TEE message output to create a arbitrary session */
-struct pxp_tee_create_arb_out {
-	struct pxp_tee_cmd_header header;
-} __packed;
-
-struct pxp_tee_start_huc_auth_in {
-	struct pxp_tee_cmd_header header;
-	__le64                    huc_base_address;
-};
-
-struct pxp_tee_start_huc_auth_out {
-	struct pxp_tee_cmd_header header;
-};
-
-#endif /* __INTEL_PXP_TEE_INTERFACE_H__ */

base-commit: 92b40b6e1d54d68a766c1545b9ace3e2eccad94a
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
  2022-10-24 18:40 [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43 Alan Previn
@ 2022-10-24 23:58 ` Patchwork
  2022-10-24 23:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2022-10-24 23:58 UTC (permalink / raw)
  To: Alan Previn; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
URL   : https://patchwork.freedesktop.org/series/110084/
State : warning

== Summary ==

Error: dim checkpatch failed
493d5c1d6f7b drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 11, in <module>
    import git
ModuleNotFoundError: No module named 'git'
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 11, in <module>
    import git
ModuleNotFoundError: No module named 'git'
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 11, in <module>
    import git
ModuleNotFoundError: No module named 'git'
-:22: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#22: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 183 lines checked



^ permalink raw reply	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
  2022-10-24 18:40 [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43 Alan Previn
  2022-10-24 23:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/1] " Patchwork
@ 2022-10-24 23:59 ` Patchwork
  2022-10-25  0:21 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
  2022-11-01 23:17 ` [Intel-gfx] [PATCH 1/1] " Ceraolo Spurio, Daniele
  3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2022-10-24 23:59 UTC (permalink / raw)
  To: Alan Previn; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
URL   : https://patchwork.freedesktop.org/series/110084/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/pxp/intel_pxp_huc.c:39:35:    expected restricted __le64 [assigned] [usertype] huc_base_address
+drivers/gpu/drm/i915/pxp/intel_pxp_huc.c:39:35:    got unsigned long long [assigned] [usertype] huc_phys_addr
+drivers/gpu/drm/i915/pxp/intel_pxp_huc.c:39:35: warning: incorrect type in assignment (different base types)
-O:drivers/gpu/drm/i915/pxp/intel_pxp_huc.c:39:35:    expected restricted __le64 [assigned] [usertype] huc_base_address
-O:drivers/gpu/drm/i915/pxp/intel_pxp_huc.c:39:35:    got unsigned long long [assigned] [usertype] huc_phys_addr
-O:drivers/gpu/drm/i915/pxp/intel_pxp_huc.c:39:35: warning: incorrect type in assignment (different base types)



^ permalink raw reply	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
  2022-10-24 18:40 [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43 Alan Previn
  2022-10-24 23:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/1] " Patchwork
  2022-10-24 23:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-10-25  0:21 ` Patchwork
  2022-10-26 20:56   ` Teres Alexis, Alan Previn
  2022-11-01 23:17 ` [Intel-gfx] [PATCH 1/1] " Ceraolo Spurio, Daniele
  3 siblings, 1 reply; 9+ messages in thread
From: Patchwork @ 2022-10-25  0:21 UTC (permalink / raw)
  To: Alan Previn; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 9044 bytes --]

== Series Details ==

Series: series starting with [1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
URL   : https://patchwork.freedesktop.org/series/110084/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12288 -> Patchwork_110084v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_110084v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_110084v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/index.html

Participating hosts (41 -> 41)
------------------------------

  Additional (1): bat-atsm-1 
  Missing    (1): fi-ctg-p8600 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_110084v1:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@hugepages:
    - fi-rkl-guc:         [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-rkl-guc/igt@i915_selftest@live@hugepages.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-rkl-guc/igt@i915_selftest@live@hugepages.html
    - fi-skl-guc:         [PASS][3] -> [DMESG-FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-skl-guc/igt@i915_selftest@live@hugepages.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-skl-guc/igt@i915_selftest@live@hugepages.html
    - fi-icl-u2:          [PASS][5] -> [DMESG-FAIL][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-icl-u2/igt@i915_selftest@live@hugepages.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-icl-u2/igt@i915_selftest@live@hugepages.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@hugepages:
    - {fi-tgl-dsi}:       NOTRUN -> [DMESG-FAIL][7]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-tgl-dsi/igt@i915_selftest@live@hugepages.html

  
Known issues
------------

  Here are the changes found in Patchwork_110084v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_render_tiled_blits@basic:
    - fi-apl-guc:         [PASS][8] -> [INCOMPLETE][9] ([i915#7056])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-apl-guc/igt@gem_render_tiled_blits@basic.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-apl-guc/igt@gem_render_tiled_blits@basic.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-g3258:       [PASS][10] -> [INCOMPLETE][11] ([i915#3303] / [i915#4785])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html

  * igt@i915_suspend@basic-s3-without-i915:
    - fi-kbl-x1275:       NOTRUN -> [SKIP][12] ([fdo#109271])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-kbl-x1275/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-hsw-4770:        NOTRUN -> [SKIP][13] ([fdo#109271] / [fdo#111827])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-hsw-4770/igt@kms_chamelium@common-hpd-after-suspend.html
    - fi-kbl-x1275:       NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-kbl-x1275/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
    - fi-bsw-kefka:       [PASS][15] -> [FAIL][16] ([i915#6298])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html

  * igt@runner@aborted:
    - fi-icl-u2:          NOTRUN -> [FAIL][17] ([i915#4312])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-icl-u2/igt@runner@aborted.html
    - fi-rkl-guc:         NOTRUN -> [FAIL][18] ([i915#4312])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-rkl-guc/igt@runner@aborted.html
    - fi-skl-guc:         NOTRUN -> [FAIL][19] ([i915#4312])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-skl-guc/igt@runner@aborted.html
    - fi-hsw-g3258:       NOTRUN -> [FAIL][20] ([fdo#109271] / [i915#4312] / [i915#4991])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-hsw-g3258/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@basic-rte:
    - {bat-rplp-1}:       [DMESG-WARN][21] -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/bat-rplp-1/igt@i915_pm_rpm@basic-rte.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/bat-rplp-1/igt@i915_pm_rpm@basic-rte.html

  * igt@i915_selftest@live@gt_lrc:
    - {fi-tgl-dsi}:       [INCOMPLETE][23] ([i915#6856] / [i915#7125]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-tgl-dsi/igt@i915_selftest@live@gt_lrc.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-tgl-dsi/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [INCOMPLETE][25] ([i915#4785]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@hugepages:
    - fi-kbl-x1275:       [DMESG-FAIL][27] -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-kbl-x1275/igt@i915_selftest@live@hugepages.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-kbl-x1275/igt@i915_selftest@live@hugepages.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1759]: https://gitlab.freedesktop.org/drm/intel/issues/1759
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
  [i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
  [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6856]: https://gitlab.freedesktop.org/drm/intel/issues/6856
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7029]: https://gitlab.freedesktop.org/drm/intel/issues/7029
  [i915#7030]: https://gitlab.freedesktop.org/drm/intel/issues/7030
  [i915#7056]: https://gitlab.freedesktop.org/drm/intel/issues/7056
  [i915#7125]: https://gitlab.freedesktop.org/drm/intel/issues/7125


Build changes
-------------

  * Linux: CI_DRM_12288 -> Patchwork_110084v1

  CI-20190529: 20190529
  CI_DRM_12288: 61a92db3f6785121281a51f95960a3282d47117d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7025: f8b8e0713f87460a2c050ec8fe18fa487f98e228 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_110084v1: 61a92db3f6785121281a51f95960a3282d47117d @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

e1c54a0f3162 drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/index.html

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^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx]  ✗ Fi.CI.BAT: failure for series starting with [1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
  2022-10-25  0:21 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2022-10-26 20:56   ` Teres Alexis, Alan Previn
  0 siblings, 0 replies; 9+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-10-26 20:56 UTC (permalink / raw)
  To: intel-gfx

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The issues reported below are unrelated to the patch because:
1. SKL and ICL do not even support PXP and none of the code path of this series will get executed.
2. RKL supports PXP but the code paths only get executed when PXP is enabled by the component binding and activated (via IGT PXP) whereas the failure was on "[IGT] i915_selftest: starting dynamic subtest hugepages" and no PXP code paths executed.

Thus these failures are unrelated.


On Tue, 2022-10-25 at 00:21 +0000, Patchwork wrote:
Patch Details
Series: series starting with [1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
URL:    https://patchwork.freedesktop.org/series/110084/
State:  failure
Details:        https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/index.html
CI Bug Log - changes from CI_DRM_12288 -> Patchwork_110084v1
Summary

FAILURE

Serious unknown changes coming with Patchwork_110084v1 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_110084v1, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/index.html

Participating hosts (41 -> 41)

Additional (1): bat-atsm-1
Missing (1): fi-ctg-p8600

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_110084v1:

IGT changes
Possible regressions

  *   igt@i915_selftest@live@hugepages:

     *   fi-rkl-guc: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-rkl-guc/igt@i915_selftest@live@hugepages.html> -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-rkl-guc/igt@i915_selftest@live@hugepages.html>

     *   fi-skl-guc: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-skl-guc/igt@i915_selftest@live@hugepages.html> -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-skl-guc/igt@i915_selftest@live@hugepages.html>

     *   fi-icl-u2: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12288/fi-icl-u2/igt@i915_selftest@live@hugepages.html> -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-icl-u2/igt@i915_selftest@live@hugepages.html>

Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *   igt@i915_selftest@live@hugepages:
     *   {fi-tgl-dsi}: NOTRUN -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110084v1/fi-tgl-dsi/igt@i915_selftest@live@hugepages.html>

Known issues

Here are the changes found in Patchwork_110084v1 that come from known issues:

I

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^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
  2022-10-24 18:40 [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43 Alan Previn
                   ` (2 preceding siblings ...)
  2022-10-25  0:21 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2022-11-01 23:17 ` Ceraolo Spurio, Daniele
  2022-11-02  9:35   ` Jani Nikula
  3 siblings, 1 reply; 9+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-11-01 23:17 UTC (permalink / raw)
  To: Alan Previn, intel-gfx



On 10/24/2022 11:40 AM, Alan Previn wrote:
> Previously, we only used PXP FW interface version-42 structures for
> PXP arbitration session on ADL/TGL products and version-43 for HuC
> authentication on DG2. That worked fine despite not differentiating such
> versioning of the PXP firmware interaction structures. This was okay
> back then because the only commands used via version 42 was not
> used via version 43 and vice versa.
>
> With MTL, we'll need both these versions side by side for the same
> commands (PXP-session) with the older platform feature support. That
> said, let's create separate files to define the structures and definitions
> for both version-42 and 43 of PXP FW interfaces.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
>   .../drm/i915/pxp/intel_pxp_cmd_interface_42.h | 39 +++++++++++++
>   .../drm/i915/pxp/intel_pxp_cmd_interface_43.h | 45 +++++++++++++++
>   .../i915/pxp/intel_pxp_cmd_interface_cmn.h    | 27 +++++++++
>   drivers/gpu/drm/i915/pxp/intel_pxp_huc.c      | 20 +++----
>   drivers/gpu/drm/i915/pxp/intel_pxp_tee.c      | 12 ++--
>   .../drm/i915/pxp/intel_pxp_tee_interface.h    | 57 -------------------
>   6 files changed, 127 insertions(+), 73 deletions(-)
>   create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
>   create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
>   create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
>   delete mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
>
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
> new file mode 100644
> index 000000000000..501012d3084d
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
> @@ -0,0 +1,39 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright(c) 2020, Intel Corporation. All rights reserved.
> + */
> +
> +#ifndef __INTEL_PXP_FW_INTERFACE_42_H__
> +#define __INTEL_PXP_FW_INTERFACE_42_H__
> +
> +#include <linux/types.h>
> +#include "intel_pxp_cmd_interface_cmn.h"
> +
> +/* PXP API Version 42 Core Definitions */
> +#define PXP42_APIVER 0x00040002

Is it worth having a unified macro for this instead of 2 separate 
defines for 42 and 43? e.g

#define PXP_APIVER(x, y) (x << 16 | y)

And then use PXP_APIVER(4, 2) or PXP_APIVER(4, 3). Just a suggestion, 
not a blocker.

> +
> +/* PXP-Cmd-Op definitions */
> +#define PXP42_CMDID_INIT_SESSION 0x1e

This might be better off closer to the matching structure. Not a blocker.

> +
> +/* PXP-In/Out-Cmd-Header */
> +struct pxp42_cmd_header {
> +	struct pxpcmn_cmd_header header;
> +	u32 status;
> +	/* Length of the message (excluding the header) */
> +	u32 buffer_len;
> +} __packed;

The PXP specs indicate that the header is common between v42 and v43, 
with one field being considered a union, so we can just define it as 
fully shared in the common file. Something like:

struct pxp_cmd_header {
         u32 api_version;
         u32 command_id;
         union {
                 u32 status;        /* out */
                 u32 stream id;  /* in */
         }
         u32 buffer_len;
}



> +
> +/* PXP-Input-Packet: Create-Arb-Session */
> +#define PXP42_INIT_SESSION_PROTECTION_ARB 0x2

I was a bit confused by the comment above the define, took me a moment 
to understand that the define is not of the command ID matching the 
packed, but one of the possible values of one of the fields. Maybe move 
it inside the structure and below the matching variable like we usually do?

> +struct pxp42_create_arb_in {
> +	struct pxp42_cmd_header header;
> +	u32 protection_mode;
> +	u32 session_id;
> +} __packed;
> +
> +/* PXP-Output-Packet: Create-Arb-Session */
> +struct pxp42_create_arb_out {
> +	struct pxp42_cmd_header header;
> +} __packed;
> +
> +#endif /* __INTEL_PXP_FW_INTERFACE_42_H__ */
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
> new file mode 100644
> index 000000000000..d7d93876bbef
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
> @@ -0,0 +1,45 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright(c) 2022, Intel Corporation. All rights reserved.
> + */
> +
> +#ifndef __INTEL_PXP_FW_INTERFACE_43_H__
> +#define __INTEL_PXP_FW_INTERFACE_43_H__
> +
> +#include <linux/types.h>
> +#include "intel_pxp_cmd_interface_cmn.h"
> +
> +/* PXP API Version 43 Core Definitions */
> +#define PXP43_APIVER 0x00040003
> +#define PXP43_MAX_HECI_IN_SIZE (32 * 1024)
> +#define PXP43_MAX_HECI_OUT_SIZE (32 * 1024)

Those MAX_HECI defines are unused

Daniele

> +
> +/* PXP-Cmd-Op definitions */
> +#define PXP43_CMDID_START_HUC_AUTH 0x0000003A
> +
> +/* PXP-In/Out-Cmd-Header */
> +struct pxp43_cmd_header {
> +	struct pxpcmn_cmd_header header;
> +	u32 in_out_data;
> +	/* Length of the message (excluding the header) */
> +	u32 buffer_len;
> +} __packed;

This is unused (but anyway superseded by previous comment about the 
unified header)

> +
> +/* PXP-Input-Packet: HUC-Authentication */
> +struct pxp43_start_huc_auth_in {
> +	struct pxpcmn_cmd_header header;
> +	u32 status;
> +	/* Length of the message (excluding the header) */
> +	u32 buffer_len;
> +	__le64                  huc_base_address;
> +} __packed;
> +
> +/* PXP-Output-Packet: HUC-Authentication */
> +struct pxp43_start_huc_auth_out {
> +	struct pxpcmn_cmd_header header;
> +	u32 status;
> +	/* Length of the message (excluding the header) */
> +	u32 buffer_len;
> +} __packed;
> +
> +#endif /* __INTEL_PXP_FW_INTERFACE_43_H__ */
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
> new file mode 100644
> index 000000000000..5c301ddc55e2
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
> @@ -0,0 +1,27 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright(c) 2022, Intel Corporation. All rights reserved.
> + */
> +
> +#ifndef __INTEL_PXP_FW_INTERFACE_CMN_H__
> +#define __INTEL_PXP_FW_INTERFACE_CMN_H__
> +
> +#include <linux/types.h>
> +
> +/*
> + * there are a lot of status codes for PXP, but we only define the cross-API
> + * common ones that we actually can handle in the kernel driver. Other failure
> + * codes should be printed to error msg for debug.
> + */
> +enum pxp_status {
> +	PXP_STATUS_SUCCESS = 0x0,
> +	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
> +};
> +
> +/* Common PXP FW message header */
> +struct pxpcmn_cmd_header {
> +	u32 api_version;
> +	u32 command_id;
> +} __packed;
> +
> +#endif /* __INTEL_PXP_FW_INTERFACE_CMN_H__ */
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
> index 7ec36d94e758..ea8389d54963 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
> @@ -13,14 +13,14 @@
>   #include "intel_pxp_huc.h"
>   #include "intel_pxp_tee.h"
>   #include "intel_pxp_types.h"
> -#include "intel_pxp_tee_interface.h"
> +#include "intel_pxp_cmd_interface_43.h"
>   
>   int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
>   {
>   	struct intel_gt *gt = pxp_to_gt(pxp);
>   	struct intel_huc *huc = &gt->uc.huc;
> -	struct pxp_tee_start_huc_auth_in huc_in = {0};
> -	struct pxp_tee_start_huc_auth_out huc_out = {0};
> +	struct pxp43_start_huc_auth_in huc_in = {0};
> +	struct pxp43_start_huc_auth_out huc_out = {0};
>   	dma_addr_t huc_phys_addr;
>   	u8 client_id = 0;
>   	u8 fence_id = 0;
> @@ -32,10 +32,10 @@ int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
>   	huc_phys_addr = i915_gem_object_get_dma_address(huc->fw.obj, 0);
>   
>   	/* write the PXP message into the lmem (the sg list) */
> -	huc_in.header.api_version = PXP_TEE_43_APIVER;
> -	huc_in.header.command_id  = PXP_TEE_43_START_HUC_AUTH;
> -	huc_in.header.status      = 0;
> -	huc_in.header.buffer_len  = sizeof(huc_in.huc_base_address);
> +	huc_in.header.api_version = PXP43_APIVER;
> +	huc_in.header.command_id  = PXP43_CMDID_START_HUC_AUTH;
> +	huc_in.status             = 0;
> +	huc_in.buffer_len         = sizeof(huc_in.huc_base_address);
>   	huc_in.huc_base_address   = huc_phys_addr;
>   
>   	err = intel_pxp_tee_stream_message(pxp, client_id, fence_id,
> @@ -57,11 +57,11 @@ int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
>   	 * returned with HuC not loaded we'll still catch it when we check the
>   	 * authentication bit later.
>   	 */
> -	if (huc_out.header.status != PXP_STATUS_SUCCESS &&
> -	    huc_out.header.status != PXP_STATUS_OP_NOT_PERMITTED) {
> +	if (huc_out.status != PXP_STATUS_SUCCESS &&
> +	    huc_out.status != PXP_STATUS_OP_NOT_PERMITTED) {
>   		drm_err(&gt->i915->drm,
>   			"HuC load failed with GSC error = 0x%x\n",
> -			huc_out.header.status);
> +			huc_out.status);
>   		return -EPROTO;
>   	}
>   
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> index 052fd2f9a583..7226becc0a82 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> @@ -14,7 +14,7 @@
>   #include "intel_pxp.h"
>   #include "intel_pxp_session.h"
>   #include "intel_pxp_tee.h"
> -#include "intel_pxp_tee_interface.h"
> +#include "intel_pxp_cmd_interface_42.h"
>   #include "intel_pxp_huc.h"
>   
>   static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
> @@ -286,14 +286,14 @@ int intel_pxp_tee_cmd_create_arb_session(struct intel_pxp *pxp,
>   					 int arb_session_id)
>   {
>   	struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
> -	struct pxp_tee_create_arb_in msg_in = {0};
> -	struct pxp_tee_create_arb_out msg_out = {0};
> +	struct pxp42_create_arb_in msg_in = {0};
> +	struct pxp42_create_arb_out msg_out = {0};
>   	int ret;
>   
> -	msg_in.header.api_version = PXP_TEE_APIVER;
> -	msg_in.header.command_id = PXP_TEE_ARB_CMDID;
> +	msg_in.header.header.api_version = PXP42_APIVER;
> +	msg_in.header.header.command_id = PXP42_CMDID_INIT_SESSION;
>   	msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header);
> -	msg_in.protection_mode = PXP_TEE_ARB_PROTECTION_MODE;
> +	msg_in.protection_mode = PXP42_INIT_SESSION_PROTECTION_ARB;
>   	msg_in.session_id = arb_session_id;
>   
>   	ret = intel_pxp_tee_io_message(pxp,
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
> deleted file mode 100644
> index 7edc1760f142..000000000000
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
> +++ /dev/null
> @@ -1,57 +0,0 @@
> -/* SPDX-License-Identifier: MIT */
> -/*
> - * Copyright(c) 2020-2022, Intel Corporation. All rights reserved.
> - */
> -
> -#ifndef __INTEL_PXP_TEE_INTERFACE_H__
> -#define __INTEL_PXP_TEE_INTERFACE_H__
> -
> -#include <linux/types.h>
> -
> -#define PXP_TEE_APIVER 0x40002
> -#define PXP_TEE_43_APIVER 0x00040003
> -#define PXP_TEE_ARB_CMDID 0x1e
> -#define PXP_TEE_ARB_PROTECTION_MODE 0x2
> -#define PXP_TEE_43_START_HUC_AUTH   0x0000003A
> -
> -/*
> - * there are a lot of status codes for PXP, but we only define the ones we
> - * actually can handle in the driver. other failure codes will be printed to
> - * error msg for debug.
> - */
> -enum pxp_status {
> -	PXP_STATUS_SUCCESS = 0x0,
> -	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
> -};
> -
> -/* PXP TEE message header */
> -struct pxp_tee_cmd_header {
> -	u32 api_version;
> -	u32 command_id;
> -	u32 status;
> -	/* Length of the message (excluding the header) */
> -	u32 buffer_len;
> -} __packed;
> -
> -/* PXP TEE message input to create a arbitrary session */
> -struct pxp_tee_create_arb_in {
> -	struct pxp_tee_cmd_header header;
> -	u32 protection_mode;
> -	u32 session_id;
> -} __packed;
> -
> -/* PXP TEE message output to create a arbitrary session */
> -struct pxp_tee_create_arb_out {
> -	struct pxp_tee_cmd_header header;
> -} __packed;
> -
> -struct pxp_tee_start_huc_auth_in {
> -	struct pxp_tee_cmd_header header;
> -	__le64                    huc_base_address;
> -};
> -
> -struct pxp_tee_start_huc_auth_out {
> -	struct pxp_tee_cmd_header header;
> -};
> -
> -#endif /* __INTEL_PXP_TEE_INTERFACE_H__ */
>
> base-commit: 92b40b6e1d54d68a766c1545b9ace3e2eccad94a


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
  2022-11-01 23:17 ` [Intel-gfx] [PATCH 1/1] " Ceraolo Spurio, Daniele
@ 2022-11-02  9:35   ` Jani Nikula
  2022-11-08  3:48     ` Teres Alexis, Alan Previn
  0 siblings, 1 reply; 9+ messages in thread
From: Jani Nikula @ 2022-11-02  9:35 UTC (permalink / raw)
  To: Ceraolo Spurio, Daniele, Alan Previn, intel-gfx

On Tue, 01 Nov 2022, "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com> wrote:
> On 10/24/2022 11:40 AM, Alan Previn wrote:
>> Previously, we only used PXP FW interface version-42 structures for
>> PXP arbitration session on ADL/TGL products and version-43 for HuC
>> authentication on DG2. That worked fine despite not differentiating such
>> versioning of the PXP firmware interaction structures. This was okay
>> back then because the only commands used via version 42 was not
>> used via version 43 and vice versa.
>>
>> With MTL, we'll need both these versions side by side for the same
>> commands (PXP-session) with the older platform feature support. That
>> said, let's create separate files to define the structures and definitions
>> for both version-42 and 43 of PXP FW interfaces.
>>
>> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
>> ---
>>   .../drm/i915/pxp/intel_pxp_cmd_interface_42.h | 39 +++++++++++++
>>   .../drm/i915/pxp/intel_pxp_cmd_interface_43.h | 45 +++++++++++++++
>>   .../i915/pxp/intel_pxp_cmd_interface_cmn.h    | 27 +++++++++
>>   drivers/gpu/drm/i915/pxp/intel_pxp_huc.c      | 20 +++----
>>   drivers/gpu/drm/i915/pxp/intel_pxp_tee.c      | 12 ++--
>>   .../drm/i915/pxp/intel_pxp_tee_interface.h    | 57 -------------------
>>   6 files changed, 127 insertions(+), 73 deletions(-)
>>   create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
>>   create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
>>   create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
>>   delete mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
>>
>> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
>> new file mode 100644
>> index 000000000000..501012d3084d
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
>> @@ -0,0 +1,39 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright(c) 2020, Intel Corporation. All rights reserved.
>> + */
>> +
>> +#ifndef __INTEL_PXP_FW_INTERFACE_42_H__
>> +#define __INTEL_PXP_FW_INTERFACE_42_H__
>> +
>> +#include <linux/types.h>
>> +#include "intel_pxp_cmd_interface_cmn.h"
>> +
>> +/* PXP API Version 42 Core Definitions */
>> +#define PXP42_APIVER 0x00040002
>
> Is it worth having a unified macro for this instead of 2 separate 
> defines for 42 and 43? e.g
>
> #define PXP_APIVER(x, y) (x << 16 | y)
>
> And then use PXP_APIVER(4, 2) or PXP_APIVER(4, 3). Just a suggestion, 
> not a blocker.
>
>> +
>> +/* PXP-Cmd-Op definitions */
>> +#define PXP42_CMDID_INIT_SESSION 0x1e
>
> This might be better off closer to the matching structure. Not a blocker.
>
>> +
>> +/* PXP-In/Out-Cmd-Header */
>> +struct pxp42_cmd_header {
>> +	struct pxpcmn_cmd_header header;
>> +	u32 status;
>> +	/* Length of the message (excluding the header) */
>> +	u32 buffer_len;
>> +} __packed;
>
> The PXP specs indicate that the header is common between v42 and v43, 
> with one field being considered a union, so we can just define it as 
> fully shared in the common file. Something like:

Agreed. Using separate structs is going to lead to trouble with any
shared code.

BR,
Jani.


>
> struct pxp_cmd_header {
>          u32 api_version;
>          u32 command_id;
>          union {
>                  u32 status;        /* out */
>                  u32 stream id;  /* in */
>          }
>          u32 buffer_len;
> }
>
>
>
>> +
>> +/* PXP-Input-Packet: Create-Arb-Session */
>> +#define PXP42_INIT_SESSION_PROTECTION_ARB 0x2
>
> I was a bit confused by the comment above the define, took me a moment 
> to understand that the define is not of the command ID matching the 
> packed, but one of the possible values of one of the fields. Maybe move 
> it inside the structure and below the matching variable like we usually do?
>
>> +struct pxp42_create_arb_in {
>> +	struct pxp42_cmd_header header;
>> +	u32 protection_mode;
>> +	u32 session_id;
>> +} __packed;
>> +
>> +/* PXP-Output-Packet: Create-Arb-Session */
>> +struct pxp42_create_arb_out {
>> +	struct pxp42_cmd_header header;
>> +} __packed;
>> +
>> +#endif /* __INTEL_PXP_FW_INTERFACE_42_H__ */
>> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
>> new file mode 100644
>> index 000000000000..d7d93876bbef
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
>> @@ -0,0 +1,45 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright(c) 2022, Intel Corporation. All rights reserved.
>> + */
>> +
>> +#ifndef __INTEL_PXP_FW_INTERFACE_43_H__
>> +#define __INTEL_PXP_FW_INTERFACE_43_H__
>> +
>> +#include <linux/types.h>
>> +#include "intel_pxp_cmd_interface_cmn.h"
>> +
>> +/* PXP API Version 43 Core Definitions */
>> +#define PXP43_APIVER 0x00040003
>> +#define PXP43_MAX_HECI_IN_SIZE (32 * 1024)
>> +#define PXP43_MAX_HECI_OUT_SIZE (32 * 1024)
>
> Those MAX_HECI defines are unused
>
> Daniele
>
>> +
>> +/* PXP-Cmd-Op definitions */
>> +#define PXP43_CMDID_START_HUC_AUTH 0x0000003A
>> +
>> +/* PXP-In/Out-Cmd-Header */
>> +struct pxp43_cmd_header {
>> +	struct pxpcmn_cmd_header header;
>> +	u32 in_out_data;
>> +	/* Length of the message (excluding the header) */
>> +	u32 buffer_len;
>> +} __packed;
>
> This is unused (but anyway superseded by previous comment about the 
> unified header)
>
>> +
>> +/* PXP-Input-Packet: HUC-Authentication */
>> +struct pxp43_start_huc_auth_in {
>> +	struct pxpcmn_cmd_header header;
>> +	u32 status;
>> +	/* Length of the message (excluding the header) */
>> +	u32 buffer_len;
>> +	__le64                  huc_base_address;
>> +} __packed;
>> +
>> +/* PXP-Output-Packet: HUC-Authentication */
>> +struct pxp43_start_huc_auth_out {
>> +	struct pxpcmn_cmd_header header;
>> +	u32 status;
>> +	/* Length of the message (excluding the header) */
>> +	u32 buffer_len;
>> +} __packed;
>> +
>> +#endif /* __INTEL_PXP_FW_INTERFACE_43_H__ */
>> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
>> new file mode 100644
>> index 000000000000..5c301ddc55e2
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
>> @@ -0,0 +1,27 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright(c) 2022, Intel Corporation. All rights reserved.
>> + */
>> +
>> +#ifndef __INTEL_PXP_FW_INTERFACE_CMN_H__
>> +#define __INTEL_PXP_FW_INTERFACE_CMN_H__
>> +
>> +#include <linux/types.h>
>> +
>> +/*
>> + * there are a lot of status codes for PXP, but we only define the cross-API
>> + * common ones that we actually can handle in the kernel driver. Other failure
>> + * codes should be printed to error msg for debug.
>> + */
>> +enum pxp_status {
>> +	PXP_STATUS_SUCCESS = 0x0,
>> +	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
>> +};
>> +
>> +/* Common PXP FW message header */
>> +struct pxpcmn_cmd_header {
>> +	u32 api_version;
>> +	u32 command_id;
>> +} __packed;
>> +
>> +#endif /* __INTEL_PXP_FW_INTERFACE_CMN_H__ */
>> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
>> index 7ec36d94e758..ea8389d54963 100644
>> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
>> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
>> @@ -13,14 +13,14 @@
>>   #include "intel_pxp_huc.h"
>>   #include "intel_pxp_tee.h"
>>   #include "intel_pxp_types.h"
>> -#include "intel_pxp_tee_interface.h"
>> +#include "intel_pxp_cmd_interface_43.h"
>>   
>>   int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
>>   {
>>   	struct intel_gt *gt = pxp_to_gt(pxp);
>>   	struct intel_huc *huc = &gt->uc.huc;
>> -	struct pxp_tee_start_huc_auth_in huc_in = {0};
>> -	struct pxp_tee_start_huc_auth_out huc_out = {0};
>> +	struct pxp43_start_huc_auth_in huc_in = {0};
>> +	struct pxp43_start_huc_auth_out huc_out = {0};
>>   	dma_addr_t huc_phys_addr;
>>   	u8 client_id = 0;
>>   	u8 fence_id = 0;
>> @@ -32,10 +32,10 @@ int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
>>   	huc_phys_addr = i915_gem_object_get_dma_address(huc->fw.obj, 0);
>>   
>>   	/* write the PXP message into the lmem (the sg list) */
>> -	huc_in.header.api_version = PXP_TEE_43_APIVER;
>> -	huc_in.header.command_id  = PXP_TEE_43_START_HUC_AUTH;
>> -	huc_in.header.status      = 0;
>> -	huc_in.header.buffer_len  = sizeof(huc_in.huc_base_address);
>> +	huc_in.header.api_version = PXP43_APIVER;
>> +	huc_in.header.command_id  = PXP43_CMDID_START_HUC_AUTH;
>> +	huc_in.status             = 0;
>> +	huc_in.buffer_len         = sizeof(huc_in.huc_base_address);
>>   	huc_in.huc_base_address   = huc_phys_addr;
>>   
>>   	err = intel_pxp_tee_stream_message(pxp, client_id, fence_id,
>> @@ -57,11 +57,11 @@ int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
>>   	 * returned with HuC not loaded we'll still catch it when we check the
>>   	 * authentication bit later.
>>   	 */
>> -	if (huc_out.header.status != PXP_STATUS_SUCCESS &&
>> -	    huc_out.header.status != PXP_STATUS_OP_NOT_PERMITTED) {
>> +	if (huc_out.status != PXP_STATUS_SUCCESS &&
>> +	    huc_out.status != PXP_STATUS_OP_NOT_PERMITTED) {
>>   		drm_err(&gt->i915->drm,
>>   			"HuC load failed with GSC error = 0x%x\n",
>> -			huc_out.header.status);
>> +			huc_out.status);
>>   		return -EPROTO;
>>   	}
>>   
>> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
>> index 052fd2f9a583..7226becc0a82 100644
>> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
>> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
>> @@ -14,7 +14,7 @@
>>   #include "intel_pxp.h"
>>   #include "intel_pxp_session.h"
>>   #include "intel_pxp_tee.h"
>> -#include "intel_pxp_tee_interface.h"
>> +#include "intel_pxp_cmd_interface_42.h"
>>   #include "intel_pxp_huc.h"
>>   
>>   static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
>> @@ -286,14 +286,14 @@ int intel_pxp_tee_cmd_create_arb_session(struct intel_pxp *pxp,
>>   					 int arb_session_id)
>>   {
>>   	struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
>> -	struct pxp_tee_create_arb_in msg_in = {0};
>> -	struct pxp_tee_create_arb_out msg_out = {0};
>> +	struct pxp42_create_arb_in msg_in = {0};
>> +	struct pxp42_create_arb_out msg_out = {0};
>>   	int ret;
>>   
>> -	msg_in.header.api_version = PXP_TEE_APIVER;
>> -	msg_in.header.command_id = PXP_TEE_ARB_CMDID;
>> +	msg_in.header.header.api_version = PXP42_APIVER;
>> +	msg_in.header.header.command_id = PXP42_CMDID_INIT_SESSION;
>>   	msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header);
>> -	msg_in.protection_mode = PXP_TEE_ARB_PROTECTION_MODE;
>> +	msg_in.protection_mode = PXP42_INIT_SESSION_PROTECTION_ARB;
>>   	msg_in.session_id = arb_session_id;
>>   
>>   	ret = intel_pxp_tee_io_message(pxp,
>> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
>> deleted file mode 100644
>> index 7edc1760f142..000000000000
>> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
>> +++ /dev/null
>> @@ -1,57 +0,0 @@
>> -/* SPDX-License-Identifier: MIT */
>> -/*
>> - * Copyright(c) 2020-2022, Intel Corporation. All rights reserved.
>> - */
>> -
>> -#ifndef __INTEL_PXP_TEE_INTERFACE_H__
>> -#define __INTEL_PXP_TEE_INTERFACE_H__
>> -
>> -#include <linux/types.h>
>> -
>> -#define PXP_TEE_APIVER 0x40002
>> -#define PXP_TEE_43_APIVER 0x00040003
>> -#define PXP_TEE_ARB_CMDID 0x1e
>> -#define PXP_TEE_ARB_PROTECTION_MODE 0x2
>> -#define PXP_TEE_43_START_HUC_AUTH   0x0000003A
>> -
>> -/*
>> - * there are a lot of status codes for PXP, but we only define the ones we
>> - * actually can handle in the driver. other failure codes will be printed to
>> - * error msg for debug.
>> - */
>> -enum pxp_status {
>> -	PXP_STATUS_SUCCESS = 0x0,
>> -	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
>> -};
>> -
>> -/* PXP TEE message header */
>> -struct pxp_tee_cmd_header {
>> -	u32 api_version;
>> -	u32 command_id;
>> -	u32 status;
>> -	/* Length of the message (excluding the header) */
>> -	u32 buffer_len;
>> -} __packed;
>> -
>> -/* PXP TEE message input to create a arbitrary session */
>> -struct pxp_tee_create_arb_in {
>> -	struct pxp_tee_cmd_header header;
>> -	u32 protection_mode;
>> -	u32 session_id;
>> -} __packed;
>> -
>> -/* PXP TEE message output to create a arbitrary session */
>> -struct pxp_tee_create_arb_out {
>> -	struct pxp_tee_cmd_header header;
>> -} __packed;
>> -
>> -struct pxp_tee_start_huc_auth_in {
>> -	struct pxp_tee_cmd_header header;
>> -	__le64                    huc_base_address;
>> -};
>> -
>> -struct pxp_tee_start_huc_auth_out {
>> -	struct pxp_tee_cmd_header header;
>> -};
>> -
>> -#endif /* __INTEL_PXP_TEE_INTERFACE_H__ */
>>
>> base-commit: 92b40b6e1d54d68a766c1545b9ace3e2eccad94a
>

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
  2022-11-02  9:35   ` Jani Nikula
@ 2022-11-08  3:48     ` Teres Alexis, Alan Previn
  0 siblings, 0 replies; 9+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-11-08  3:48 UTC (permalink / raw)
  To: Ceraolo Spurio, Daniele, jani.nikula, intel-gfx

Agreed on all comments - will fix them all. Thanks Daniele, Nikula.
...alan

On Wed, 2022-11-02 at 11:35 +0200, Jani Nikula wrote:
> On Tue, 01 Nov 2022, "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com> wrote:
> > On 10/24/2022 11:40 AM, Alan Previn wrote:
> > > Previously, we only used PXP FW interface version-42 structures for
> > > PXP arbitration session on ADL/TGL products and version-43 for HuC
> > > authentication on DG2. That worked fine despite not differentiating such
> > > versioning of the PXP firmware interaction structures. This was okay
> > > back then because the only commands used via version 42 was not
> > > used via version 43 and vice versa.
> > > 
> > > With MTL, we'll need both these versions side by side for the same
> > > commands (PXP-session) with the older platform feature support. That
> > > said, let's create separate files to define the structures and definitions
> > > for both version-42 and 43 of PXP FW interfaces.
> > > 
> > > Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> > > ---
> > >   .../drm/i915/pxp/intel_pxp_cmd_interface_42.h | 39 +++++++++++++
> > >   .../drm/i915/pxp/intel_pxp_cmd_interface_43.h | 45 +++++++++++++++
> > >   .../i915/pxp/intel_pxp_cmd_interface_cmn.h    | 27 +++++++++
> > >   drivers/gpu/drm/i915/pxp/intel_pxp_huc.c      | 20 +++----
> > >   drivers/gpu/drm/i915/pxp/intel_pxp_tee.c      | 12 ++--
> > >   .../drm/i915/pxp/intel_pxp_tee_interface.h    | 57 -------------------
> > >   6 files changed, 127 insertions(+), 73 deletions(-)
> > >   create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
> > >   create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
> > >   create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
> > >   delete mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
> > > 
> > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
> > > new file mode 100644
> > > index 000000000000..501012d3084d
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
> > > @@ -0,0 +1,39 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright(c) 2020, Intel Corporation. All rights reserved.
> > > + */
> > > +
> > > +#ifndef __INTEL_PXP_FW_INTERFACE_42_H__
> > > +#define __INTEL_PXP_FW_INTERFACE_42_H__
> > > +
> > > +#include <linux/types.h>
> > > +#include "intel_pxp_cmd_interface_cmn.h"
> > > +
> > > +/* PXP API Version 42 Core Definitions */
> > > +#define PXP42_APIVER 0x00040002
> > 
> > Is it worth having a unified macro for this instead of 2 separate 
> > defines for 42 and 43? e.g
> > 
> > #define PXP_APIVER(x, y) (x << 16 | y)
> > 
> > And then use PXP_APIVER(4, 2) or PXP_APIVER(4, 3). Just a suggestion, 
> > not a blocker.
> > 
> > > +
> > > +/* PXP-Cmd-Op definitions */
> > > +#define PXP42_CMDID_INIT_SESSION 0x1e
> > 
> > This might be better off closer to the matching structure. Not a blocker.
> > 
> > > +
> > > +/* PXP-In/Out-Cmd-Header */
> > > +struct pxp42_cmd_header {
> > > +	struct pxpcmn_cmd_header header;
> > > +	u32 status;
> > > +	/* Length of the message (excluding the header) */
> > > +	u32 buffer_len;
> > > +} __packed;
> > 
> > The PXP specs indicate that the header is common between v42 and v43, 
> > with one field being considered a union, so we can just define it as 
> > fully shared in the common file. Something like:
> 
> Agreed. Using separate structs is going to lead to trouble with any
> shared code.
> 
> BR,
> Jani.
> 
> 
> > 
> > struct pxp_cmd_header {
> >          u32 api_version;
> >          u32 command_id;
> >          union {
> >                  u32 status;        /* out */
> >                  u32 stream id;  /* in */
> >          }
> >          u32 buffer_len;
> > }
> > 
> > 
> > 
> > > +
> > > +/* PXP-Input-Packet: Create-Arb-Session */
> > > +#define PXP42_INIT_SESSION_PROTECTION_ARB 0x2
> > 
> > I was a bit confused by the comment above the define, took me a moment 
> > to understand that the define is not of the command ID matching the 
> > packed, but one of the possible values of one of the fields. Maybe move 
> > it inside the structure and below the matching variable like we usually do?
> > 
> > > +struct pxp42_create_arb_in {
> > > +	struct pxp42_cmd_header header;
> > > +	u32 protection_mode;
> > > +	u32 session_id;
> > > +} __packed;
> > > +
> > > +/* PXP-Output-Packet: Create-Arb-Session */
> > > +struct pxp42_create_arb_out {
> > > +	struct pxp42_cmd_header header;
> > > +} __packed;
> > > +
> > > +#endif /* __INTEL_PXP_FW_INTERFACE_42_H__ */
> > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
> > > new file mode 100644
> > > index 000000000000..d7d93876bbef
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
> > > @@ -0,0 +1,45 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright(c) 2022, Intel Corporation. All rights reserved.
> > > + */
> > > +
> > > +#ifndef __INTEL_PXP_FW_INTERFACE_43_H__
> > > +#define __INTEL_PXP_FW_INTERFACE_43_H__
> > > +
> > > +#include <linux/types.h>
> > > +#include "intel_pxp_cmd_interface_cmn.h"
> > > +
> > > +/* PXP API Version 43 Core Definitions */
> > > +#define PXP43_APIVER 0x00040003
> > > +#define PXP43_MAX_HECI_IN_SIZE (32 * 1024)
> > > +#define PXP43_MAX_HECI_OUT_SIZE (32 * 1024)
> > 
> > Those MAX_HECI defines are unused
> > 
> > Daniele
> > 
> > > +
> > > +/* PXP-Cmd-Op definitions */
> > > +#define PXP43_CMDID_START_HUC_AUTH 0x0000003A
> > > +
> > > +/* PXP-In/Out-Cmd-Header */
> > > +struct pxp43_cmd_header {
> > > +	struct pxpcmn_cmd_header header;
> > > +	u32 in_out_data;
> > > +	/* Length of the message (excluding the header) */
> > > +	u32 buffer_len;
> > > +} __packed;
> > 
> > This is unused (but anyway superseded by previous comment about the 
> > unified header)
> > 
> > > +
> > > +/* PXP-Input-Packet: HUC-Authentication */
> > > +struct pxp43_start_huc_auth_in {
> > > +	struct pxpcmn_cmd_header header;
> > > +	u32 status;
> > > +	/* Length of the message (excluding the header) */
> > > +	u32 buffer_len;
> > > +	__le64                  huc_base_address;
> > > +} __packed;
> > > +
> > > +/* PXP-Output-Packet: HUC-Authentication */
> > > +struct pxp43_start_huc_auth_out {
> > > +	struct pxpcmn_cmd_header header;
> > > +	u32 status;
> > > +	/* Length of the message (excluding the header) */
> > > +	u32 buffer_len;
> > > +} __packed;
> > > +
> > > +#endif /* __INTEL_PXP_FW_INTERFACE_43_H__ */
> > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
> > > new file mode 100644
> > > index 000000000000..5c301ddc55e2
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
> > > @@ -0,0 +1,27 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright(c) 2022, Intel Corporation. All rights reserved.
> > > + */
> > > +
> > > +#ifndef __INTEL_PXP_FW_INTERFACE_CMN_H__
> > > +#define __INTEL_PXP_FW_INTERFACE_CMN_H__
> > > +
> > > +#include <linux/types.h>
> > > +
> > > +/*
> > > + * there are a lot of status codes for PXP, but we only define the cross-API
> > > + * common ones that we actually can handle in the kernel driver. Other failure
> > > + * codes should be printed to error msg for debug.
> > > + */
> > > +enum pxp_status {
> > > +	PXP_STATUS_SUCCESS = 0x0,
> > > +	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
> > > +};
> > > +
> > > +/* Common PXP FW message header */
> > > +struct pxpcmn_cmd_header {
> > > +	u32 api_version;
> > > +	u32 command_id;
> > > +} __packed;
> > > +
> > > +#endif /* __INTEL_PXP_FW_INTERFACE_CMN_H__ */
> > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
> > > index 7ec36d94e758..ea8389d54963 100644
> > > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
> > > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c
> > > @@ -13,14 +13,14 @@
> > >   #include "intel_pxp_huc.h"
> > >   #include "intel_pxp_tee.h"
> > >   #include "intel_pxp_types.h"
> > > -#include "intel_pxp_tee_interface.h"
> > > +#include "intel_pxp_cmd_interface_43.h"
> > >   
> > >   int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
> > >   {
> > >   	struct intel_gt *gt = pxp_to_gt(pxp);
> > >   	struct intel_huc *huc = &gt->uc.huc;
> > > -	struct pxp_tee_start_huc_auth_in huc_in = {0};
> > > -	struct pxp_tee_start_huc_auth_out huc_out = {0};
> > > +	struct pxp43_start_huc_auth_in huc_in = {0};
> > > +	struct pxp43_start_huc_auth_out huc_out = {0};
> > >   	dma_addr_t huc_phys_addr;
> > >   	u8 client_id = 0;
> > >   	u8 fence_id = 0;
> > > @@ -32,10 +32,10 @@ int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
> > >   	huc_phys_addr = i915_gem_object_get_dma_address(huc->fw.obj, 0);
> > >   
> > >   	/* write the PXP message into the lmem (the sg list) */
> > > -	huc_in.header.api_version = PXP_TEE_43_APIVER;
> > > -	huc_in.header.command_id  = PXP_TEE_43_START_HUC_AUTH;
> > > -	huc_in.header.status      = 0;
> > > -	huc_in.header.buffer_len  = sizeof(huc_in.huc_base_address);
> > > +	huc_in.header.api_version = PXP43_APIVER;
> > > +	huc_in.header.command_id  = PXP43_CMDID_START_HUC_AUTH;
> > > +	huc_in.status             = 0;
> > > +	huc_in.buffer_len         = sizeof(huc_in.huc_base_address);
> > >   	huc_in.huc_base_address   = huc_phys_addr;
> > >   
> > >   	err = intel_pxp_tee_stream_message(pxp, client_id, fence_id,
> > > @@ -57,11 +57,11 @@ int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
> > >   	 * returned with HuC not loaded we'll still catch it when we check the
> > >   	 * authentication bit later.
> > >   	 */
> > > -	if (huc_out.header.status != PXP_STATUS_SUCCESS &&
> > > -	    huc_out.header.status != PXP_STATUS_OP_NOT_PERMITTED) {
> > > +	if (huc_out.status != PXP_STATUS_SUCCESS &&
> > > +	    huc_out.status != PXP_STATUS_OP_NOT_PERMITTED) {
> > >   		drm_err(&gt->i915->drm,
> > >   			"HuC load failed with GSC error = 0x%x\n",
> > > -			huc_out.header.status);
> > > +			huc_out.status);
> > >   		return -EPROTO;
> > >   	}
> > >   
> > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> > > index 052fd2f9a583..7226becc0a82 100644
> > > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> > > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> > > @@ -14,7 +14,7 @@
> > >   #include "intel_pxp.h"
> > >   #include "intel_pxp_session.h"
> > >   #include "intel_pxp_tee.h"
> > > -#include "intel_pxp_tee_interface.h"
> > > +#include "intel_pxp_cmd_interface_42.h"
> > >   #include "intel_pxp_huc.h"
> > >   
> > >   static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
> > > @@ -286,14 +286,14 @@ int intel_pxp_tee_cmd_create_arb_session(struct intel_pxp *pxp,
> > >   					 int arb_session_id)
> > >   {
> > >   	struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
> > > -	struct pxp_tee_create_arb_in msg_in = {0};
> > > -	struct pxp_tee_create_arb_out msg_out = {0};
> > > +	struct pxp42_create_arb_in msg_in = {0};
> > > +	struct pxp42_create_arb_out msg_out = {0};
> > >   	int ret;
> > >   
> > > -	msg_in.header.api_version = PXP_TEE_APIVER;
> > > -	msg_in.header.command_id = PXP_TEE_ARB_CMDID;
> > > +	msg_in.header.header.api_version = PXP42_APIVER;
> > > +	msg_in.header.header.command_id = PXP42_CMDID_INIT_SESSION;
> > >   	msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header);
> > > -	msg_in.protection_mode = PXP_TEE_ARB_PROTECTION_MODE;
> > > +	msg_in.protection_mode = PXP42_INIT_SESSION_PROTECTION_ARB;
> > >   	msg_in.session_id = arb_session_id;
> > >   
> > >   	ret = intel_pxp_tee_io_message(pxp,
> > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
> > > deleted file mode 100644
> > > index 7edc1760f142..000000000000
> > > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
> > > +++ /dev/null
> > > @@ -1,57 +0,0 @@
> > > -/* SPDX-License-Identifier: MIT */
> > > -/*
> > > - * Copyright(c) 2020-2022, Intel Corporation. All rights reserved.
> > > - */
> > > -
> > > -#ifndef __INTEL_PXP_TEE_INTERFACE_H__
> > > -#define __INTEL_PXP_TEE_INTERFACE_H__
> > > -
> > > -#include <linux/types.h>
> > > -
> > > -#define PXP_TEE_APIVER 0x40002
> > > -#define PXP_TEE_43_APIVER 0x00040003
> > > -#define PXP_TEE_ARB_CMDID 0x1e
> > > -#define PXP_TEE_ARB_PROTECTION_MODE 0x2
> > > -#define PXP_TEE_43_START_HUC_AUTH   0x0000003A
> > > -
> > > -/*
> > > - * there are a lot of status codes for PXP, but we only define the ones we
> > > - * actually can handle in the driver. other failure codes will be printed to
> > > - * error msg for debug.
> > > - */
> > > -enum pxp_status {
> > > -	PXP_STATUS_SUCCESS = 0x0,
> > > -	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
> > > -};
> > > -
> > > -/* PXP TEE message header */
> > > -struct pxp_tee_cmd_header {
> > > -	u32 api_version;
> > > -	u32 command_id;
> > > -	u32 status;
> > > -	/* Length of the message (excluding the header) */
> > > -	u32 buffer_len;
> > > -} __packed;
> > > -
> > > -/* PXP TEE message input to create a arbitrary session */
> > > -struct pxp_tee_create_arb_in {
> > > -	struct pxp_tee_cmd_header header;
> > > -	u32 protection_mode;
> > > -	u32 session_id;
> > > -} __packed;
> > > -
> > > -/* PXP TEE message output to create a arbitrary session */
> > > -struct pxp_tee_create_arb_out {
> > > -	struct pxp_tee_cmd_header header;
> > > -} __packed;
> > > -
> > > -struct pxp_tee_start_huc_auth_in {
> > > -	struct pxp_tee_cmd_header header;
> > > -	__le64                    huc_base_address;
> > > -};
> > > -
> > > -struct pxp_tee_start_huc_auth_out {
> > > -	struct pxp_tee_cmd_header header;
> > > -};
> > > -
> > > -#endif /* __INTEL_PXP_TEE_INTERFACE_H__ */
> > > 
> > > base-commit: 92b40b6e1d54d68a766c1545b9ace3e2eccad94a
> > 
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center


^ permalink raw reply	[flat|nested] 9+ messages in thread

* [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43
@ 2022-10-21 23:39 Alan Previn
  0 siblings, 0 replies; 9+ messages in thread
From: Alan Previn @ 2022-10-21 23:39 UTC (permalink / raw)
  To: intel-gfx

Previously, we only used PXP FW interface version-42 structures for
PXP arbitration session on ADL/TGL products and version-43 for HuC
authentication on DG2. With MTL, we'll need both these capabilities
side by side with these older platform feature support. That said,
let's create separate files to define the structures and definitions
for both version-42 and 43 of PXP FW interfaces.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 .../drm/i915/pxp/intel_pxp_cmd_interface_42.h | 39 +++++++++++++
 .../drm/i915/pxp/intel_pxp_cmd_interface_43.h | 45 +++++++++++++++
 .../i915/pxp/intel_pxp_cmd_interface_cmn.h    | 27 +++++++++
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c      |  2 +-
 .../drm/i915/pxp/intel_pxp_tee_interface.h    | 57 -------------------
 5 files changed, 112 insertions(+), 58 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
 create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
 delete mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
new file mode 100644
index 000000000000..501012d3084d
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2020, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_FW_INTERFACE_42_H__
+#define __INTEL_PXP_FW_INTERFACE_42_H__
+
+#include <linux/types.h>
+#include "intel_pxp_cmd_interface_cmn.h"
+
+/* PXP API Version 42 Core Definitions */
+#define PXP42_APIVER 0x00040002
+
+/* PXP-Cmd-Op definitions */
+#define PXP42_CMDID_INIT_SESSION 0x1e
+
+/* PXP-In/Out-Cmd-Header */
+struct pxp42_cmd_header {
+	struct pxpcmn_cmd_header header;
+	u32 status;
+	/* Length of the message (excluding the header) */
+	u32 buffer_len;
+} __packed;
+
+/* PXP-Input-Packet: Create-Arb-Session */
+#define PXP42_INIT_SESSION_PROTECTION_ARB 0x2
+struct pxp42_create_arb_in {
+	struct pxp42_cmd_header header;
+	u32 protection_mode;
+	u32 session_id;
+} __packed;
+
+/* PXP-Output-Packet: Create-Arb-Session */
+struct pxp42_create_arb_out {
+	struct pxp42_cmd_header header;
+} __packed;
+
+#endif /* __INTEL_PXP_FW_INTERFACE_42_H__ */
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
new file mode 100644
index 000000000000..d7d93876bbef
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2022, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_FW_INTERFACE_43_H__
+#define __INTEL_PXP_FW_INTERFACE_43_H__
+
+#include <linux/types.h>
+#include "intel_pxp_cmd_interface_cmn.h"
+
+/* PXP API Version 43 Core Definitions */
+#define PXP43_APIVER 0x00040003
+#define PXP43_MAX_HECI_IN_SIZE (32 * 1024)
+#define PXP43_MAX_HECI_OUT_SIZE (32 * 1024)
+
+/* PXP-Cmd-Op definitions */
+#define PXP43_CMDID_START_HUC_AUTH 0x0000003A
+
+/* PXP-In/Out-Cmd-Header */
+struct pxp43_cmd_header {
+	struct pxpcmn_cmd_header header;
+	u32 in_out_data;
+	/* Length of the message (excluding the header) */
+	u32 buffer_len;
+} __packed;
+
+/* PXP-Input-Packet: HUC-Authentication */
+struct pxp43_start_huc_auth_in {
+	struct pxpcmn_cmd_header header;
+	u32 status;
+	/* Length of the message (excluding the header) */
+	u32 buffer_len;
+	__le64                  huc_base_address;
+} __packed;
+
+/* PXP-Output-Packet: HUC-Authentication */
+struct pxp43_start_huc_auth_out {
+	struct pxpcmn_cmd_header header;
+	u32 status;
+	/* Length of the message (excluding the header) */
+	u32 buffer_len;
+} __packed;
+
+#endif /* __INTEL_PXP_FW_INTERFACE_43_H__ */
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
new file mode 100644
index 000000000000..5c301ddc55e2
--- /dev/null
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright(c) 2022, Intel Corporation. All rights reserved.
+ */
+
+#ifndef __INTEL_PXP_FW_INTERFACE_CMN_H__
+#define __INTEL_PXP_FW_INTERFACE_CMN_H__
+
+#include <linux/types.h>
+
+/*
+ * there are a lot of status codes for PXP, but we only define the cross-API
+ * common ones that we actually can handle in the kernel driver. Other failure
+ * codes should be printed to error msg for debug.
+ */
+enum pxp_status {
+	PXP_STATUS_SUCCESS = 0x0,
+	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
+};
+
+/* Common PXP FW message header */
+struct pxpcmn_cmd_header {
+	u32 api_version;
+	u32 command_id;
+} __packed;
+
+#endif /* __INTEL_PXP_FW_INTERFACE_CMN_H__ */
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index 6dcebed78c8d..aabafb34fdcd 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -293,7 +293,7 @@ int intel_pxp_tee_cmd_create_arb_session(struct intel_pxp *pxp,
 	msg_in.header.header.api_version = PXP42_APIVER;
 	msg_in.header.header.command_id = PXP42_CMDID_INIT_SESSION;
 	msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header);
-+	msg_in.protection_mode = PXP42_INIT_SESSION_PROTECTION_ARB;
+	msg_in.protection_mode = PXP42_INIT_SESSION_PROTECTION_ARB;
 	msg_in.session_id = arb_session_id;
 
 	ret = intel_pxp_tee_io_message(pxp,
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h b/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
deleted file mode 100644
index 7edc1760f142..000000000000
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee_interface.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright(c) 2020-2022, Intel Corporation. All rights reserved.
- */
-
-#ifndef __INTEL_PXP_TEE_INTERFACE_H__
-#define __INTEL_PXP_TEE_INTERFACE_H__
-
-#include <linux/types.h>
-
-#define PXP_TEE_APIVER 0x40002
-#define PXP_TEE_43_APIVER 0x00040003
-#define PXP_TEE_ARB_CMDID 0x1e
-#define PXP_TEE_ARB_PROTECTION_MODE 0x2
-#define PXP_TEE_43_START_HUC_AUTH   0x0000003A
-
-/*
- * there are a lot of status codes for PXP, but we only define the ones we
- * actually can handle in the driver. other failure codes will be printed to
- * error msg for debug.
- */
-enum pxp_status {
-	PXP_STATUS_SUCCESS = 0x0,
-	PXP_STATUS_OP_NOT_PERMITTED = 0x4013
-};
-
-/* PXP TEE message header */
-struct pxp_tee_cmd_header {
-	u32 api_version;
-	u32 command_id;
-	u32 status;
-	/* Length of the message (excluding the header) */
-	u32 buffer_len;
-} __packed;
-
-/* PXP TEE message input to create a arbitrary session */
-struct pxp_tee_create_arb_in {
-	struct pxp_tee_cmd_header header;
-	u32 protection_mode;
-	u32 session_id;
-} __packed;
-
-/* PXP TEE message output to create a arbitrary session */
-struct pxp_tee_create_arb_out {
-	struct pxp_tee_cmd_header header;
-} __packed;
-
-struct pxp_tee_start_huc_auth_in {
-	struct pxp_tee_cmd_header header;
-	__le64                    huc_base_address;
-};
-
-struct pxp_tee_start_huc_auth_out {
-	struct pxp_tee_cmd_header header;
-};
-
-#endif /* __INTEL_PXP_TEE_INTERFACE_H__ */
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2022-11-08  3:48 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-24 18:40 [Intel-gfx] [PATCH 1/1] drm/i915/pxp: Separate PXP FW interface structures for both v42 and 43 Alan Previn
2022-10-24 23:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/1] " Patchwork
2022-10-24 23:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-25  0:21 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-10-26 20:56   ` Teres Alexis, Alan Previn
2022-11-01 23:17 ` [Intel-gfx] [PATCH 1/1] " Ceraolo Spurio, Daniele
2022-11-02  9:35   ` Jani Nikula
2022-11-08  3:48     ` Teres Alexis, Alan Previn
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2022-10-21 23:39 Alan Previn

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