From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 5/6] drm/i915/psr: Check that vblank is long enough for psr2
Date: Wed, 22 Mar 2023 12:34:11 +0200 [thread overview]
Message-ID: <20230322103412.123943-6-jouni.hogander@intel.com> (raw)
In-Reply-To: <20230322103412.123943-1-jouni.hogander@intel.com>
Ensure vblank >= psr2 vblank
where
Psr2 vblank = PSR2_CTL Block Count Number maximum line count.
Bspec: 71580, 49274
v2: Use calculated block count number maximum line count
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4b7c946a9a25..b53c71c06105 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -968,6 +968,15 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
return false;
}
+ /* Vblank >= PSR2_CTL Block Count Number maximum line count */
+ if (crtc_state->hw.adjusted_mode.crtc_vblank_end -
+ crtc_state->hw.adjusted_mode.crtc_vblank_start <
+ psr2_block_count_lines(intel_dp)) {
+ drm_dbg_kms(&dev_priv->drm,
+ "PSR2 not enabled, too short vblank time\n");
+ return false;
+ }
+
if (HAS_PSR2_SEL_FETCH(dev_priv)) {
if (!intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) &&
!HAS_PSR_HW_TRACKING(dev_priv)) {
--
2.34.1
next prev parent reply other threads:[~2023-03-22 10:34 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-22 10:34 [Intel-gfx] [PATCH v5 0/6] High refresh rate PSR fixes Jouni Högander
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 1/6] drm/i915/psr: Unify pre/post hooks Jouni Högander
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 2/6] drm/i915/psr: Modify/fix Wa_16013835468 and prepare for Wa_14015648006 Jouni Högander
2023-03-28 11:17 ` Ville Syrjälä
2023-03-28 11:31 ` Hogander, Jouni
2023-03-28 11:40 ` Ville Syrjälä
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 3/6] drm/i915/psr: Implement Wa_14015648006 Jouni Högander
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 4/6] drm/i915/psr: Add helpers for block count number handling Jouni Högander
2023-03-28 11:19 ` Ville Syrjälä
2023-03-22 10:34 ` Jouni Högander [this message]
2023-03-28 11:24 ` [Intel-gfx] [PATCH v5 5/6] drm/i915/psr: Check that vblank is long enough for psr2 Ville Syrjälä
2023-03-28 11:33 ` Hogander, Jouni
2023-03-22 10:34 ` [Intel-gfx] [PATCH v5 6/6] drm/i915/psr: Implement Display WA #1136 Jouni Högander
2023-03-28 11:26 ` Ville Syrjälä
2023-03-28 11:35 ` Hogander, Jouni
2023-03-22 13:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for High refresh rate PSR fixes (rev5) Patchwork
2023-03-22 13:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-22 13:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-22 18:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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