* [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update
@ 2022-02-23 12:48 Jouni Högander
2022-02-23 17:32 ` Souza, Jose
` (6 more replies)
0 siblings, 7 replies; 12+ messages in thread
From: Jouni Högander @ 2022-02-23 12:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Mihai Harpau
Currently we are observing occasional screen flickering when
PSR2 selective fetch is enabled. More specifically glitch seems
to happen on full frame update when cursor moves to coords
x = -1 or y = -1.
According to Bspec SF Single full frame should not be set if
SF Partial Frame Enable is not set. This happened to be true for
ADLP as PSR2_MAN_TRK_CTL_ENABLE is always set and for ADLP it's
actually "SF Partial Frame Enable" (Bit 31).
Setting "SF Partial Frame Enable" bit also on full update seems to
fix screen flickering.
Also make code more clear by setting PSR2_MAN_TRK_CTL_ENABLE
only if not on ADLP as this bit doesn't exist in ADLP.
Bspec: 49274
v2: Fix Mihai Harpau email address
Reported-by: Lyude Paul <lyude@redhat.com>
Cc: Mihai Harpau <mharpau@gmail.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Bugzilla: https://gitlab.freedesktop.org/drm/intel/-/issues/5077
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 20 ++++++++++++++++++--
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 2e0b092f4b6b..90aca75e05e0 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1439,6 +1439,13 @@ static inline u32 man_trk_ctl_single_full_frame_bit_get(struct drm_i915_private
PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;
}
+static inline u32 man_trk_ctl_partial_frame_bit_get(struct drm_i915_private *dev_priv)
+{
+ return IS_ALDERLAKE_P(dev_priv) ?
+ ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE :
+ PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
+}
+
static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -1543,7 +1550,17 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 val = PSR2_MAN_TRK_CTL_ENABLE;
+ u32 val = 0;
+
+ /*
+ * ADL_P doesn't have HW tracking nor manual tracking enable
+ * bit
+ */
+ if (!IS_ALDERLAKE_P(dev_priv))
+ val = PSR2_MAN_TRK_CTL_ENABLE;
+
+ /* SF partial frame enable has to be set even on full update */
+ val |= man_trk_ctl_partial_frame_bit_get(dev_priv);
if (full_update) {
/*
@@ -1563,7 +1580,6 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
} else {
drm_WARN_ON(crtc_state->uapi.crtc->dev, clip->y1 % 4 || clip->y2 % 4);
- val |= PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
val |= PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 / 4 + 1);
val |= PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip->y2 / 4 + 1);
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2b8a3086ed35..89bbb64e520d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2316,6 +2316,7 @@
#define ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val) REG_FIELD_PREP(ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)
#define ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK REG_GENMASK(12, 0)
#define ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(val) REG_FIELD_PREP(ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK, val)
+#define ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE REG_BIT(31)
#define ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME REG_BIT(14)
#define ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME REG_BIT(13)
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update
2022-02-23 12:48 [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Jouni Högander
@ 2022-02-23 17:32 ` Souza, Jose
2022-02-24 20:02 ` Lyude Paul
2022-02-24 4:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2) Patchwork
` (5 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Souza, Jose @ 2022-02-23 17:32 UTC (permalink / raw)
To: intel-gfx, Hogander, Jouni; +Cc: mharpau
On Wed, 2022-02-23 at 14:48 +0200, Jouni Högander wrote:
> Currently we are observing occasional screen flickering when
> PSR2 selective fetch is enabled. More specifically glitch seems
> to happen on full frame update when cursor moves to coords
> x = -1 or y = -1.
>
> According to Bspec SF Single full frame should not be set if
> SF Partial Frame Enable is not set. This happened to be true for
> ADLP as PSR2_MAN_TRK_CTL_ENABLE is always set and for ADLP it's
> actually "SF Partial Frame Enable" (Bit 31).
>
> Setting "SF Partial Frame Enable" bit also on full update seems to
> fix screen flickering.
>
> Also make code more clear by setting PSR2_MAN_TRK_CTL_ENABLE
> only if not on ADLP as this bit doesn't exist in ADLP.
Bit exist but has another name.
>
> Bspec: 49274
>
> v2: Fix Mihai Harpau email address
>
> Reported-by: Lyude Paul <lyude@redhat.com>
> Cc: Mihai Harpau <mharpau@gmail.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Bugzilla: https://gitlab.freedesktop.org/drm/intel/-/issues/5077
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 20 ++++++++++++++++++--
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 2e0b092f4b6b..90aca75e05e0 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1439,6 +1439,13 @@ static inline u32 man_trk_ctl_single_full_frame_bit_get(struct drm_i915_private
> PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;
> }
>
> +static inline u32 man_trk_ctl_partial_frame_bit_get(struct drm_i915_private *dev_priv)
> +{
> + return IS_ALDERLAKE_P(dev_priv) ?
> + ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE :
> + PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> +}
> +
> static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> @@ -1543,7 +1550,17 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - u32 val = PSR2_MAN_TRK_CTL_ENABLE;
> + u32 val = 0;
> +
> + /*
> + * ADL_P doesn't have HW tracking nor manual tracking enable
> + * bit
> + */
Nit: Unnecessary comment.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> + if (!IS_ALDERLAKE_P(dev_priv))
> + val = PSR2_MAN_TRK_CTL_ENABLE;
> +
> + /* SF partial frame enable has to be set even on full update */
> + val |= man_trk_ctl_partial_frame_bit_get(dev_priv);
>
> if (full_update) {
> /*
> @@ -1563,7 +1580,6 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
> } else {
> drm_WARN_ON(crtc_state->uapi.crtc->dev, clip->y1 % 4 || clip->y2 % 4);
>
> - val |= PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> val |= PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 / 4 + 1);
> val |= PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip->y2 / 4 + 1);
> }
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 2b8a3086ed35..89bbb64e520d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2316,6 +2316,7 @@
> #define ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val) REG_FIELD_PREP(ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)
> #define ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK REG_GENMASK(12, 0)
> #define ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(val) REG_FIELD_PREP(ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK, val)
> +#define ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE REG_BIT(31)
> #define ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME REG_BIT(14)
> #define ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME REG_BIT(13)
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2)
2022-02-23 12:48 [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Jouni Högander
2022-02-23 17:32 ` Souza, Jose
@ 2022-02-24 4:39 ` Patchwork
2022-02-24 5:12 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
` (4 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2022-02-24 4:39 UTC (permalink / raw)
To: Hogander, Jouni; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2)
URL : https://patchwork.freedesktop.org/series/100633/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2)
2022-02-23 12:48 [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Jouni Högander
2022-02-23 17:32 ` Souza, Jose
2022-02-24 4:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2) Patchwork
@ 2022-02-24 5:12 ` Patchwork
2022-02-24 18:26 ` Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2022-02-24 5:12 UTC (permalink / raw)
To: Hogander, Jouni; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 9324 bytes --]
== Series Details ==
Series: drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2)
URL : https://patchwork.freedesktop.org/series/100633/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11276 -> Patchwork_22382
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22382 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22382, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/index.html
Participating hosts (47 -> 43)
------------------------------
Additional (3): fi-kbl-soraka fi-icl-u2 fi-pnv-d510
Missing (7): fi-bdw-5557u shard-tglu fi-hsw-4200u fi-ctg-p8600 fi-hsw-4770 bat-jsl-2 fi-bdw-samus
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22382:
### CI changes ###
#### Possible regressions ####
* boot:
- fi-ivb-3770: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/fi-ivb-3770/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-ivb-3770/boot.html
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@basic-plain-flip@b-dp2:
- fi-icl-u2: NOTRUN -> [DMESG-WARN][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@kms_flip@basic-plain-flip@b-dp2.html
* igt@kms_flip@basic-plain-flip@c-dp2:
- fi-icl-u2: NOTRUN -> [INCOMPLETE][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@kms_flip@basic-plain-flip@c-dp2.html
Known issues
------------
Here are the changes found in Patchwork_22382 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@fork-compute0:
- fi-blb-e6850: NOTRUN -> [SKIP][5] ([fdo#109271]) +17 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-blb-e6850/igt@amdgpu/amd_cs_nop@fork-compute0.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271]) +8 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_exec_suspend@basic-s3@smem:
- fi-skl-6600u: NOTRUN -> [INCOMPLETE][7] ([i915#4547])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
* igt@gem_huc_copy@huc-copy:
- fi-pnv-d510: NOTRUN -> [SKIP][8] ([fdo#109271]) +57 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-pnv-d510/igt@gem_huc_copy@huc-copy.html
- fi-kbl-soraka: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#2190])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
- fi-icl-u2: NOTRUN -> [SKIP][10] ([i915#2190])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-icl-u2: NOTRUN -> [SKIP][11] ([i915#4613]) +3 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@gem_lmem_swapping@parallel-random-engines.html
- fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613]) +3 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][13] ([i915#1886] / [i915#2291])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium@dp-edid-read:
- fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@kms_chamelium@dp-edid-read.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: NOTRUN -> [SKIP][15] ([fdo#111827]) +8 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: NOTRUN -> [SKIP][16] ([fdo#109278]) +1 similar issue
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [PASS][17] -> [DMESG-WARN][18] ([i915#4269])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#533])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@runner@aborted:
- fi-icl-u2: NOTRUN -> [FAIL][20] ([i915#2722] / [i915#4312])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [DMESG-FAIL][21] ([i915#4494] / [i915#4957]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [DMESG-FAIL][23] ([i915#5026]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/fi-blb-e6850/igt@i915_selftest@live@requests.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@kms_busy@basic@modeset:
- {bat-adlp-6}: [DMESG-WARN][25] ([i915#3576]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/bat-adlp-6/igt@kms_busy@basic@modeset.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/bat-adlp-6/igt@kms_busy@basic@modeset.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-bsw-n3050: [FAIL][27] ([i915#2346]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/fi-bsw-n3050/igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-bsw-n3050/igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size.html
* igt@kms_flip@basic-flip-vs-modeset@a-edp1:
- bat-adlp-4: [DMESG-WARN][29] ([i915#3576]) -> [PASS][30] +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/bat-adlp-4/igt@kms_flip@basic-flip-vs-modeset@a-edp1.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/bat-adlp-4/igt@kms_flip@basic-flip-vs-modeset@a-edp1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#5026]: https://gitlab.freedesktop.org/drm/intel/issues/5026
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Build changes
-------------
* Linux: CI_DRM_11276 -> Patchwork_22382
CI-20190529: 20190529
CI_DRM_11276: 9f1f2bb5b108286547a5bb3e7b89d41b6c1300e4 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6355: 83ec34916bd8268bc331105cf77c4d3d3cd352be @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22382: 8aa045a10a5d132384ba90541b0a3ef5eb71e548 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8aa045a10a5d drm/i915/psr: Set "SF Partial Frame Enable" also on full update
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/index.html
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2)
2022-02-23 12:48 [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Jouni Högander
` (2 preceding siblings ...)
2022-02-24 5:12 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2022-02-24 18:26 ` Patchwork
2022-02-24 19:49 ` [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Lyude Paul
` (2 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2022-02-24 18:26 UTC (permalink / raw)
To: Hogander, Jouni; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 14400 bytes --]
== Series Details ==
Series: drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2)
URL : https://patchwork.freedesktop.org/series/100633/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11276 -> Patchwork_22382
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22382 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22382, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/index.html
Participating hosts (49 -> 45)
------------------------------
Additional (3): fi-kbl-soraka fi-icl-u2 fi-pnv-d510
Missing (7): fi-bdw-5557u fi-hsw-4200u fi-ctg-p8600 fi-hsw-4770 shard-rkl bat-jsl-2 fi-bdw-samus
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22382:
### CI changes ###
#### Possible regressions ####
* boot:
- fi-ivb-3770: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/fi-ivb-3770/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-ivb-3770/boot.html
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_plane_scaling@upscale-with-rotation-factor-4@pipe-c-upscale-with-rotation}:
- {shard-dg1}: NOTRUN -> [SKIP][3] +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/shard-dg1-18/igt@kms_plane_scaling@upscale-with-rotation-factor-4@pipe-c-upscale-with-rotation.html
Known issues
------------
Here are the changes found in Patchwork_22382 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@fork-compute0:
- fi-blb-e6850: NOTRUN -> [SKIP][4] ([fdo#109271]) +17 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-blb-e6850/igt@amdgpu/amd_cs_nop@fork-compute0.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271]) +8 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_exec_suspend@basic-s3@smem:
- fi-skl-6600u: NOTRUN -> [INCOMPLETE][6] ([i915#4547])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
* igt@gem_huc_copy@huc-copy:
- fi-pnv-d510: NOTRUN -> [SKIP][7] ([fdo#109271]) +57 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-pnv-d510/igt@gem_huc_copy@huc-copy.html
- fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#2190])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
- fi-icl-u2: NOTRUN -> [SKIP][9] ([i915#2190])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-icl-u2: NOTRUN -> [SKIP][10] ([i915#4613]) +3 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@gem_lmem_swapping@parallel-random-engines.html
- fi-kbl-soraka: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#4613]) +3 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][12] ([i915#1886] / [i915#2291])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium@dp-edid-read:
- fi-kbl-soraka: NOTRUN -> [SKIP][13] ([fdo#109271] / [fdo#111827]) +8 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@kms_chamelium@dp-edid-read.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: NOTRUN -> [SKIP][14] ([fdo#111827]) +8 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: NOTRUN -> [SKIP][15] ([fdo#109278]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-plain-flip@b-dp2:
- fi-icl-u2: NOTRUN -> [DMESG-WARN][16] ([i915#4890])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@kms_flip@basic-plain-flip@b-dp2.html
* igt@kms_flip@basic-plain-flip@c-dp2:
- fi-icl-u2: NOTRUN -> [INCOMPLETE][17] ([i915#4890])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@kms_flip@basic-plain-flip@c-dp2.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [PASS][18] -> [DMESG-WARN][19] ([i915#4269])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#533])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@runner@aborted:
- fi-icl-u2: NOTRUN -> [FAIL][21] ([i915#2722] / [i915#4312])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-icl-u2/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [DMESG-FAIL][22] ([i915#4494] / [i915#4957]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [DMESG-FAIL][24] ([i915#5026]) -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/fi-blb-e6850/igt@i915_selftest@live@requests.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@kms_busy@basic@modeset:
- {bat-adlp-6}: [DMESG-WARN][26] ([i915#3576]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/bat-adlp-6/igt@kms_busy@basic@modeset.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/bat-adlp-6/igt@kms_busy@basic@modeset.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-bsw-n3050: [FAIL][28] ([i915#2346]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/fi-bsw-n3050/igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/fi-bsw-n3050/igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size.html
* igt@kms_flip@basic-flip-vs-modeset@a-edp1:
- bat-adlp-4: [DMESG-WARN][30] ([i915#3576]) -> [PASS][31] +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11276/bat-adlp-4/igt@kms_flip@basic-flip-vs-modeset@a-edp1.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/bat-adlp-4/igt@kms_flip@basic-flip-vs-modeset@a-edp1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111719]: https://bugs.freedesktop.org/show_bug.cgi?id=111719
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1187]: https://gitlab.freedesktop.org/drm/intel/issues/1187
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3319]: https://gitlab.freedesktop.org/drm/intel/issues/3319
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#3580]: https://gitlab.freedesktop.org/drm/intel/issues/3580
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
[i915#4016]: https://gitlab.freedesktop.org/drm/intel/issues/4016
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4807]: https://gitlab.freedesktop.org/drm/intel/issues/4807
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4842]: https://gitlab.freedesktop.org/drm/intel/issues/4842
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4853]: https://gitlab.freedesktop.org/drm/intel/issues/4853
[i915#4855]: https://gitlab.freedesktop.org/drm/intel/issues/4855
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4872]: https://gitlab.freedesktop.org/drm/intel/issues/4872
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#4876]: https://gitlab.freedesktop.org/drm/intel/issues/4876
[i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4890]: https://gitlab.freedesktop.org/drm/intel/issues/4890
[i915#4899]: https://gitlab.freedesktop.org/drm/intel/issues/4899
[i915#4903]: https://gitlab.freedesktop.org/drm/intel/issues/4903
[i915#4929]: https://gitlab.freedesktop.org/drm/intel/issues/4929
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5026]: https://gitlab.freedesktop.org/drm/intel/issues/5026
[i915#5076]: https://gitlab.freedesktop.org/drm/intel/issues/5076
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
Build changes
-------------
* Linux: CI_DRM_11276 -> Patchwork_22382
CI-20190529: 20190529
CI_DRM_11276: 9f1f2bb5b108286547a5bb3e7b89d41b6c1300e4 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6355: 83ec34916bd8268bc331105cf77c4d3d3cd352be @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22382: 8aa045a10a5d132384ba90541b0a3ef5eb71e548 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8aa045a10a5d drm/i915/psr: Set "SF Partial Frame Enable" also on full update
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22382/index.html
[-- Attachment #2: Type: text/html, Size: 11799 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update
2022-02-23 12:48 [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Jouni Högander
` (3 preceding siblings ...)
2022-02-24 18:26 ` Patchwork
@ 2022-02-24 19:49 ` Lyude Paul
2022-02-25 1:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev3) Patchwork
2022-02-25 1:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Lyude Paul @ 2022-02-24 19:49 UTC (permalink / raw)
To: Jouni Högander, intel-gfx; +Cc: Mihai Harpau
I'm back so I will try this patch on my machine and see if it helps, thank
you!
On Wed, 2022-02-23 at 14:48 +0200, Jouni Högander wrote:
> Currently we are observing occasional screen flickering when
> PSR2 selective fetch is enabled. More specifically glitch seems
> to happen on full frame update when cursor moves to coords
> x = -1 or y = -1.
>
> According to Bspec SF Single full frame should not be set if
> SF Partial Frame Enable is not set. This happened to be true for
> ADLP as PSR2_MAN_TRK_CTL_ENABLE is always set and for ADLP it's
> actually "SF Partial Frame Enable" (Bit 31).
>
> Setting "SF Partial Frame Enable" bit also on full update seems to
> fix screen flickering.
>
> Also make code more clear by setting PSR2_MAN_TRK_CTL_ENABLE
> only if not on ADLP as this bit doesn't exist in ADLP.
>
> Bspec: 49274
>
> v2: Fix Mihai Harpau email address
>
> Reported-by: Lyude Paul <lyude@redhat.com>
> Cc: Mihai Harpau <mharpau@gmail.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Bugzilla: https://gitlab.freedesktop.org/drm/intel/-/issues/5077
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 20 ++++++++++++++++++--
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 2e0b092f4b6b..90aca75e05e0 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1439,6 +1439,13 @@ static inline u32
> man_trk_ctl_single_full_frame_bit_get(struct drm_i915_private
> PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;
> }
>
> +static inline u32 man_trk_ctl_partial_frame_bit_get(struct drm_i915_private
> *dev_priv)
> +{
> + return IS_ALDERLAKE_P(dev_priv) ?
> + ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE :
> + PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> +}
> +
> static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> @@ -1543,7 +1550,17 @@ static void psr2_man_trk_ctl_calc(struct
> intel_crtc_state *crtc_state,
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - u32 val = PSR2_MAN_TRK_CTL_ENABLE;
> + u32 val = 0;
> +
> + /*
> + * ADL_P doesn't have HW tracking nor manual tracking enable
> + * bit
> + */
> + if (!IS_ALDERLAKE_P(dev_priv))
> + val = PSR2_MAN_TRK_CTL_ENABLE;
> +
> + /* SF partial frame enable has to be set even on full update */
> + val |= man_trk_ctl_partial_frame_bit_get(dev_priv);
>
> if (full_update) {
> /*
> @@ -1563,7 +1580,6 @@ static void psr2_man_trk_ctl_calc(struct
> intel_crtc_state *crtc_state,
> } else {
> drm_WARN_ON(crtc_state->uapi.crtc->dev, clip->y1 % 4 ||
> clip->y2 % 4);
>
> - val |= PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> val |= PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 / 4 +
> 1);
> val |= PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip->y2 / 4 +
> 1);
> }
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index 2b8a3086ed35..89bbb64e520d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2316,6 +2316,7 @@
> #define
> ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val) REG_FIELD_PREP(ADLP_PS
> R2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)
> #define
> ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK REG_GENMASK(12, 0)
> #define
> ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(val) REG_FIELD_PREP(ADLP_PS
> R2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK, val)
> +#define ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE REG_BIT(31)
> #define ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME REG_BIT(14)
> #define ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME REG_BIT(13)
>
--
Cheers,
Lyude Paul (she/her)
Software Engineer at Red Hat
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update
2022-02-23 17:32 ` Souza, Jose
@ 2022-02-24 20:02 ` Lyude Paul
2022-02-25 7:06 ` Hogander, Jouni
2022-02-25 21:41 ` Lyude Paul
0 siblings, 2 replies; 12+ messages in thread
From: Lyude Paul @ 2022-02-24 20:02 UTC (permalink / raw)
To: Souza, Jose, intel-gfx, Hogander, Jouni; +Cc: mharpau
Also - I realized this is missing an appropriate Fixes: tag for the commit
that enabled PSR2 selective fetch on tigerlake in the first place
On Wed, 2022-02-23 at 17:32 +0000, Souza, Jose wrote:
> On Wed, 2022-02-23 at 14:48 +0200, Jouni Högander wrote:
> > Currently we are observing occasional screen flickering when
> > PSR2 selective fetch is enabled. More specifically glitch seems
> > to happen on full frame update when cursor moves to coords
> > x = -1 or y = -1.
> >
> > According to Bspec SF Single full frame should not be set if
> > SF Partial Frame Enable is not set. This happened to be true for
> > ADLP as PSR2_MAN_TRK_CTL_ENABLE is always set and for ADLP it's
> > actually "SF Partial Frame Enable" (Bit 31).
> >
> > Setting "SF Partial Frame Enable" bit also on full update seems to
> > fix screen flickering.
> >
> > Also make code more clear by setting PSR2_MAN_TRK_CTL_ENABLE
> > only if not on ADLP as this bit doesn't exist in ADLP.
>
> Bit exist but has another name.
>
> >
> > Bspec: 49274
> >
> > v2: Fix Mihai Harpau email address
> >
> > Reported-by: Lyude Paul <lyude@redhat.com>
> > Cc: Mihai Harpau <mharpau@gmail.com>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Bugzilla: https://gitlab.freedesktop.org/drm/intel/-/issues/5077
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 20 ++++++++++++++++++--
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > 2 files changed, 19 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 2e0b092f4b6b..90aca75e05e0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1439,6 +1439,13 @@ static inline u32
> > man_trk_ctl_single_full_frame_bit_get(struct drm_i915_private
> > PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;
> > }
> >
> > +static inline u32 man_trk_ctl_partial_frame_bit_get(struct
> > drm_i915_private *dev_priv)
> > +{
> > + return IS_ALDERLAKE_P(dev_priv) ?
> > + ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE :
> > + PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> > +}
> > +
> > static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
> > {
> > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > @@ -1543,7 +1550,17 @@ static void psr2_man_trk_ctl_calc(struct
> > intel_crtc_state *crtc_state,
> > {
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > - u32 val = PSR2_MAN_TRK_CTL_ENABLE;
> > + u32 val = 0;
> > +
> > + /*
> > + * ADL_P doesn't have HW tracking nor manual tracking enable
> > + * bit
> > + */
>
> Nit: Unnecessary comment.
>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> > + if (!IS_ALDERLAKE_P(dev_priv))
> > + val = PSR2_MAN_TRK_CTL_ENABLE;
> > +
> > + /* SF partial frame enable has to be set even on full update */
> > + val |= man_trk_ctl_partial_frame_bit_get(dev_priv);
> >
> > if (full_update) {
> > /*
> > @@ -1563,7 +1580,6 @@ static void psr2_man_trk_ctl_calc(struct
> > intel_crtc_state *crtc_state,
> > } else {
> > drm_WARN_ON(crtc_state->uapi.crtc->dev, clip->y1 % 4 ||
> > clip->y2 % 4);
> >
> > - val |= PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> > val |= PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 / 4
> > + 1);
> > val |= PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip->y2 / 4 +
> > 1);
> > }
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 2b8a3086ed35..89bbb64e520d 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -2316,6 +2316,7 @@
> > #define
> > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val) REG_FIELD_PREP(ADLP_
> > PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)
> > #define
> > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK REG_GENMASK(12, 0)
> > #define
> > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(val) REG_FIELD_PREP(ADLP_
> > PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK, val)
> > +#define
> > ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE REG_BIT(31)
> > #define
> > ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME REG_BIT(14)
> > #define
> > ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME REG_BIT(13)
> >
>
--
Cheers,
Lyude Paul (she/her)
Software Engineer at Red Hat
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev3)
2022-02-23 12:48 [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Jouni Högander
` (4 preceding siblings ...)
2022-02-24 19:49 ` [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Lyude Paul
@ 2022-02-25 1:16 ` Patchwork
2022-02-25 1:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2022-02-25 1:16 UTC (permalink / raw)
To: Hogander, Jouni; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev3)
URL : https://patchwork.freedesktop.org/series/100633/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev3)
2022-02-23 12:48 [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Jouni Högander
` (5 preceding siblings ...)
2022-02-25 1:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev3) Patchwork
@ 2022-02-25 1:44 ` Patchwork
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2022-02-25 1:44 UTC (permalink / raw)
To: Hogander, Jouni; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3437 bytes --]
== Series Details ==
Series: drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev3)
URL : https://patchwork.freedesktop.org/series/100633/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11284 -> Patchwork_22401
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22401/index.html
Participating hosts (42 -> 36)
------------------------------
Missing (6): fi-kbl-soraka fi-bsw-cyan fi-snb-2520m fi-pnv-d510 bat-jsl-2 fi-bdw-samus
Known issues
------------
Here are the changes found in Patchwork_22401 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [PASS][1] -> [INCOMPLETE][2] ([i915#3921])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11284/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22401/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u: [PASS][3] -> [DMESG-WARN][4] ([i915#295]) +12 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11284/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22401/fi-cfl-8109u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
#### Possible fixes ####
* igt@i915_pm_rpm@module-reload:
- {bat-adlp-6}: [DMESG-WARN][5] ([i915#3576]) -> [PASS][6] +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11284/bat-adlp-6/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22401/bat-adlp-6/igt@i915_pm_rpm@module-reload.html
#### Warnings ####
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [DMESG-FAIL][7] ([i915#4957]) -> [DMESG-FAIL][8] ([i915#4494] / [i915#4957])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11284/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22401/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#5068]: https://gitlab.freedesktop.org/drm/intel/issues/5068
Build changes
-------------
* Linux: CI_DRM_11284 -> Patchwork_22401
CI-20190529: 20190529
CI_DRM_11284: 22ba895f56529e4d9c0533f71b1f8eb8a1b6f86e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6357: 6546304ecf053b9c5ec278ee3c210d2c6d50a3a6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22401: f759cb0833e1f477bd4f1c7fe435865f6bc69009 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f759cb0833e1 drm/i915/psr: Set "SF Partial Frame Enable" also on full update
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22401/index.html
[-- Attachment #2: Type: text/html, Size: 4136 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update
2022-02-24 20:02 ` Lyude Paul
@ 2022-02-25 7:06 ` Hogander, Jouni
2022-02-25 21:41 ` Lyude Paul
1 sibling, 0 replies; 12+ messages in thread
From: Hogander, Jouni @ 2022-02-25 7:06 UTC (permalink / raw)
To: lyude, intel-gfx, Souza, Jose; +Cc: mharpau
Addressed comments from Jose and Paul in version 3.
On Thu, 2022-02-24 at 15:02 -0500, Lyude Paul wrote:
> Also - I realized this is missing an appropriate Fixes: tag for the
> commit
> that enabled PSR2 selective fetch on tigerlake in the first place
>
> On Wed, 2022-02-23 at 17:32 +0000, Souza, Jose wrote:
> > On Wed, 2022-02-23 at 14:48 +0200, Jouni Högander wrote:
> > > Currently we are observing occasional screen flickering when
> > > PSR2 selective fetch is enabled. More specifically glitch seems
> > > to happen on full frame update when cursor moves to coords
> > > x = -1 or y = -1.
> > >
> > > According to Bspec SF Single full frame should not be set if
> > > SF Partial Frame Enable is not set. This happened to be true for
> > > ADLP as PSR2_MAN_TRK_CTL_ENABLE is always set and for ADLP it's
> > > actually "SF Partial Frame Enable" (Bit 31).
> > >
> > > Setting "SF Partial Frame Enable" bit also on full update seems
> > > to
> > > fix screen flickering.
> > >
> > > Also make code more clear by setting PSR2_MAN_TRK_CTL_ENABLE
> > > only if not on ADLP as this bit doesn't exist in ADLP.
> >
> > Bit exist but has another name.
> >
> > > Bspec: 49274
> > >
> > > v2: Fix Mihai Harpau email address
> > >
> > > Reported-by: Lyude Paul <lyude@redhat.com>
> > > Cc: Mihai Harpau <mharpau@gmail.com>
> > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Bugzilla: https://gitlab.freedesktop.org/drm/intel/-/issues/5077
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_psr.c | 20
> > > ++++++++++++++++++--
> > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > 2 files changed, 19 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index 2e0b092f4b6b..90aca75e05e0 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1439,6 +1439,13 @@ static inline u32
> > > man_trk_ctl_single_full_frame_bit_get(struct drm_i915_private
> > > PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;
> > > }
> > >
> > > +static inline u32 man_trk_ctl_partial_frame_bit_get(struct
> > > drm_i915_private *dev_priv)
> > > +{
> > > + return IS_ALDERLAKE_P(dev_priv) ?
> > > + ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE :
> > > + PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> > > +}
> > > +
> > > static void psr_force_hw_tracking_exit(struct intel_dp
> > > *intel_dp)
> > > {
> > > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > @@ -1543,7 +1550,17 @@ static void psr2_man_trk_ctl_calc(struct
> > > intel_crtc_state *crtc_state,
> > > {
> > > struct intel_crtc *crtc = to_intel_crtc(crtc_state-
> > > >uapi.crtc);
> > > struct drm_i915_private *dev_priv = to_i915(crtc-
> > > >base.dev);
> > > - u32 val = PSR2_MAN_TRK_CTL_ENABLE;
> > > + u32 val = 0;
> > > +
> > > + /*
> > > + * ADL_P doesn't have HW tracking nor manual tracking
> > > enable
> > > + * bit
> > > + */
> >
> > Nit: Unnecessary comment.
> >
> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> >
> > > + if (!IS_ALDERLAKE_P(dev_priv))
> > > + val = PSR2_MAN_TRK_CTL_ENABLE;
> > > +
> > > + /* SF partial frame enable has to be set even on full
> > > update */
> > > + val |= man_trk_ctl_partial_frame_bit_get(dev_priv);
> > >
> > > if (full_update) {
> > > /*
> > > @@ -1563,7 +1580,6 @@ static void psr2_man_trk_ctl_calc(struct
> > > intel_crtc_state *crtc_state,
> > > } else {
> > > drm_WARN_ON(crtc_state->uapi.crtc->dev, clip->y1
> > > % 4 ||
> > > clip->y2 % 4);
> > >
> > > - val |= PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> > > val |=
> > > PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 / 4
> > > + 1);
> > > val |= PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip-
> > > >y2 / 4 +
> > > 1);
> > > }
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h
> > > index 2b8a3086ed35..89bbb64e520d 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -2316,6 +2316,7 @@
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val) REG_FIELD_P
> > > REP(ADLP_
> > > PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK REG_GENMASK
> > > (12, 0)
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(val) REG_FIELD_P
> > > REP(ADLP_
> > > PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK, val)
> > > +#define
> > > ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE REG_BIT(31)
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME REG_BIT(14)
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME REG_BIT(13)
> > >
BR,
Jouni Högander
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update
2022-02-24 20:02 ` Lyude Paul
2022-02-25 7:06 ` Hogander, Jouni
@ 2022-02-25 21:41 ` Lyude Paul
2022-02-28 7:21 ` Hogander, Jouni
1 sibling, 1 reply; 12+ messages in thread
From: Lyude Paul @ 2022-02-25 21:41 UTC (permalink / raw)
To: Souza, Jose, intel-gfx, Hogander, Jouni; +Cc: mharpau
JFYI I've been running the patch on my laptop for about a day now, flickering
is totally gone and also I'm a bit astonished at the power savings!
Tested-by: Lyude Paul <lyude@redhat.com>
On Thu, 2022-02-24 at 15:02 -0500, Lyude Paul wrote:
> Also - I realized this is missing an appropriate Fixes: tag for the commit
> that enabled PSR2 selective fetch on tigerlake in the first place
>
> On Wed, 2022-02-23 at 17:32 +0000, Souza, Jose wrote:
> > On Wed, 2022-02-23 at 14:48 +0200, Jouni Högander wrote:
> > > Currently we are observing occasional screen flickering when
> > > PSR2 selective fetch is enabled. More specifically glitch seems
> > > to happen on full frame update when cursor moves to coords
> > > x = -1 or y = -1.
> > >
> > > According to Bspec SF Single full frame should not be set if
> > > SF Partial Frame Enable is not set. This happened to be true for
> > > ADLP as PSR2_MAN_TRK_CTL_ENABLE is always set and for ADLP it's
> > > actually "SF Partial Frame Enable" (Bit 31).
> > >
> > > Setting "SF Partial Frame Enable" bit also on full update seems to
> > > fix screen flickering.
> > >
> > > Also make code more clear by setting PSR2_MAN_TRK_CTL_ENABLE
> > > only if not on ADLP as this bit doesn't exist in ADLP.
> >
> > Bit exist but has another name.
> >
> > >
> > > Bspec: 49274
> > >
> > > v2: Fix Mihai Harpau email address
> > >
> > > Reported-by: Lyude Paul <lyude@redhat.com>
> > > Cc: Mihai Harpau <mharpau@gmail.com>
> > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Bugzilla: https://gitlab.freedesktop.org/drm/intel/-/issues/5077
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_psr.c | 20 ++++++++++++++++++--
> > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > 2 files changed, 19 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index 2e0b092f4b6b..90aca75e05e0 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1439,6 +1439,13 @@ static inline u32
> > > man_trk_ctl_single_full_frame_bit_get(struct drm_i915_private
> > > PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;
> > > }
> > >
> > > +static inline u32 man_trk_ctl_partial_frame_bit_get(struct
> > > drm_i915_private *dev_priv)
> > > +{
> > > + return IS_ALDERLAKE_P(dev_priv) ?
> > > + ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE :
> > > + PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> > > +}
> > > +
> > > static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp)
> > > {
> > > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > @@ -1543,7 +1550,17 @@ static void psr2_man_trk_ctl_calc(struct
> > > intel_crtc_state *crtc_state,
> > > {
> > > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > - u32 val = PSR2_MAN_TRK_CTL_ENABLE;
> > > + u32 val = 0;
> > > +
> > > + /*
> > > + * ADL_P doesn't have HW tracking nor manual tracking enable
> > > + * bit
> > > + */
> >
> > Nit: Unnecessary comment.
> >
> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> >
> > > + if (!IS_ALDERLAKE_P(dev_priv))
> > > + val = PSR2_MAN_TRK_CTL_ENABLE;
> > > +
> > > + /* SF partial frame enable has to be set even on full update */
> > > + val |= man_trk_ctl_partial_frame_bit_get(dev_priv);
> > >
> > > if (full_update) {
> > > /*
> > > @@ -1563,7 +1580,6 @@ static void psr2_man_trk_ctl_calc(struct
> > > intel_crtc_state *crtc_state,
> > > } else {
> > > drm_WARN_ON(crtc_state->uapi.crtc->dev, clip->y1 % 4 ||
> > > clip->y2 % 4);
> > >
> > > - val |= PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> > > val |= PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 /
> > > 4
> > > + 1);
> > > val |= PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip->y2 / 4
> > > +
> > > 1);
> > > }
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h
> > > index 2b8a3086ed35..89bbb64e520d 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -2316,6 +2316,7 @@
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val) REG_FIELD_PREP(ADL
> > > P_
> > > PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK REG_GENMASK(12, 0)
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(val) REG_FIELD_PREP(ADL
> > > P_
> > > PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK, val)
> > > +#define
> > > ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE REG_BIT(31)
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME REG_BIT(14)
> > > #define
> > > ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME REG_BIT(13)
> > >
> >
>
--
Cheers,
Lyude Paul (she/her)
Software Engineer at Red Hat
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update
2022-02-25 21:41 ` Lyude Paul
@ 2022-02-28 7:21 ` Hogander, Jouni
0 siblings, 0 replies; 12+ messages in thread
From: Hogander, Jouni @ 2022-02-28 7:21 UTC (permalink / raw)
To: lyude, intel-gfx, Souza, Jose; +Cc: mharpau
On Fri, 2022-02-25 at 16:41 -0500, Lyude Paul wrote:
> JFYI I've been running the patch on my laptop for about a day now,
> flickering
> is totally gone and also I'm a bit astonished at the power savings!
Good to hear you had now this good user experience with i915 + latest
PSR2 fixes.
> Tested-by: Lyude Paul <lyude@redhat.com>
>
Thank you a lot for testing support you provided here.
> On Thu, 2022-02-24 at 15:02 -0500, Lyude Paul wrote:
> > Also - I realized this is missing an appropriate Fixes: tag for the
> > commit
> > that enabled PSR2 selective fetch on tigerlake in the first place
> >
> > On Wed, 2022-02-23 at 17:32 +0000, Souza, Jose wrote:
> > > On Wed, 2022-02-23 at 14:48 +0200, Jouni Högander wrote:
> > > > Currently we are observing occasional screen flickering when
> > > > PSR2 selective fetch is enabled. More specifically glitch seems
> > > > to happen on full frame update when cursor moves to coords
> > > > x = -1 or y = -1.
> > > >
> > > > According to Bspec SF Single full frame should not be set if
> > > > SF Partial Frame Enable is not set. This happened to be true
> > > > for
> > > > ADLP as PSR2_MAN_TRK_CTL_ENABLE is always set and for ADLP it's
> > > > actually "SF Partial Frame Enable" (Bit 31).
> > > >
> > > > Setting "SF Partial Frame Enable" bit also on full update seems
> > > > to
> > > > fix screen flickering.
> > > >
> > > > Also make code more clear by setting PSR2_MAN_TRK_CTL_ENABLE
> > > > only if not on ADLP as this bit doesn't exist in ADLP.
> > >
> > > Bit exist but has another name.
> > >
> > > > Bspec: 49274
> > > >
> > > > v2: Fix Mihai Harpau email address
> > > >
> > > > Reported-by: Lyude Paul <lyude@redhat.com>
> > > > Cc: Mihai Harpau <mharpau@gmail.com>
> > > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Bugzilla:
> > > > https://gitlab.freedesktop.org/drm/intel/-/issues/5077
> > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_psr.c | 20
> > > > ++++++++++++++++++--
> > > > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > > > 2 files changed, 19 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > index 2e0b092f4b6b..90aca75e05e0 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > @@ -1439,6 +1439,13 @@ static inline u32
> > > > man_trk_ctl_single_full_frame_bit_get(struct drm_i915_private
> > > > PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME;
> > > > }
> > > >
> > > > +static inline u32 man_trk_ctl_partial_frame_bit_get(struct
> > > > drm_i915_private *dev_priv)
> > > > +{
> > > > + return IS_ALDERLAKE_P(dev_priv) ?
> > > > + ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE :
> > > > + PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> > > > +}
> > > > +
> > > > static void psr_force_hw_tracking_exit(struct intel_dp
> > > > *intel_dp)
> > > > {
> > > > struct drm_i915_private *dev_priv =
> > > > dp_to_i915(intel_dp);
> > > > @@ -1543,7 +1550,17 @@ static void psr2_man_trk_ctl_calc(struct
> > > > intel_crtc_state *crtc_state,
> > > > {
> > > > struct intel_crtc *crtc = to_intel_crtc(crtc_state-
> > > > >uapi.crtc);
> > > > struct drm_i915_private *dev_priv = to_i915(crtc-
> > > > >base.dev);
> > > > - u32 val = PSR2_MAN_TRK_CTL_ENABLE;
> > > > + u32 val = 0;
> > > > +
> > > > + /*
> > > > + * ADL_P doesn't have HW tracking nor manual tracking
> > > > enable
> > > > + * bit
> > > > + */
> > >
> > > Nit: Unnecessary comment.
> > >
> > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > >
> > > > + if (!IS_ALDERLAKE_P(dev_priv))
> > > > + val = PSR2_MAN_TRK_CTL_ENABLE;
> > > > +
> > > > + /* SF partial frame enable has to be set even on full
> > > > update */
> > > > + val |= man_trk_ctl_partial_frame_bit_get(dev_priv);
> > > >
> > > > if (full_update) {
> > > > /*
> > > > @@ -1563,7 +1580,6 @@ static void psr2_man_trk_ctl_calc(struct
> > > > intel_crtc_state *crtc_state,
> > > > } else {
> > > > drm_WARN_ON(crtc_state->uapi.crtc->dev, clip-
> > > > >y1 % 4 ||
> > > > clip->y2 % 4);
> > > >
> > > > - val |=
> > > > PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE;
> > > > val |=
> > > > PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(clip->y1 /
> > > > 4
> > > > + 1);
> > > > val |=
> > > > PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(clip->y2 / 4
> > > > +
> > > > 1);
> > > > }
> > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > > b/drivers/gpu/drm/i915/i915_reg.h
> > > > index 2b8a3086ed35..89bbb64e520d 100644
> > > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > > @@ -2316,6 +2316,7 @@
> > > > #define
> > > > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val) REG_FIELD
> > > > _PREP(ADL
> > > > P_
> > > > PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)
> > > > #define
> > > > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK REG_GENMA
> > > > SK(12, 0)
> > > > #define
> > > > ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(val) REG_FIELD
> > > > _PREP(ADL
> > > > P_
> > > > PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK, val)
> > > > +#define
> > > > ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE REG_BIT(3
> > > > 1)
> > > > #define
> > > > ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME REG_BIT(1
> > > > 4)
> > > > #define
> > > > ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME REG_BIT(1
> > > > 3)
> > > >
BR,
Jouni Högander
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2022-02-28 7:21 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-23 12:48 [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Jouni Högander
2022-02-23 17:32 ` Souza, Jose
2022-02-24 20:02 ` Lyude Paul
2022-02-25 7:06 ` Hogander, Jouni
2022-02-25 21:41 ` Lyude Paul
2022-02-28 7:21 ` Hogander, Jouni
2022-02-24 4:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev2) Patchwork
2022-02-24 5:12 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-02-24 18:26 ` Patchwork
2022-02-24 19:49 ` [Intel-gfx] [PATCH v2] drm/i915/psr: Set "SF Partial Frame Enable" also on full update Lyude Paul
2022-02-25 1:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/psr: Set "SF Partial Frame Enable" also on full update (rev3) Patchwork
2022-02-25 1:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
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