* [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
@ 2021-07-01 11:42 Maarten Lankhorst
2021-07-01 11:50 ` Maarten Lankhorst
` (4 more replies)
0 siblings, 5 replies; 13+ messages in thread
From: Maarten Lankhorst @ 2021-07-01 11:42 UTC (permalink / raw)
To: intel-gfx
This is only used for ttm, and tells userspace that the mapping type is
ignored. This disables the other type of mmap offsets when discrete
memory is used, so fix the selftests as well.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 +++++++++++-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
.../drm/i915/gem/selftests/i915_gem_mman.c | 27 +++++++++++++++++--
include/uapi/drm/i915_drm.h | 9 ++++---
4 files changed, 47 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index a90f796e85c0..b34be9e5d094 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
return -ENODEV;
if (obj->ops->mmap_offset) {
+ if (mmap_type != I915_MMAP_TYPE_TTM)
+ return -ENODEV;
+
*offset = obj->ops->mmap_offset(obj);
return 0;
}
+ if (mmap_type == I915_MMAP_TYPE_TTM)
+ return -ENODEV;
+
if (mmap_type != I915_MMAP_TYPE_GTT &&
!i915_gem_object_has_struct_page(obj) &&
!i915_gem_object_has_iomem(obj))
@@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
{
enum i915_mmap_type mmap_type;
- if (boot_cpu_has(X86_FEATURE_PAT))
+ if (HAS_LMEM(to_i915(dev)))
+ mmap_type = I915_MMAP_TYPE_TTM;
+ else if (boot_cpu_has(X86_FEATURE_PAT))
mmap_type = I915_MMAP_TYPE_WC;
else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
return -ENODEV;
@@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
type = I915_MMAP_TYPE_UC;
break;
+ case I915_MMAP_OFFSET_TTM:
+ type = I915_MMAP_TYPE_TTM;
+ break;
+
default:
return -EINVAL;
}
@@ -968,6 +980,9 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
vma->vm_ops = &vm_ops_cpu;
break;
+ case I915_MMAP_TYPE_TTM:
+ GEM_WARN_ON(mmo->mmap_type == I915_MMAP_TYPE_TTM);
+ /* fall-through */
case I915_MMAP_TYPE_WB:
vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
vma->vm_ops = &vm_ops_cpu;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 441f913c87e6..8b872b22a7ec 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -96,6 +96,7 @@ enum i915_mmap_type {
I915_MMAP_TYPE_WC,
I915_MMAP_TYPE_WB,
I915_MMAP_TYPE_UC,
+ I915_MMAP_TYPE_TTM,
};
struct i915_mmap_offset {
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index 607b7d2d4c29..321271bd2fa1 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -573,6 +573,14 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
return 0;
}
+static enum i915_mmap_type default_mapping(struct drm_i915_private *i915)
+{
+ if (HAS_LMEM(i915))
+ return I915_MMAP_TYPE_TTM;
+
+ return I915_MMAP_TYPE_GTT;
+}
+
static bool assert_mmap_offset(struct drm_i915_private *i915,
unsigned long size,
int expected)
@@ -585,7 +593,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915,
if (IS_ERR(obj))
return expected && expected == PTR_ERR(obj);
- ret = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
+ ret = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
i915_gem_object_put(obj);
return ret == expected;
@@ -689,7 +697,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
goto out;
}
- err = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
+ err = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
if (err) {
pr_err("Unable to insert object into reclaimed hole\n");
goto err_obj;
@@ -831,8 +839,14 @@ static int wc_check(struct drm_i915_gem_object *obj)
static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
{
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
bool no_map;
+ if (HAS_LMEM(i915))
+ return type == I915_MMAP_TYPE_TTM;
+ else if (type == I915_MMAP_TYPE_TTM)
+ return false;
+
if (type == I915_MMAP_TYPE_GTT &&
!i915_ggtt_has_aperture(&to_i915(obj->base.dev)->ggtt))
return false;
@@ -970,6 +984,8 @@ static int igt_mmap(void *arg)
err = __igt_mmap(i915, obj, I915_MMAP_TYPE_GTT);
if (err == 0)
err = __igt_mmap(i915, obj, I915_MMAP_TYPE_WC);
+ if (err == 0)
+ err = __igt_mmap(i915, obj, I915_MMAP_TYPE_TTM);
i915_gem_object_put(obj);
if (err)
@@ -987,6 +1003,7 @@ static const char *repr_mmap_type(enum i915_mmap_type type)
case I915_MMAP_TYPE_WB: return "wb";
case I915_MMAP_TYPE_WC: return "wc";
case I915_MMAP_TYPE_UC: return "uc";
+ case I915_MMAP_TYPE_TTM: return "ttm";
default: return "unknown";
}
}
@@ -1100,6 +1117,8 @@ static int igt_mmap_access(void *arg)
err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_WC);
if (err == 0)
err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_UC);
+ if (err == 0)
+ err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_TTM);
i915_gem_object_put(obj);
if (err)
@@ -1241,6 +1260,8 @@ static int igt_mmap_gpu(void *arg)
err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_GTT);
if (err == 0)
err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_WC);
+ if (err == 0)
+ err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_TTM);
i915_gem_object_put(obj);
if (err)
@@ -1396,6 +1417,8 @@ static int igt_mmap_revoke(void *arg)
err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_GTT);
if (err == 0)
err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_WC);
+ if (err == 0)
+ err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_TTM);
i915_gem_object_put(obj);
if (err)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 2f70c48567c0..12ec9c7f1711 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -867,10 +867,11 @@ struct drm_i915_gem_mmap_offset {
* (GTT, WC, WB, UC, etc) should be included.
*/
__u64 flags;
-#define I915_MMAP_OFFSET_GTT 0
-#define I915_MMAP_OFFSET_WC 1
-#define I915_MMAP_OFFSET_WB 2
-#define I915_MMAP_OFFSET_UC 3
+#define I915_MMAP_OFFSET_GTT 0
+#define I915_MMAP_OFFSET_WC 1
+#define I915_MMAP_OFFSET_WB 2
+#define I915_MMAP_OFFSET_UC 3
+#define I915_MMAP_OFFSET_TTM 4
/*
* Zero-terminated chain of extensions.
--
2.31.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
2021-07-01 11:42 [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap Maarten Lankhorst
@ 2021-07-01 11:50 ` Maarten Lankhorst
2021-07-05 14:36 ` Matthew Auld
2021-07-01 11:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (3 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Maarten Lankhorst @ 2021-07-01 11:50 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Ekstrand, Jason, Kenneth Graunke
Op 01-07-2021 om 13:42 schreef Maarten Lankhorst:
> This is only used for ttm, and tells userspace that the mapping type is
> ignored. This disables the other type of mmap offsets when discrete
> memory is used, so fix the selftests as well.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 +++++++++++-
> .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
> .../drm/i915/gem/selftests/i915_gem_mman.c | 27 +++++++++++++++++--
> include/uapi/drm/i915_drm.h | 9 ++++---
> 4 files changed, 47 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index a90f796e85c0..b34be9e5d094 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
> return -ENODEV;
>
> if (obj->ops->mmap_offset) {
> + if (mmap_type != I915_MMAP_TYPE_TTM)
> + return -ENODEV;
> +
> *offset = obj->ops->mmap_offset(obj);
> return 0;
> }
>
> + if (mmap_type == I915_MMAP_TYPE_TTM)
> + return -ENODEV;
> +
> if (mmap_type != I915_MMAP_TYPE_GTT &&
> !i915_gem_object_has_struct_page(obj) &&
> !i915_gem_object_has_iomem(obj))
> @@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
> {
> enum i915_mmap_type mmap_type;
>
> - if (boot_cpu_has(X86_FEATURE_PAT))
> + if (HAS_LMEM(to_i915(dev)))
> + mmap_type = I915_MMAP_TYPE_TTM;
> + else if (boot_cpu_has(X86_FEATURE_PAT))
> mmap_type = I915_MMAP_TYPE_WC;
> else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
> return -ENODEV;
> @@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
> type = I915_MMAP_TYPE_UC;
> break;
>
> + case I915_MMAP_OFFSET_TTM:
> + type = I915_MMAP_TYPE_TTM;
> + break;
> +
> default:
> return -EINVAL;
> }
> @@ -968,6 +980,9 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
> vma->vm_ops = &vm_ops_cpu;
> break;
>
> + case I915_MMAP_TYPE_TTM:
> + GEM_WARN_ON(mmo->mmap_type == I915_MMAP_TYPE_TTM);
> + /* fall-through */
> case I915_MMAP_TYPE_WB:
> vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
> vma->vm_ops = &vm_ops_cpu;
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index 441f913c87e6..8b872b22a7ec 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -96,6 +96,7 @@ enum i915_mmap_type {
> I915_MMAP_TYPE_WC,
> I915_MMAP_TYPE_WB,
> I915_MMAP_TYPE_UC,
> + I915_MMAP_TYPE_TTM,
> };
>
> struct i915_mmap_offset {
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> index 607b7d2d4c29..321271bd2fa1 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> @@ -573,6 +573,14 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
> return 0;
> }
>
> +static enum i915_mmap_type default_mapping(struct drm_i915_private *i915)
> +{
> + if (HAS_LMEM(i915))
> + return I915_MMAP_TYPE_TTM;
> +
> + return I915_MMAP_TYPE_GTT;
> +}
> +
> static bool assert_mmap_offset(struct drm_i915_private *i915,
> unsigned long size,
> int expected)
> @@ -585,7 +593,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915,
> if (IS_ERR(obj))
> return expected && expected == PTR_ERR(obj);
>
> - ret = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> + ret = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> i915_gem_object_put(obj);
>
> return ret == expected;
> @@ -689,7 +697,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
> goto out;
> }
>
> - err = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> + err = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> if (err) {
> pr_err("Unable to insert object into reclaimed hole\n");
> goto err_obj;
> @@ -831,8 +839,14 @@ static int wc_check(struct drm_i915_gem_object *obj)
>
> static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
> {
> + struct drm_i915_private *i915 = to_i915(obj->base.dev);
> bool no_map;
>
> + if (HAS_LMEM(i915))
> + return type == I915_MMAP_TYPE_TTM;
> + else if (type == I915_MMAP_TYPE_TTM)
> + return false;
> +
> if (type == I915_MMAP_TYPE_GTT &&
> !i915_ggtt_has_aperture(&to_i915(obj->base.dev)->ggtt))
> return false;
> @@ -970,6 +984,8 @@ static int igt_mmap(void *arg)
> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_GTT);
> if (err == 0)
> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_WC);
> + if (err == 0)
> + err = __igt_mmap(i915, obj, I915_MMAP_TYPE_TTM);
>
> i915_gem_object_put(obj);
> if (err)
> @@ -987,6 +1003,7 @@ static const char *repr_mmap_type(enum i915_mmap_type type)
> case I915_MMAP_TYPE_WB: return "wb";
> case I915_MMAP_TYPE_WC: return "wc";
> case I915_MMAP_TYPE_UC: return "uc";
> + case I915_MMAP_TYPE_TTM: return "ttm";
> default: return "unknown";
> }
> }
> @@ -1100,6 +1117,8 @@ static int igt_mmap_access(void *arg)
> err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_WC);
> if (err == 0)
> err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_UC);
> + if (err == 0)
> + err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_TTM);
>
> i915_gem_object_put(obj);
> if (err)
> @@ -1241,6 +1260,8 @@ static int igt_mmap_gpu(void *arg)
> err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_GTT);
> if (err == 0)
> err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_WC);
> + if (err == 0)
> + err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_TTM);
>
> i915_gem_object_put(obj);
> if (err)
> @@ -1396,6 +1417,8 @@ static int igt_mmap_revoke(void *arg)
> err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_GTT);
> if (err == 0)
> err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_WC);
> + if (err == 0)
> + err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_TTM);
>
> i915_gem_object_put(obj);
> if (err)
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 2f70c48567c0..12ec9c7f1711 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -867,10 +867,11 @@ struct drm_i915_gem_mmap_offset {
> * (GTT, WC, WB, UC, etc) should be included.
> */
> __u64 flags;
> -#define I915_MMAP_OFFSET_GTT 0
> -#define I915_MMAP_OFFSET_WC 1
> -#define I915_MMAP_OFFSET_WB 2
> -#define I915_MMAP_OFFSET_UC 3
> +#define I915_MMAP_OFFSET_GTT 0
> +#define I915_MMAP_OFFSET_WC 1
> +#define I915_MMAP_OFFSET_WB 2
> +#define I915_MMAP_OFFSET_UC 3
> +#define I915_MMAP_OFFSET_TTM 4
>
> /*
> * Zero-terminated chain of extensions.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
2021-07-01 11:50 ` Maarten Lankhorst
@ 2021-07-05 14:36 ` Matthew Auld
2021-07-09 9:30 ` Matthew Auld
0 siblings, 1 reply; 13+ messages in thread
From: Matthew Auld @ 2021-07-05 14:36 UTC (permalink / raw)
To: Maarten Lankhorst
Cc: Ekstrand, Jason, Intel Graphics Development, Kenneth Graunke
On Thu, 1 Jul 2021 at 12:50, Maarten Lankhorst
<maarten.lankhorst@linux.intel.com> wrote:
>
> Op 01-07-2021 om 13:42 schreef Maarten Lankhorst:
> > This is only used for ttm, and tells userspace that the mapping type is
> > ignored. This disables the other type of mmap offsets when discrete
> > memory is used, so fix the selftests as well.
> >
> > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 +++++++++++-
> > .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
> > .../drm/i915/gem/selftests/i915_gem_mman.c | 27 +++++++++++++++++--
> > include/uapi/drm/i915_drm.h | 9 ++++---
> > 4 files changed, 47 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > index a90f796e85c0..b34be9e5d094 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > @@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
> > return -ENODEV;
> >
> > if (obj->ops->mmap_offset) {
> > + if (mmap_type != I915_MMAP_TYPE_TTM)
> > + return -ENODEV;
> > +
> > *offset = obj->ops->mmap_offset(obj);
> > return 0;
> > }
> >
> > + if (mmap_type == I915_MMAP_TYPE_TTM)
> > + return -ENODEV;
> > +
> > if (mmap_type != I915_MMAP_TYPE_GTT &&
> > !i915_gem_object_has_struct_page(obj) &&
> > !i915_gem_object_has_iomem(obj))
> > @@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
> > {
> > enum i915_mmap_type mmap_type;
> >
> > - if (boot_cpu_has(X86_FEATURE_PAT))
> > + if (HAS_LMEM(to_i915(dev)))
> > + mmap_type = I915_MMAP_TYPE_TTM;
> > + else if (boot_cpu_has(X86_FEATURE_PAT))
> > mmap_type = I915_MMAP_TYPE_WC;
Hmm, I think we still need to check for X86_FEATURE_PAT somewhere,
since this is still just WC for lmem?
> > else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
> > return -ENODEV;
> > @@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
> > type = I915_MMAP_TYPE_UC;
> > break;
> >
> > + case I915_MMAP_OFFSET_TTM:
> > + type = I915_MMAP_TYPE_TTM;
> > + break;
Would it not be simpler to just convert to WC or WB here, if we
encounter _TTM? With that we also don't need to touch the dumb mmap
stuff and i915_gem_mmap()?
if (IS_DGFX()) {
if (args->type != OFFSET_TTM)
return -ENODEV:
GEM_BUG_ON(!obj->mm.n_placements);
if (i915_gem_object_placement_possible(obj, INTEL_MEMORY_LOCAL)) {
type = TYPE_WC;
else
ttype = TYPE_WB;
}
https://patchwork.freedesktop.org/patch/442579/?series=92209&rev=1
> > +
> > default:
> > return -EINVAL;
> > }
> > @@ -968,6 +980,9 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
> > vma->vm_ops = &vm_ops_cpu;
> > break;
> >
> > + case I915_MMAP_TYPE_TTM:
> > + GEM_WARN_ON(mmo->mmap_type == I915_MMAP_TYPE_TTM);
> > + /* fall-through */
Hmm, we still want WC for lmem, or if it's possible for it to be placed there.
> > case I915_MMAP_TYPE_WB:
> > vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
> > vma->vm_ops = &vm_ops_cpu;
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > index 441f913c87e6..8b872b22a7ec 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > @@ -96,6 +96,7 @@ enum i915_mmap_type {
> > I915_MMAP_TYPE_WC,
> > I915_MMAP_TYPE_WB,
> > I915_MMAP_TYPE_UC,
> > + I915_MMAP_TYPE_TTM,
> > };
> >
> > struct i915_mmap_offset {
> > diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> > index 607b7d2d4c29..321271bd2fa1 100644
> > --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> > +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> > @@ -573,6 +573,14 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
> > return 0;
> > }
> >
> > +static enum i915_mmap_type default_mapping(struct drm_i915_private *i915)
> > +{
> > + if (HAS_LMEM(i915))
> > + return I915_MMAP_TYPE_TTM;
> > +
> > + return I915_MMAP_TYPE_GTT;
> > +}
> > +
> > static bool assert_mmap_offset(struct drm_i915_private *i915,
> > unsigned long size,
> > int expected)
> > @@ -585,7 +593,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915,
> > if (IS_ERR(obj))
> > return expected && expected == PTR_ERR(obj);
> >
> > - ret = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> > + ret = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> > i915_gem_object_put(obj);
> >
> > return ret == expected;
> > @@ -689,7 +697,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
> > goto out;
> > }
> >
> > - err = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> > + err = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> > if (err) {
> > pr_err("Unable to insert object into reclaimed hole\n");
> > goto err_obj;
> > @@ -831,8 +839,14 @@ static int wc_check(struct drm_i915_gem_object *obj)
> >
> > static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
> > {
> > + struct drm_i915_private *i915 = to_i915(obj->base.dev);
> > bool no_map;
> >
> > + if (HAS_LMEM(i915))
> > + return type == I915_MMAP_TYPE_TTM;
> > + else if (type == I915_MMAP_TYPE_TTM)
> > + return false;
> > +
> > if (type == I915_MMAP_TYPE_GTT &&
> > !i915_ggtt_has_aperture(&to_i915(obj->base.dev)->ggtt))
> > return false;
> > @@ -970,6 +984,8 @@ static int igt_mmap(void *arg)
> > err = __igt_mmap(i915, obj, I915_MMAP_TYPE_GTT);
> > if (err == 0)
> > err = __igt_mmap(i915, obj, I915_MMAP_TYPE_WC);
> > + if (err == 0)
> > + err = __igt_mmap(i915, obj, I915_MMAP_TYPE_TTM);
> >
> > i915_gem_object_put(obj);
> > if (err)
> > @@ -987,6 +1003,7 @@ static const char *repr_mmap_type(enum i915_mmap_type type)
> > case I915_MMAP_TYPE_WB: return "wb";
> > case I915_MMAP_TYPE_WC: return "wc";
> > case I915_MMAP_TYPE_UC: return "uc";
> > + case I915_MMAP_TYPE_TTM: return "ttm";
> > default: return "unknown";
> > }
> > }
> > @@ -1100,6 +1117,8 @@ static int igt_mmap_access(void *arg)
> > err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_WC);
> > if (err == 0)
> > err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_UC);
> > + if (err == 0)
> > + err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_TTM);
> >
> > i915_gem_object_put(obj);
> > if (err)
> > @@ -1241,6 +1260,8 @@ static int igt_mmap_gpu(void *arg)
> > err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_GTT);
> > if (err == 0)
> > err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_WC);
> > + if (err == 0)
> > + err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_TTM);
> >
> > i915_gem_object_put(obj);
> > if (err)
> > @@ -1396,6 +1417,8 @@ static int igt_mmap_revoke(void *arg)
> > err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_GTT);
> > if (err == 0)
> > err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_WC);
> > + if (err == 0)
> > + err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_TTM);
> >
> > i915_gem_object_put(obj);
> > if (err)
> > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> > index 2f70c48567c0..12ec9c7f1711 100644
> > --- a/include/uapi/drm/i915_drm.h
> > +++ b/include/uapi/drm/i915_drm.h
> > @@ -867,10 +867,11 @@ struct drm_i915_gem_mmap_offset {
> > * (GTT, WC, WB, UC, etc) should be included.
> > */
> > __u64 flags;
> > -#define I915_MMAP_OFFSET_GTT 0
> > -#define I915_MMAP_OFFSET_WC 1
> > -#define I915_MMAP_OFFSET_WB 2
> > -#define I915_MMAP_OFFSET_UC 3
> > +#define I915_MMAP_OFFSET_GTT 0
> > +#define I915_MMAP_OFFSET_WC 1
> > +#define I915_MMAP_OFFSET_WB 2
> > +#define I915_MMAP_OFFSET_UC 3
> > +#define I915_MMAP_OFFSET_TTM 4
> >
> > /*
> > * Zero-terminated chain of extensions.
>
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
2021-07-05 14:36 ` Matthew Auld
@ 2021-07-09 9:30 ` Matthew Auld
2021-07-09 12:47 ` Maarten Lankhorst
0 siblings, 1 reply; 13+ messages in thread
From: Matthew Auld @ 2021-07-09 9:30 UTC (permalink / raw)
To: Maarten Lankhorst
Cc: Ekstrand, Jason, Intel Graphics Development, Kenneth Graunke
On Mon, 5 Jul 2021 at 15:36, Matthew Auld
<matthew.william.auld@gmail.com> wrote:
>
> On Thu, 1 Jul 2021 at 12:50, Maarten Lankhorst
> <maarten.lankhorst@linux.intel.com> wrote:
> >
> > Op 01-07-2021 om 13:42 schreef Maarten Lankhorst:
> > > This is only used for ttm, and tells userspace that the mapping type is
> > > ignored. This disables the other type of mmap offsets when discrete
> > > memory is used, so fix the selftests as well.
> > >
> > > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 +++++++++++-
> > > .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
> > > .../drm/i915/gem/selftests/i915_gem_mman.c | 27 +++++++++++++++++--
> > > include/uapi/drm/i915_drm.h | 9 ++++---
> > > 4 files changed, 47 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > > index a90f796e85c0..b34be9e5d094 100644
> > > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > > @@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
> > > return -ENODEV;
> > >
> > > if (obj->ops->mmap_offset) {
> > > + if (mmap_type != I915_MMAP_TYPE_TTM)
> > > + return -ENODEV;
> > > +
> > > *offset = obj->ops->mmap_offset(obj);
> > > return 0;
> > > }
> > >
> > > + if (mmap_type == I915_MMAP_TYPE_TTM)
> > > + return -ENODEV;
> > > +
> > > if (mmap_type != I915_MMAP_TYPE_GTT &&
> > > !i915_gem_object_has_struct_page(obj) &&
> > > !i915_gem_object_has_iomem(obj))
> > > @@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
> > > {
> > > enum i915_mmap_type mmap_type;
> > >
> > > - if (boot_cpu_has(X86_FEATURE_PAT))
> > > + if (HAS_LMEM(to_i915(dev)))
> > > + mmap_type = I915_MMAP_TYPE_TTM;
> > > + else if (boot_cpu_has(X86_FEATURE_PAT))
> > > mmap_type = I915_MMAP_TYPE_WC;
>
> Hmm, I think we still need to check for X86_FEATURE_PAT somewhere,
> since this is still just WC for lmem?
>
> > > else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
> > > return -ENODEV;
> > > @@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
> > > type = I915_MMAP_TYPE_UC;
> > > break;
> > >
> > > + case I915_MMAP_OFFSET_TTM:
> > > + type = I915_MMAP_TYPE_TTM;
> > > + break;
>
> Would it not be simpler to just convert to WC or WB here, if we
> encounter _TTM? With that we also don't need to touch the dumb mmap
> stuff and i915_gem_mmap()?
>
> if (IS_DGFX()) {
> if (args->type != OFFSET_TTM)
> return -ENODEV:
>
> GEM_BUG_ON(!obj->mm.n_placements);
> if (i915_gem_object_placement_possible(obj, INTEL_MEMORY_LOCAL)) {
> type = TYPE_WC;
> else
> ttype = TYPE_WB;
> }
>
> https://patchwork.freedesktop.org/patch/442579/?series=92209&rev=1
fyi this patch is now merged, in case you need the
i915_gem_object_placement_possible() helper.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
2021-07-09 9:30 ` Matthew Auld
@ 2021-07-09 12:47 ` Maarten Lankhorst
0 siblings, 0 replies; 13+ messages in thread
From: Maarten Lankhorst @ 2021-07-09 12:47 UTC (permalink / raw)
To: Matthew Auld; +Cc: Ekstrand, Jason, Intel Graphics Development, Kenneth Graunke
Op 09-07-2021 om 11:30 schreef Matthew Auld:
> On Mon, 5 Jul 2021 at 15:36, Matthew Auld
> <matthew.william.auld@gmail.com> wrote:
>> On Thu, 1 Jul 2021 at 12:50, Maarten Lankhorst
>> <maarten.lankhorst@linux.intel.com> wrote:
>>> Op 01-07-2021 om 13:42 schreef Maarten Lankhorst:
>>>> This is only used for ttm, and tells userspace that the mapping type is
>>>> ignored. This disables the other type of mmap offsets when discrete
>>>> memory is used, so fix the selftests as well.
>>>>
>>>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 +++++++++++-
>>>> .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
>>>> .../drm/i915/gem/selftests/i915_gem_mman.c | 27 +++++++++++++++++--
>>>> include/uapi/drm/i915_drm.h | 9 ++++---
>>>> 4 files changed, 47 insertions(+), 7 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>>>> index a90f796e85c0..b34be9e5d094 100644
>>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>>>> @@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
>>>> return -ENODEV;
>>>>
>>>> if (obj->ops->mmap_offset) {
>>>> + if (mmap_type != I915_MMAP_TYPE_TTM)
>>>> + return -ENODEV;
>>>> +
>>>> *offset = obj->ops->mmap_offset(obj);
>>>> return 0;
>>>> }
>>>>
>>>> + if (mmap_type == I915_MMAP_TYPE_TTM)
>>>> + return -ENODEV;
>>>> +
>>>> if (mmap_type != I915_MMAP_TYPE_GTT &&
>>>> !i915_gem_object_has_struct_page(obj) &&
>>>> !i915_gem_object_has_iomem(obj))
>>>> @@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
>>>> {
>>>> enum i915_mmap_type mmap_type;
>>>>
>>>> - if (boot_cpu_has(X86_FEATURE_PAT))
>>>> + if (HAS_LMEM(to_i915(dev)))
>>>> + mmap_type = I915_MMAP_TYPE_TTM;
>>>> + else if (boot_cpu_has(X86_FEATURE_PAT))
>>>> mmap_type = I915_MMAP_TYPE_WC;
>> Hmm, I think we still need to check for X86_FEATURE_PAT somewhere,
>> since this is still just WC for lmem?
>>
>>>> else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
>>>> return -ENODEV;
>>>> @@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
>>>> type = I915_MMAP_TYPE_UC;
>>>> break;
>>>>
>>>> + case I915_MMAP_OFFSET_TTM:
>>>> + type = I915_MMAP_TYPE_TTM;
>>>> + break;
>> Would it not be simpler to just convert to WC or WB here, if we
>> encounter _TTM? With that we also don't need to touch the dumb mmap
>> stuff and i915_gem_mmap()?
>>
>> if (IS_DGFX()) {
>> if (args->type != OFFSET_TTM)
>> return -ENODEV:
>>
>> GEM_BUG_ON(!obj->mm.n_placements);
>> if (i915_gem_object_placement_possible(obj, INTEL_MEMORY_LOCAL)) {
>> type = TYPE_WC;
>> else
>> ttype = TYPE_WB;
>> }
>>
>> https://patchwork.freedesktop.org/patch/442579/?series=92209&rev=1
> fyi this patch is now merged, in case you need the
> i915_gem_object_placement_possible() helper.
I think a separate type is better, as it could still be mapped WB if evicted to system memory?
~Maarten
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add TTM offset argument to mmap.
2021-07-01 11:42 [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap Maarten Lankhorst
2021-07-01 11:50 ` Maarten Lankhorst
@ 2021-07-01 11:50 ` Patchwork
2021-07-01 12:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2021-07-01 11:50 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add TTM offset argument to mmap.
URL : https://patchwork.freedesktop.org/series/92103/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
182e2988c2da drm/i915: Add TTM offset argument to mmap.
-:61: WARNING:PREFER_FALLTHROUGH: Prefer 'fallthrough;' over fallthrough comment
#61: FILE: drivers/gpu/drm/i915/gem/i915_gem_mman.c:985:
+ /* fall-through */
total: 0 errors, 1 warnings, 0 checks, 150 lines checked
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Add TTM offset argument to mmap.
2021-07-01 11:42 [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap Maarten Lankhorst
2021-07-01 11:50 ` Maarten Lankhorst
2021-07-01 11:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2021-07-01 12:19 ` Patchwork
2021-07-01 13:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-09 14:14 ` [Intel-gfx] [PATCH] " Jason Ekstrand
4 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2021-07-01 12:19 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 2321 bytes --]
== Series Details ==
Series: drm/i915: Add TTM offset argument to mmap.
URL : https://patchwork.freedesktop.org/series/92103/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10297 -> Patchwork_20505
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/index.html
Known issues
------------
Here are the changes found in Patchwork_20505 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [INCOMPLETE][2] ([i915#2782]) -> [PASS][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3717]: https://gitlab.freedesktop.org/drm/intel/issues/3717
Participating hosts (37 -> 34)
------------------------------
Missing (3): fi-kbl-soraka fi-bsw-cyan fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_10297 -> Patchwork_20505
CI-20190529: 20190529
CI_DRM_10297: 96c7ad60de68518bdcd0d0e6381a2359034a0226 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6125: 5bb62cb290fa32777934de4b39e107ccd282f7e8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20505: 182e2988c2da3bcc301241b71dd643b3ce0e6b27 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
182e2988c2da drm/i915: Add TTM offset argument to mmap.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/index.html
[-- Attachment #1.2: Type: text/html, Size: 2811 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Add TTM offset argument to mmap.
2021-07-01 11:42 [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap Maarten Lankhorst
` (2 preceding siblings ...)
2021-07-01 12:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-07-01 13:27 ` Patchwork
2021-07-09 14:14 ` [Intel-gfx] [PATCH] " Jason Ekstrand
4 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2021-07-01 13:27 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 29661 bytes --]
== Series Details ==
Series: drm/i915: Add TTM offset argument to mmap.
URL : https://patchwork.freedesktop.org/series/92103/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10297_full -> Patchwork_20505_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_20505_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20505_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_20505_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
- shard-glk: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-glk3/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk2/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-skl: NOTRUN -> [FAIL][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
Known issues
------------
Here are the changes found in Patchwork_20505_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@read_all_entries_display_on:
- shard-skl: [PASS][4] -> [DMESG-WARN][5] ([i915#1982]) +1 similar issue
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl9/igt@debugfs_test@read_all_entries_display_on.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl5/igt@debugfs_test@read_all_entries_display_on.html
* igt@gem_ctx_persistence@many-contexts:
- shard-tglb: [PASS][6] -> [FAIL][7] ([i915#2410])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-tglb7/igt@gem_ctx_persistence@many-contexts.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-tglb5/igt@gem_ctx_persistence@many-contexts.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][8] -> [TIMEOUT][9] ([i915#2369] / [i915#3063] / [i915#3648])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-tglb3/igt@gem_eio@unwedge-stress.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-tglb7/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-kbl: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-kbl3/igt@gem_exec_fair@basic-none@vecs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-kbl6/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-glk: NOTRUN -> [FAIL][12] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-iclb: NOTRUN -> [SKIP][13] ([fdo#109313])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_mmap_gtt@cpuset-big-copy-xy:
- shard-iclb: [PASS][14] -> [FAIL][15] ([i915#2428])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb3/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb7/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
* igt@gen9_exec_parse@bb-large:
- shard-skl: NOTRUN -> [FAIL][16] ([i915#3296])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl1/igt@gen9_exec_parse@bb-large.html
- shard-glk: NOTRUN -> [FAIL][17] ([i915#3296])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk7/igt@gen9_exec_parse@bb-large.html
- shard-kbl: NOTRUN -> [FAIL][18] ([i915#3296])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-kbl7/igt@gen9_exec_parse@bb-large.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-apl: NOTRUN -> [SKIP][19] ([fdo#109271]) +111 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl3/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-iclb: NOTRUN -> [SKIP][20] ([fdo#109303])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@i915_query@query-topology-known-pci-ids.html
* igt@kms_color@pipe-b-ctm-0-25:
- shard-skl: NOTRUN -> [DMESG-WARN][21] ([i915#1982])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl1/igt@kms_color@pipe-b-ctm-0-25.html
* igt@kms_color_chamelium@pipe-a-ctm-limited-range:
- shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [fdo#111827]) +5 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl2/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html
* igt@kms_color_chamelium@pipe-a-ctm-max:
- shard-iclb: NOTRUN -> [SKIP][23] ([fdo#109284] / [fdo#111827]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@kms_color_chamelium@pipe-a-ctm-max.html
* igt@kms_color_chamelium@pipe-a-ctm-negative:
- shard-kbl: NOTRUN -> [SKIP][24] ([fdo#109271] / [fdo#111827]) +1 similar issue
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-kbl7/igt@kms_color_chamelium@pipe-a-ctm-negative.html
- shard-glk: NOTRUN -> [SKIP][25] ([fdo#109271] / [fdo#111827]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk7/igt@kms_color_chamelium@pipe-a-ctm-negative.html
* igt@kms_color_chamelium@pipe-c-degamma:
- shard-skl: NOTRUN -> [SKIP][26] ([fdo#109271] / [fdo#111827]) +6 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl2/igt@kms_color_chamelium@pipe-c-degamma.html
* igt@kms_content_protection@atomic:
- shard-apl: NOTRUN -> [TIMEOUT][27] ([i915#1319])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl8/igt@kms_content_protection@atomic.html
* igt@kms_cursor_crc@pipe-c-cursor-512x170-rapid-movement:
- shard-iclb: NOTRUN -> [SKIP][28] ([fdo#109278]) +4 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@kms_cursor_crc@pipe-c-cursor-512x170-rapid-movement.html
* igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque:
- shard-skl: NOTRUN -> [FAIL][29] ([i915#3444])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl2/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html
* igt@kms_cursor_crc@pipe-d-cursor-32x32-sliding:
- shard-kbl: NOTRUN -> [SKIP][30] ([fdo#109271]) +27 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-kbl7/igt@kms_cursor_crc@pipe-d-cursor-32x32-sliding.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-iclb: NOTRUN -> [SKIP][31] ([fdo#109274] / [fdo#109278])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-skl: [PASS][32] -> [FAIL][33] ([i915#79])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-apl: [PASS][34] -> [DMESG-WARN][35] ([i915#180]) +1 similar issue
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-apl6/igt@kms_flip@flip-vs-suspend@a-dp1.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl1/igt@kms_flip@flip-vs-suspend@a-dp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: [PASS][36] -> [FAIL][37] ([i915#2122])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-glk: [PASS][38] -> [FAIL][39] ([i915#2546] / [i915#49])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-glk8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt:
- shard-skl: NOTRUN -> [SKIP][40] ([fdo#109271]) +83 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl1/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-suspend:
- shard-glk: NOTRUN -> [SKIP][41] ([fdo#109271]) +36 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk7/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render:
- shard-skl: [PASS][42] -> [FAIL][43] ([i915#49])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-skl: [PASS][44] -> [FAIL][45] ([i915#2546] / [i915#49]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-iclb: NOTRUN -> [SKIP][46] ([fdo#109280]) +3 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][47] -> [FAIL][48] ([i915#1188])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl1/igt@kms_hdr@bpc-switch-suspend.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl6/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][49] ([fdo#108145] / [i915#265])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl8/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][50] ([i915#265])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl2/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
- shard-skl: NOTRUN -> [FAIL][51] ([fdo#108145] / [i915#265])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
- shard-skl: NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#658])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
- shard-apl: NOTRUN -> [SKIP][53] ([fdo#109271] / [i915#658]) +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [PASS][54] -> [SKIP][55] ([fdo#109441]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb5/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@kms_sysfs_edid_timing:
- shard-apl: NOTRUN -> [FAIL][56] ([IGT#2])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl2/igt@kms_sysfs_edid_timing.html
* igt@nouveau_crc@pipe-c-source-outp-inactive:
- shard-iclb: NOTRUN -> [SKIP][57] ([i915#2530])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@nouveau_crc@pipe-c-source-outp-inactive.html
* igt@perf@polling-parameterized:
- shard-glk: [PASS][58] -> [FAIL][59] ([i915#1542])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-glk5/igt@perf@polling-parameterized.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk8/igt@perf@polling-parameterized.html
* igt@perf@polling-small-buf:
- shard-skl: [PASS][60] -> [FAIL][61] ([i915#1722])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl1/igt@perf@polling-small-buf.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl4/igt@perf@polling-small-buf.html
* igt@prime_nv_test@i915_import_pread_pwrite:
- shard-iclb: NOTRUN -> [SKIP][62] ([fdo#109291])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@prime_nv_test@i915_import_pread_pwrite.html
* igt@sysfs_clients@create:
- shard-apl: NOTRUN -> [SKIP][63] ([fdo#109271] / [i915#2994]) +2 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl8/igt@sysfs_clients@create.html
* igt@sysfs_clients@fair-0:
- shard-skl: NOTRUN -> [SKIP][64] ([fdo#109271] / [i915#2994])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl1/igt@sysfs_clients@fair-0.html
- shard-glk: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#2994])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk7/igt@sysfs_clients@fair-0.html
- shard-kbl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#2994])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-kbl7/igt@sysfs_clients@fair-0.html
* igt@sysfs_clients@recycle:
- shard-iclb: NOTRUN -> [SKIP][67] ([i915#2994])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@sysfs_clients@recycle.html
#### Possible fixes ####
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-apl: [DMESG-WARN][68] ([i915#180]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-apl2/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl3/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][70] ([i915#2842]) -> [PASS][71] +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-sync@rcs0:
- shard-kbl: [SKIP][72] ([fdo#109271]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-kbl3/igt@gem_exec_fair@basic-sync@rcs0.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-kbl1/igt@gem_exec_fair@basic-sync@rcs0.html
* igt@i915_pm_dc@dc5-psr:
- shard-iclb: [DMESG-WARN][74] ([i915#3698]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb7/igt@i915_pm_dc@dc5-psr.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@i915_pm_dc@dc5-psr.html
* igt@i915_pm_rpm@modeset-lpsp:
- shard-iclb: [FAIL][76] -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb8/igt@i915_pm_rpm@modeset-lpsp.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb6/igt@i915_pm_rpm@modeset-lpsp.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [FAIL][78] ([i915#2521]) -> [PASS][79]
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl1/igt@kms_async_flips@alternate-sync-async-flip.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl6/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-0:
- shard-glk: [DMESG-WARN][80] ([i915#118] / [i915#95]) -> [PASS][81] +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-glk1/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk4/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
* igt@kms_color@pipe-a-ctm-0-25:
- shard-skl: [DMESG-WARN][82] ([i915#1982]) -> [PASS][83]
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl2/igt@kms_color@pipe-a-ctm-0-25.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl3/igt@kms_color@pipe-a-ctm-0-25.html
* igt@kms_cursor_crc@pipe-a-cursor-64x21-offscreen:
- shard-skl: [FAIL][84] ([i915#3444]) -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl4/igt@kms_cursor_crc@pipe-a-cursor-64x21-offscreen.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl7/igt@kms_cursor_crc@pipe-a-cursor-64x21-offscreen.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1:
- shard-glk: [FAIL][86] ([i915#79]) -> [PASS][87]
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-glk4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-glk6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
- shard-skl: [FAIL][88] ([i915#2122]) -> [PASS][89] +1 similar issue
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- shard-skl: [FAIL][90] ([i915#49]) -> [PASS][91]
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- shard-skl: [INCOMPLETE][92] ([i915#123]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl8/igt@kms_frontbuffer_tracking@psr-suspend.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl1/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [FAIL][94] ([i915#1188]) -> [PASS][95] +1 similar issue
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl5/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][96] ([fdo#108145] / [i915#265]) -> [PASS][97] +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [SKIP][98] ([fdo#109441]) -> [PASS][99] +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
* igt@perf_pmu@rc6-suspend:
- shard-kbl: [INCOMPLETE][100] ([i915#155] / [i915#794]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-kbl3/igt@perf_pmu@rc6-suspend.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-kbl7/igt@perf_pmu@rc6-suspend.html
#### Warnings ####
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-kbl: [FAIL][102] ([i915#2842]) -> [SKIP][103] ([fdo#109271])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][104] ([i915#658]) -> [SKIP][105] ([i915#588])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb1/igt@i915_pm_dc@dc3co-vpb-simulation.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_dc@dc6-dpms:
- shard-skl: [FAIL][106] ([i915#454]) -> [INCOMPLETE][107] ([i915#198])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-skl10/igt@i915_pm_dc@dc6-dpms.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-skl6/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][108] ([i915#2684]) -> [WARN][109] ([i915#1804] / [i915#2684])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb8/igt@i915_pm_rc6_residency@rc6-fence.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb6/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][110] ([i915#1804] / [i915#2684]) -> [WARN][111] ([i915#2684])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-3:
- shard-iclb: [SKIP][112] ([i915#658]) -> [SKIP][113] ([i915#2920]) +3 similar issues
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb1/igt@kms_psr2_sf@plane-move-sf-dmg-area-3.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb2/igt@kms_psr2_sf@plane-move-sf-dmg-area-3.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4:
- shard-iclb: [SKIP][114] ([i915#2920]) -> [SKIP][115] ([i915#658]) +3 similar issues
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-4.html
* igt@runner@aborted:
- shard-iclb: ([FAIL][116], [FAIL][117], [FAIL][118]) ([i915#3002] / [i915#3702]) -> ([FAIL][119], [FAIL][120]) ([i915#3002])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb7/igt@runner@aborted.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb2/igt@runner@aborted.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-iclb6/igt@runner@aborted.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb3/igt@runner@aborted.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-iclb8/igt@runner@aborted.html
- shard-apl: ([FAIL][121], [FAIL][122], [FAIL][123]) ([i915#180] / [i915#3002] / [i915#3363]) -> ([FAIL][124], [FAIL][125], [FAIL][126]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#3363])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-apl2/igt@runner@aborted.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-apl3/igt@runner@aborted.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10297/shard-apl1/igt@runner@aborted.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl2/igt@runner@aborted.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl1/igt@runner@aborted.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/shard-apl2/igt@runner@aborted.html
[IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#123]: https://gitlab.freedesktop.org/drm/intel/issues/123
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369
[i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
[i915#2428]: https://gitlab.freedesktop.org/drm/intel/issues/2428
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2546]: https://gitlab.freedesktop.org/drm/intel/issues/2546
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3296]: https://gitlab.freedesktop.org/drm/intel/issues/3296
[i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
[i915#3444]: https://gitlab.freedesktop.org/drm/intel/issues/3444
[i915#3648]: https://gitlab.freedesktop.org/drm/intel/issues/3648
[i915#3698]: https://gitlab.freedesktop.org/drm/intel/issues/3698
[i915#3702]: https://gitlab.freedesktop.org/drm/intel/issues/3702
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#794]: https://gitlab.freedesktop.org/drm/intel/issues/794
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_10297 -> Patchwork_20505
CI-20190529: 20190529
CI_DRM_10297: 96c7ad60de68518bdcd0d0e6381a2359034a0226 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6125: 5bb62cb290fa32777934de4b39e107ccd282f7e8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20505: 182e2988c2da3bcc301241b71dd643b3ce0e6b27 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20505/index.html
[-- Attachment #1.2: Type: text/html, Size: 36700 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
2021-07-01 11:42 [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap Maarten Lankhorst
` (3 preceding siblings ...)
2021-07-01 13:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2021-07-09 14:14 ` Jason Ekstrand
4 siblings, 0 replies; 13+ messages in thread
From: Jason Ekstrand @ 2021-07-09 14:14 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: Intel GFX
On Thu, Jul 1, 2021 at 6:42 AM Maarten Lankhorst
<maarten.lankhorst@linux.intel.com> wrote:
>
> This is only used for ttm, and tells userspace that the mapping type is
> ignored. This disables the other type of mmap offsets when discrete
> memory is used, so fix the selftests as well.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 +++++++++++-
> .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
> .../drm/i915/gem/selftests/i915_gem_mman.c | 27 +++++++++++++++++--
> include/uapi/drm/i915_drm.h | 9 ++++---
> 4 files changed, 47 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index a90f796e85c0..b34be9e5d094 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
> return -ENODEV;
>
> if (obj->ops->mmap_offset) {
> + if (mmap_type != I915_MMAP_TYPE_TTM)
> + return -ENODEV;
> +
> *offset = obj->ops->mmap_offset(obj);
> return 0;
> }
>
> + if (mmap_type == I915_MMAP_TYPE_TTM)
> + return -ENODEV;
> +
> if (mmap_type != I915_MMAP_TYPE_GTT &&
> !i915_gem_object_has_struct_page(obj) &&
> !i915_gem_object_has_iomem(obj))
> @@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
> {
> enum i915_mmap_type mmap_type;
>
> - if (boot_cpu_has(X86_FEATURE_PAT))
> + if (HAS_LMEM(to_i915(dev)))
> + mmap_type = I915_MMAP_TYPE_TTM;
> + else if (boot_cpu_has(X86_FEATURE_PAT))
> mmap_type = I915_MMAP_TYPE_WC;
> else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
> return -ENODEV;
> @@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
> type = I915_MMAP_TYPE_UC;
> break;
>
> + case I915_MMAP_OFFSET_TTM:
> + type = I915_MMAP_TYPE_TTM;
> + break;
> +
> default:
> return -EINVAL;
> }
> @@ -968,6 +980,9 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
> vma->vm_ops = &vm_ops_cpu;
> break;
>
> + case I915_MMAP_TYPE_TTM:
> + GEM_WARN_ON(mmo->mmap_type == I915_MMAP_TYPE_TTM);
> + /* fall-through */
> case I915_MMAP_TYPE_WB:
> vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
> vma->vm_ops = &vm_ops_cpu;
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index 441f913c87e6..8b872b22a7ec 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -96,6 +96,7 @@ enum i915_mmap_type {
> I915_MMAP_TYPE_WC,
> I915_MMAP_TYPE_WB,
> I915_MMAP_TYPE_UC,
> + I915_MMAP_TYPE_TTM,
> };
>
> struct i915_mmap_offset {
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> index 607b7d2d4c29..321271bd2fa1 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> @@ -573,6 +573,14 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
> return 0;
> }
>
> +static enum i915_mmap_type default_mapping(struct drm_i915_private *i915)
> +{
> + if (HAS_LMEM(i915))
> + return I915_MMAP_TYPE_TTM;
> +
> + return I915_MMAP_TYPE_GTT;
> +}
> +
> static bool assert_mmap_offset(struct drm_i915_private *i915,
> unsigned long size,
> int expected)
> @@ -585,7 +593,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915,
> if (IS_ERR(obj))
> return expected && expected == PTR_ERR(obj);
>
> - ret = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> + ret = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> i915_gem_object_put(obj);
>
> return ret == expected;
> @@ -689,7 +697,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
> goto out;
> }
>
> - err = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> + err = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> if (err) {
> pr_err("Unable to insert object into reclaimed hole\n");
> goto err_obj;
> @@ -831,8 +839,14 @@ static int wc_check(struct drm_i915_gem_object *obj)
>
> static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
> {
> + struct drm_i915_private *i915 = to_i915(obj->base.dev);
> bool no_map;
>
> + if (HAS_LMEM(i915))
> + return type == I915_MMAP_TYPE_TTM;
> + else if (type == I915_MMAP_TYPE_TTM)
> + return false;
> +
> if (type == I915_MMAP_TYPE_GTT &&
> !i915_ggtt_has_aperture(&to_i915(obj->base.dev)->ggtt))
> return false;
> @@ -970,6 +984,8 @@ static int igt_mmap(void *arg)
> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_GTT);
> if (err == 0)
> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_WC);
> + if (err == 0)
> + err = __igt_mmap(i915, obj, I915_MMAP_TYPE_TTM);
>
> i915_gem_object_put(obj);
> if (err)
> @@ -987,6 +1003,7 @@ static const char *repr_mmap_type(enum i915_mmap_type type)
> case I915_MMAP_TYPE_WB: return "wb";
> case I915_MMAP_TYPE_WC: return "wc";
> case I915_MMAP_TYPE_UC: return "uc";
> + case I915_MMAP_TYPE_TTM: return "ttm";
> default: return "unknown";
> }
> }
> @@ -1100,6 +1117,8 @@ static int igt_mmap_access(void *arg)
> err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_WC);
> if (err == 0)
> err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_UC);
> + if (err == 0)
> + err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_TTM);
>
> i915_gem_object_put(obj);
> if (err)
> @@ -1241,6 +1260,8 @@ static int igt_mmap_gpu(void *arg)
> err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_GTT);
> if (err == 0)
> err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_WC);
> + if (err == 0)
> + err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_TTM);
>
> i915_gem_object_put(obj);
> if (err)
> @@ -1396,6 +1417,8 @@ static int igt_mmap_revoke(void *arg)
> err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_GTT);
> if (err == 0)
> err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_WC);
> + if (err == 0)
> + err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_TTM);
>
> i915_gem_object_put(obj);
> if (err)
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 2f70c48567c0..12ec9c7f1711 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -867,10 +867,11 @@ struct drm_i915_gem_mmap_offset {
> * (GTT, WC, WB, UC, etc) should be included.
> */
> __u64 flags;
> -#define I915_MMAP_OFFSET_GTT 0
> -#define I915_MMAP_OFFSET_WC 1
> -#define I915_MMAP_OFFSET_WB 2
> -#define I915_MMAP_OFFSET_UC 3
> +#define I915_MMAP_OFFSET_GTT 0
> +#define I915_MMAP_OFFSET_WC 1
> +#define I915_MMAP_OFFSET_WB 2
> +#define I915_MMAP_OFFSET_UC 3
> +#define I915_MMAP_OFFSET_TTM 4
I'm not sure I like the name here. TTM is an implementation detail,
not a kind of map. I think we want something more like
I915_MMAP_OFFSET_IMPLICIT or something like that. The semantics here,
as far as I can tell, are "the mmap type is based on the object; you
can't change it." On DG1, the mmap type is fixed for all objects. On
integrated, we could have a BO create option for the mmap type but we
don't yet.
--Jason
>
> /*
> * Zero-terminated chain of extensions.
> --
> 2.31.0
>
> _______________________________________________
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^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
@ 2021-07-14 10:03 Maarten Lankhorst
2021-07-14 16:17 ` Jason Ekstrand
0 siblings, 1 reply; 13+ messages in thread
From: Maarten Lankhorst @ 2021-07-14 10:03 UTC (permalink / raw)
To: intel-gfx; +Cc: Daniel Vetter
The FIXED mapping is only used for ttm, and tells userspace that the
mapping type is pre-defined. This disables the other type of mmap
offsets when discrete memory is used, so fix the selftests as well.
Document the struct as well, so it shows up in docbook.
Cc: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 ++++++-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
.../drm/i915/gem/selftests/i915_gem_mman.c | 27 ++++++++++-
include/uapi/drm/i915_drm.h | 46 ++++++++++++++-----
4 files changed, 77 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index a90f796e85c0..31c4021bb6be 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
return -ENODEV;
if (obj->ops->mmap_offset) {
+ if (mmap_type != I915_MMAP_TYPE_FIXED)
+ return -ENODEV;
+
*offset = obj->ops->mmap_offset(obj);
return 0;
}
+ if (mmap_type == I915_MMAP_TYPE_FIXED)
+ return -ENODEV;
+
if (mmap_type != I915_MMAP_TYPE_GTT &&
!i915_gem_object_has_struct_page(obj) &&
!i915_gem_object_has_iomem(obj))
@@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
{
enum i915_mmap_type mmap_type;
- if (boot_cpu_has(X86_FEATURE_PAT))
+ if (HAS_LMEM(to_i915(dev)))
+ mmap_type = I915_MMAP_TYPE_FIXED;
+ else if (boot_cpu_has(X86_FEATURE_PAT))
mmap_type = I915_MMAP_TYPE_WC;
else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
return -ENODEV;
@@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
type = I915_MMAP_TYPE_UC;
break;
+ case I915_MMAP_OFFSET_FIXED:
+ type = I915_MMAP_TYPE_FIXED;
+ break;
+
default:
return -EINVAL;
}
@@ -968,6 +980,9 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
vma->vm_ops = &vm_ops_cpu;
break;
+ case I915_MMAP_TYPE_FIXED:
+ GEM_WARN_ON(1);
+ /* fall-through */
case I915_MMAP_TYPE_WB:
vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
vma->vm_ops = &vm_ops_cpu;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index ef3de2ae9723..afbadfc5516b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -105,6 +105,7 @@ enum i915_mmap_type {
I915_MMAP_TYPE_WC,
I915_MMAP_TYPE_WB,
I915_MMAP_TYPE_UC,
+ I915_MMAP_TYPE_FIXED,
};
struct i915_mmap_offset {
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index 1da8bd675e54..52789c8ad337 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -573,6 +573,14 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
return 0;
}
+static enum i915_mmap_type default_mapping(struct drm_i915_private *i915)
+{
+ if (HAS_LMEM(i915))
+ return I915_MMAP_TYPE_FIXED;
+
+ return I915_MMAP_TYPE_GTT;
+}
+
static bool assert_mmap_offset(struct drm_i915_private *i915,
unsigned long size,
int expected)
@@ -585,7 +593,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915,
if (IS_ERR(obj))
return expected && expected == PTR_ERR(obj);
- ret = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
+ ret = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
i915_gem_object_put(obj);
return ret == expected;
@@ -689,7 +697,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
goto out;
}
- err = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
+ err = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
if (err) {
pr_err("Unable to insert object into reclaimed hole\n");
goto err_obj;
@@ -831,8 +839,14 @@ static int wc_check(struct drm_i915_gem_object *obj)
static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
{
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
bool no_map;
+ if (HAS_LMEM(i915))
+ return type == I915_MMAP_TYPE_FIXED;
+ else if (type == I915_MMAP_TYPE_FIXED)
+ return false;
+
if (type == I915_MMAP_TYPE_GTT &&
!i915_ggtt_has_aperture(&to_i915(obj->base.dev)->ggtt))
return false;
@@ -970,6 +984,8 @@ static int igt_mmap(void *arg)
err = __igt_mmap(i915, obj, I915_MMAP_TYPE_GTT);
if (err == 0)
err = __igt_mmap(i915, obj, I915_MMAP_TYPE_WC);
+ if (err == 0)
+ err = __igt_mmap(i915, obj, I915_MMAP_TYPE_FIXED);
i915_gem_object_put(obj);
if (err)
@@ -987,6 +1003,7 @@ static const char *repr_mmap_type(enum i915_mmap_type type)
case I915_MMAP_TYPE_WB: return "wb";
case I915_MMAP_TYPE_WC: return "wc";
case I915_MMAP_TYPE_UC: return "uc";
+ case I915_MMAP_TYPE_FIXED: return "ttm";
default: return "unknown";
}
}
@@ -1100,6 +1117,8 @@ static int igt_mmap_access(void *arg)
err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_WC);
if (err == 0)
err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_UC);
+ if (err == 0)
+ err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_FIXED);
i915_gem_object_put(obj);
if (err)
@@ -1241,6 +1260,8 @@ static int igt_mmap_gpu(void *arg)
err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_GTT);
if (err == 0)
err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_WC);
+ if (err == 0)
+ err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_FIXED);
i915_gem_object_put(obj);
if (err)
@@ -1396,6 +1417,8 @@ static int igt_mmap_revoke(void *arg)
err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_GTT);
if (err == 0)
err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_WC);
+ if (err == 0)
+ err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_FIXED);
i915_gem_object_put(obj);
if (err)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index e334a8b14ef2..223f60d7694a 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -849,31 +849,55 @@ struct drm_i915_gem_mmap_gtt {
__u64 offset;
};
+/**
+ * struct drm_i915_gem_mmap_offset - Retrieve an offset so we can mmap this buffer object.
+ *
+ * This struct is passed as argument to the `DRM_IOCTL_I915_GEM_MMAP_OFFSET` ioctl,
+ * and is used to retrieve the fake offset to mmap an object specified by &handle.
+ *
+ * The legacy way of using `DRM_IOCTL_I915_GEM_MMAP` is removed on gen12+.
+ * `DRM_IOCTL_I915_GEM_MMAP_GTT` is an older supported alias to this struct, but will behave
+ * as setting the &extensions to 0, and &flags to `I915_MMAP_OFFSET_GTT`.
+ */
struct drm_i915_gem_mmap_offset {
- /** Handle for the object being mapped. */
+ /** @handle: Handle for the object being mapped. */
__u32 handle;
+ /** @pad: Must be zero */
__u32 pad;
/**
- * Fake offset to use for subsequent mmap call
+ * @offset: The fake offset to use for subsequent mmap call
*
* This is a fixed-size type for 32/64 compatibility.
*/
__u64 offset;
/**
- * Flags for extended behaviour.
+ * @flags: Flags for extended behaviour.
+ *
+ * It is mandatory that one of the `MMAP_OFFSET` types
+ * should be included:
+ * - `I915_MMAP_OFFSET_GTT`: Use mmap with the object bound to GTT. (Write-Combined)
+ * - `I915_MMAP_OFFSET_WC`: Use Write-Combined caching.
+ * - `I915_MMAP_OFFSET_WB`: Use Write-Back caching.
+ * - `I915_MMAP_OFFSET_FIXED`: Use object placement to determine caching.
+ *
+ * On devices with local memory `I915_MMAP_OFFSET_FIXED` is the only valid
+ * type. Ondevices without local memory, this caching mode is invalid.
*
- * It is mandatory that one of the MMAP_OFFSET types
- * (GTT, WC, WB, UC, etc) should be included.
+ * As caching mode when specifying `I915_MMAP_OFFSET_FIXED`, WC or WB will
+ * be used, depending on the object placement on creation. WB will be used
+ * when the object can only exist in system memory, WC otherwise.
*/
__u64 flags;
-#define I915_MMAP_OFFSET_GTT 0
-#define I915_MMAP_OFFSET_WC 1
-#define I915_MMAP_OFFSET_WB 2
-#define I915_MMAP_OFFSET_UC 3
- /*
- * Zero-terminated chain of extensions.
+#define I915_MMAP_OFFSET_GTT 0
+#define I915_MMAP_OFFSET_WC 1
+#define I915_MMAP_OFFSET_WB 2
+#define I915_MMAP_OFFSET_UC 3
+#define I915_MMAP_OFFSET_FIXED 4
+
+ /**
+ * @extensions: Zero-terminated chain of extensions.
*
* No current extensions defined; mbz.
*/
--
2.31.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
2021-07-14 10:03 Maarten Lankhorst
@ 2021-07-14 16:17 ` Jason Ekstrand
2021-07-14 17:05 ` Maarten Lankhorst
0 siblings, 1 reply; 13+ messages in thread
From: Jason Ekstrand @ 2021-07-14 16:17 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: Daniel Vetter, Intel GFX
On Wed, Jul 14, 2021 at 5:03 AM Maarten Lankhorst
<maarten.lankhorst@linux.intel.com> wrote:
>
> The FIXED mapping is only used for ttm, and tells userspace that the
> mapping type is pre-defined. This disables the other type of mmap
> offsets when discrete memory is used, so fix the selftests as well.
>
> Document the struct as well, so it shows up in docbook.
>
> Cc: Jason Ekstrand <jason@jlekstrand.net>
> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 ++++++-
> .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
> .../drm/i915/gem/selftests/i915_gem_mman.c | 27 ++++++++++-
> include/uapi/drm/i915_drm.h | 46 ++++++++++++++-----
> 4 files changed, 77 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index a90f796e85c0..31c4021bb6be 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
> return -ENODEV;
>
> if (obj->ops->mmap_offset) {
> + if (mmap_type != I915_MMAP_TYPE_FIXED)
> + return -ENODEV;
> +
> *offset = obj->ops->mmap_offset(obj);
> return 0;
> }
>
> + if (mmap_type == I915_MMAP_TYPE_FIXED)
> + return -ENODEV;
> +
> if (mmap_type != I915_MMAP_TYPE_GTT &&
> !i915_gem_object_has_struct_page(obj) &&
> !i915_gem_object_has_iomem(obj))
> @@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
> {
> enum i915_mmap_type mmap_type;
>
> - if (boot_cpu_has(X86_FEATURE_PAT))
> + if (HAS_LMEM(to_i915(dev)))
> + mmap_type = I915_MMAP_TYPE_FIXED;
> + else if (boot_cpu_has(X86_FEATURE_PAT))
> mmap_type = I915_MMAP_TYPE_WC;
> else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
> return -ENODEV;
> @@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
> type = I915_MMAP_TYPE_UC;
> break;
>
> + case I915_MMAP_OFFSET_FIXED:
> + type = I915_MMAP_TYPE_FIXED;
> + break;
> +
> default:
> return -EINVAL;
> }
> @@ -968,6 +980,9 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
> vma->vm_ops = &vm_ops_cpu;
> break;
>
> + case I915_MMAP_TYPE_FIXED:
> + GEM_WARN_ON(1);
> + /* fall-through */
> case I915_MMAP_TYPE_WB:
> vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
> vma->vm_ops = &vm_ops_cpu;
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index ef3de2ae9723..afbadfc5516b 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -105,6 +105,7 @@ enum i915_mmap_type {
> I915_MMAP_TYPE_WC,
> I915_MMAP_TYPE_WB,
> I915_MMAP_TYPE_UC,
> + I915_MMAP_TYPE_FIXED,
> };
>
> struct i915_mmap_offset {
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> index 1da8bd675e54..52789c8ad337 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> @@ -573,6 +573,14 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
> return 0;
> }
>
> +static enum i915_mmap_type default_mapping(struct drm_i915_private *i915)
> +{
> + if (HAS_LMEM(i915))
> + return I915_MMAP_TYPE_FIXED;
> +
> + return I915_MMAP_TYPE_GTT;
> +}
> +
> static bool assert_mmap_offset(struct drm_i915_private *i915,
> unsigned long size,
> int expected)
> @@ -585,7 +593,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915,
> if (IS_ERR(obj))
> return expected && expected == PTR_ERR(obj);
>
> - ret = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> + ret = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> i915_gem_object_put(obj);
>
> return ret == expected;
> @@ -689,7 +697,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
> goto out;
> }
>
> - err = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> + err = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> if (err) {
> pr_err("Unable to insert object into reclaimed hole\n");
> goto err_obj;
> @@ -831,8 +839,14 @@ static int wc_check(struct drm_i915_gem_object *obj)
>
> static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
> {
> + struct drm_i915_private *i915 = to_i915(obj->base.dev);
> bool no_map;
>
> + if (HAS_LMEM(i915))
> + return type == I915_MMAP_TYPE_FIXED;
> + else if (type == I915_MMAP_TYPE_FIXED)
> + return false;
> +
> if (type == I915_MMAP_TYPE_GTT &&
> !i915_ggtt_has_aperture(&to_i915(obj->base.dev)->ggtt))
> return false;
> @@ -970,6 +984,8 @@ static int igt_mmap(void *arg)
> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_GTT);
> if (err == 0)
> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_WC);
> + if (err == 0)
> + err = __igt_mmap(i915, obj, I915_MMAP_TYPE_FIXED);
>
> i915_gem_object_put(obj);
> if (err)
> @@ -987,6 +1003,7 @@ static const char *repr_mmap_type(enum i915_mmap_type type)
> case I915_MMAP_TYPE_WB: return "wb";
> case I915_MMAP_TYPE_WC: return "wc";
> case I915_MMAP_TYPE_UC: return "uc";
> + case I915_MMAP_TYPE_FIXED: return "ttm";
fixed?
Otherwise, I trolled through the patch and everything looks good. I
don't know the code well enough to know if you missed anything but
what you have seems sane.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
I suppose you'll be wanting a couple mesa patches to go with this? I
can try and knock something out today.
--Jason
> default: return "unknown";
> }
> }
> @@ -1100,6 +1117,8 @@ static int igt_mmap_access(void *arg)
> err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_WC);
> if (err == 0)
> err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_UC);
> + if (err == 0)
> + err = __igt_mmap_access(i915, obj, I915_MMAP_TYPE_FIXED);
>
> i915_gem_object_put(obj);
> if (err)
> @@ -1241,6 +1260,8 @@ static int igt_mmap_gpu(void *arg)
> err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_GTT);
> if (err == 0)
> err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_WC);
> + if (err == 0)
> + err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_FIXED);
>
> i915_gem_object_put(obj);
> if (err)
> @@ -1396,6 +1417,8 @@ static int igt_mmap_revoke(void *arg)
> err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_GTT);
> if (err == 0)
> err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_WC);
> + if (err == 0)
> + err = __igt_mmap_revoke(i915, obj, I915_MMAP_TYPE_FIXED);
>
> i915_gem_object_put(obj);
> if (err)
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index e334a8b14ef2..223f60d7694a 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -849,31 +849,55 @@ struct drm_i915_gem_mmap_gtt {
> __u64 offset;
> };
>
> +/**
> + * struct drm_i915_gem_mmap_offset - Retrieve an offset so we can mmap this buffer object.
> + *
> + * This struct is passed as argument to the `DRM_IOCTL_I915_GEM_MMAP_OFFSET` ioctl,
> + * and is used to retrieve the fake offset to mmap an object specified by &handle.
> + *
> + * The legacy way of using `DRM_IOCTL_I915_GEM_MMAP` is removed on gen12+.
> + * `DRM_IOCTL_I915_GEM_MMAP_GTT` is an older supported alias to this struct, but will behave
> + * as setting the &extensions to 0, and &flags to `I915_MMAP_OFFSET_GTT`.
> + */
> struct drm_i915_gem_mmap_offset {
> - /** Handle for the object being mapped. */
> + /** @handle: Handle for the object being mapped. */
> __u32 handle;
> + /** @pad: Must be zero */
> __u32 pad;
> /**
> - * Fake offset to use for subsequent mmap call
> + * @offset: The fake offset to use for subsequent mmap call
> *
> * This is a fixed-size type for 32/64 compatibility.
> */
> __u64 offset;
>
> /**
> - * Flags for extended behaviour.
> + * @flags: Flags for extended behaviour.
> + *
> + * It is mandatory that one of the `MMAP_OFFSET` types
> + * should be included:
> + * - `I915_MMAP_OFFSET_GTT`: Use mmap with the object bound to GTT. (Write-Combined)
> + * - `I915_MMAP_OFFSET_WC`: Use Write-Combined caching.
> + * - `I915_MMAP_OFFSET_WB`: Use Write-Back caching.
> + * - `I915_MMAP_OFFSET_FIXED`: Use object placement to determine caching.
> + *
> + * On devices with local memory `I915_MMAP_OFFSET_FIXED` is the only valid
> + * type. Ondevices without local memory, this caching mode is invalid.
> *
> - * It is mandatory that one of the MMAP_OFFSET types
> - * (GTT, WC, WB, UC, etc) should be included.
> + * As caching mode when specifying `I915_MMAP_OFFSET_FIXED`, WC or WB will
> + * be used, depending on the object placement on creation. WB will be used
> + * when the object can only exist in system memory, WC otherwise.
> */
> __u64 flags;
> -#define I915_MMAP_OFFSET_GTT 0
> -#define I915_MMAP_OFFSET_WC 1
> -#define I915_MMAP_OFFSET_WB 2
> -#define I915_MMAP_OFFSET_UC 3
>
> - /*
> - * Zero-terminated chain of extensions.
> +#define I915_MMAP_OFFSET_GTT 0
> +#define I915_MMAP_OFFSET_WC 1
> +#define I915_MMAP_OFFSET_WB 2
> +#define I915_MMAP_OFFSET_UC 3
> +#define I915_MMAP_OFFSET_FIXED 4
> +
> + /**
> + * @extensions: Zero-terminated chain of extensions.
> *
> * No current extensions defined; mbz.
> */
> --
> 2.31.0
>
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^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
2021-07-14 16:17 ` Jason Ekstrand
@ 2021-07-14 17:05 ` Maarten Lankhorst
2021-07-14 18:35 ` Jason Ekstrand
0 siblings, 1 reply; 13+ messages in thread
From: Maarten Lankhorst @ 2021-07-14 17:05 UTC (permalink / raw)
To: Jason Ekstrand; +Cc: Daniel Vetter, Intel GFX
Op 14-07-2021 om 18:17 schreef Jason Ekstrand:
> On Wed, Jul 14, 2021 at 5:03 AM Maarten Lankhorst
> <maarten.lankhorst@linux.intel.com> wrote:
>> The FIXED mapping is only used for ttm, and tells userspace that the
>> mapping type is pre-defined. This disables the other type of mmap
>> offsets when discrete memory is used, so fix the selftests as well.
>>
>> Document the struct as well, so it shows up in docbook.
>>
>> Cc: Jason Ekstrand <jason@jlekstrand.net>
>> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 ++++++-
>> .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
>> .../drm/i915/gem/selftests/i915_gem_mman.c | 27 ++++++++++-
>> include/uapi/drm/i915_drm.h | 46 ++++++++++++++-----
>> 4 files changed, 77 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>> index a90f796e85c0..31c4021bb6be 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
>> @@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
>> return -ENODEV;
>>
>> if (obj->ops->mmap_offset) {
>> + if (mmap_type != I915_MMAP_TYPE_FIXED)
>> + return -ENODEV;
>> +
>> *offset = obj->ops->mmap_offset(obj);
>> return 0;
>> }
>>
>> + if (mmap_type == I915_MMAP_TYPE_FIXED)
>> + return -ENODEV;
>> +
>> if (mmap_type != I915_MMAP_TYPE_GTT &&
>> !i915_gem_object_has_struct_page(obj) &&
>> !i915_gem_object_has_iomem(obj))
>> @@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
>> {
>> enum i915_mmap_type mmap_type;
>>
>> - if (boot_cpu_has(X86_FEATURE_PAT))
>> + if (HAS_LMEM(to_i915(dev)))
>> + mmap_type = I915_MMAP_TYPE_FIXED;
>> + else if (boot_cpu_has(X86_FEATURE_PAT))
>> mmap_type = I915_MMAP_TYPE_WC;
>> else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
>> return -ENODEV;
>> @@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
>> type = I915_MMAP_TYPE_UC;
>> break;
>>
>> + case I915_MMAP_OFFSET_FIXED:
>> + type = I915_MMAP_TYPE_FIXED;
>> + break;
>> +
>> default:
>> return -EINVAL;
>> }
>> @@ -968,6 +980,9 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
>> vma->vm_ops = &vm_ops_cpu;
>> break;
>>
>> + case I915_MMAP_TYPE_FIXED:
>> + GEM_WARN_ON(1);
>> + /* fall-through */
>> case I915_MMAP_TYPE_WB:
>> vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
>> vma->vm_ops = &vm_ops_cpu;
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>> index ef3de2ae9723..afbadfc5516b 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
>> @@ -105,6 +105,7 @@ enum i915_mmap_type {
>> I915_MMAP_TYPE_WC,
>> I915_MMAP_TYPE_WB,
>> I915_MMAP_TYPE_UC,
>> + I915_MMAP_TYPE_FIXED,
>> };
>>
>> struct i915_mmap_offset {
>> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
>> index 1da8bd675e54..52789c8ad337 100644
>> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
>> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
>> @@ -573,6 +573,14 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
>> return 0;
>> }
>>
>> +static enum i915_mmap_type default_mapping(struct drm_i915_private *i915)
>> +{
>> + if (HAS_LMEM(i915))
>> + return I915_MMAP_TYPE_FIXED;
>> +
>> + return I915_MMAP_TYPE_GTT;
>> +}
>> +
>> static bool assert_mmap_offset(struct drm_i915_private *i915,
>> unsigned long size,
>> int expected)
>> @@ -585,7 +593,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915,
>> if (IS_ERR(obj))
>> return expected && expected == PTR_ERR(obj);
>>
>> - ret = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
>> + ret = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
>> i915_gem_object_put(obj);
>>
>> return ret == expected;
>> @@ -689,7 +697,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
>> goto out;
>> }
>>
>> - err = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
>> + err = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
>> if (err) {
>> pr_err("Unable to insert object into reclaimed hole\n");
>> goto err_obj;
>> @@ -831,8 +839,14 @@ static int wc_check(struct drm_i915_gem_object *obj)
>>
>> static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
>> {
>> + struct drm_i915_private *i915 = to_i915(obj->base.dev);
>> bool no_map;
>>
>> + if (HAS_LMEM(i915))
>> + return type == I915_MMAP_TYPE_FIXED;
>> + else if (type == I915_MMAP_TYPE_FIXED)
>> + return false;
>> +
>> if (type == I915_MMAP_TYPE_GTT &&
>> !i915_ggtt_has_aperture(&to_i915(obj->base.dev)->ggtt))
>> return false;
>> @@ -970,6 +984,8 @@ static int igt_mmap(void *arg)
>> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_GTT);
>> if (err == 0)
>> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_WC);
>> + if (err == 0)
>> + err = __igt_mmap(i915, obj, I915_MMAP_TYPE_FIXED);
>>
>> i915_gem_object_put(obj);
>> if (err)
>> @@ -987,6 +1003,7 @@ static const char *repr_mmap_type(enum i915_mmap_type type)
>> case I915_MMAP_TYPE_WB: return "wb";
>> case I915_MMAP_TYPE_WC: return "wc";
>> case I915_MMAP_TYPE_UC: return "uc";
>> + case I915_MMAP_TYPE_FIXED: return "ttm";
> fixed?
>
> Otherwise, I trolled through the patch and everything looks good. I
> don't know the code well enough to know if you missed anything but
> what you have seems sane.
>
> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
>
> I suppose you'll be wanting a couple mesa patches to go with this? I
> can try and knock something out today.
Yes please! IGT probably needs fixing too. I can probably take a look at that.
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^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap.
2021-07-14 17:05 ` Maarten Lankhorst
@ 2021-07-14 18:35 ` Jason Ekstrand
0 siblings, 0 replies; 13+ messages in thread
From: Jason Ekstrand @ 2021-07-14 18:35 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: Daniel Vetter, Intel GFX
On Wed, Jul 14, 2021 at 12:05 PM Maarten Lankhorst
<maarten.lankhorst@linux.intel.com> wrote:
>
> Op 14-07-2021 om 18:17 schreef Jason Ekstrand:
> > On Wed, Jul 14, 2021 at 5:03 AM Maarten Lankhorst
> > <maarten.lankhorst@linux.intel.com> wrote:
> >> The FIXED mapping is only used for ttm, and tells userspace that the
> >> mapping type is pre-defined. This disables the other type of mmap
> >> offsets when discrete memory is used, so fix the selftests as well.
> >>
> >> Document the struct as well, so it shows up in docbook.
> >>
> >> Cc: Jason Ekstrand <jason@jlekstrand.net>
> >> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> >> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >> ---
> >> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 17 ++++++-
> >> .../gpu/drm/i915/gem/i915_gem_object_types.h | 1 +
> >> .../drm/i915/gem/selftests/i915_gem_mman.c | 27 ++++++++++-
> >> include/uapi/drm/i915_drm.h | 46 ++++++++++++++-----
> >> 4 files changed, 77 insertions(+), 14 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> >> index a90f796e85c0..31c4021bb6be 100644
> >> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> >> @@ -679,10 +679,16 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
> >> return -ENODEV;
> >>
> >> if (obj->ops->mmap_offset) {
> >> + if (mmap_type != I915_MMAP_TYPE_FIXED)
> >> + return -ENODEV;
> >> +
> >> *offset = obj->ops->mmap_offset(obj);
> >> return 0;
> >> }
> >>
> >> + if (mmap_type == I915_MMAP_TYPE_FIXED)
> >> + return -ENODEV;
> >> +
> >> if (mmap_type != I915_MMAP_TYPE_GTT &&
> >> !i915_gem_object_has_struct_page(obj) &&
> >> !i915_gem_object_has_iomem(obj))
> >> @@ -727,7 +733,9 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
> >> {
> >> enum i915_mmap_type mmap_type;
> >>
> >> - if (boot_cpu_has(X86_FEATURE_PAT))
> >> + if (HAS_LMEM(to_i915(dev)))
> >> + mmap_type = I915_MMAP_TYPE_FIXED;
> >> + else if (boot_cpu_has(X86_FEATURE_PAT))
> >> mmap_type = I915_MMAP_TYPE_WC;
> >> else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
> >> return -ENODEV;
> >> @@ -798,6 +806,10 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
> >> type = I915_MMAP_TYPE_UC;
> >> break;
> >>
> >> + case I915_MMAP_OFFSET_FIXED:
> >> + type = I915_MMAP_TYPE_FIXED;
> >> + break;
> >> +
> >> default:
> >> return -EINVAL;
> >> }
> >> @@ -968,6 +980,9 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
> >> vma->vm_ops = &vm_ops_cpu;
> >> break;
> >>
> >> + case I915_MMAP_TYPE_FIXED:
> >> + GEM_WARN_ON(1);
> >> + /* fall-through */
> >> case I915_MMAP_TYPE_WB:
> >> vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
> >> vma->vm_ops = &vm_ops_cpu;
> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> >> index ef3de2ae9723..afbadfc5516b 100644
> >> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> >> @@ -105,6 +105,7 @@ enum i915_mmap_type {
> >> I915_MMAP_TYPE_WC,
> >> I915_MMAP_TYPE_WB,
> >> I915_MMAP_TYPE_UC,
> >> + I915_MMAP_TYPE_FIXED,
> >> };
> >>
> >> struct i915_mmap_offset {
> >> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> >> index 1da8bd675e54..52789c8ad337 100644
> >> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> >> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
> >> @@ -573,6 +573,14 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
> >> return 0;
> >> }
> >>
> >> +static enum i915_mmap_type default_mapping(struct drm_i915_private *i915)
> >> +{
> >> + if (HAS_LMEM(i915))
> >> + return I915_MMAP_TYPE_FIXED;
> >> +
> >> + return I915_MMAP_TYPE_GTT;
> >> +}
> >> +
> >> static bool assert_mmap_offset(struct drm_i915_private *i915,
> >> unsigned long size,
> >> int expected)
> >> @@ -585,7 +593,7 @@ static bool assert_mmap_offset(struct drm_i915_private *i915,
> >> if (IS_ERR(obj))
> >> return expected && expected == PTR_ERR(obj);
> >>
> >> - ret = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> >> + ret = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> >> i915_gem_object_put(obj);
> >>
> >> return ret == expected;
> >> @@ -689,7 +697,7 @@ static int igt_mmap_offset_exhaustion(void *arg)
> >> goto out;
> >> }
> >>
> >> - err = __assign_mmap_offset(obj, I915_MMAP_TYPE_GTT, &offset, NULL);
> >> + err = __assign_mmap_offset(obj, default_mapping(i915), &offset, NULL);
> >> if (err) {
> >> pr_err("Unable to insert object into reclaimed hole\n");
> >> goto err_obj;
> >> @@ -831,8 +839,14 @@ static int wc_check(struct drm_i915_gem_object *obj)
> >>
> >> static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
> >> {
> >> + struct drm_i915_private *i915 = to_i915(obj->base.dev);
> >> bool no_map;
> >>
> >> + if (HAS_LMEM(i915))
> >> + return type == I915_MMAP_TYPE_FIXED;
> >> + else if (type == I915_MMAP_TYPE_FIXED)
> >> + return false;
> >> +
> >> if (type == I915_MMAP_TYPE_GTT &&
> >> !i915_ggtt_has_aperture(&to_i915(obj->base.dev)->ggtt))
> >> return false;
> >> @@ -970,6 +984,8 @@ static int igt_mmap(void *arg)
> >> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_GTT);
> >> if (err == 0)
> >> err = __igt_mmap(i915, obj, I915_MMAP_TYPE_WC);
> >> + if (err == 0)
> >> + err = __igt_mmap(i915, obj, I915_MMAP_TYPE_FIXED);
> >>
> >> i915_gem_object_put(obj);
> >> if (err)
> >> @@ -987,6 +1003,7 @@ static const char *repr_mmap_type(enum i915_mmap_type type)
> >> case I915_MMAP_TYPE_WB: return "wb";
> >> case I915_MMAP_TYPE_WC: return "wc";
> >> case I915_MMAP_TYPE_UC: return "uc";
> >> + case I915_MMAP_TYPE_FIXED: return "ttm";
> > fixed?
> >
> > Otherwise, I trolled through the patch and everything looks good. I
> > don't know the code well enough to know if you missed anything but
> > what you have seems sane.
> >
> > Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
> >
> > I suppose you'll be wanting a couple mesa patches to go with this? I
> > can try and knock something out today.
>
> Yes please! IGT probably needs fixing too. I can probably take a look at that.
As promised: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11888
As usual, we should make sure those are reviewed and we're happy with
them before we land the uAPI but it was easy enough to wire up.
--Jason
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^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2021-07-14 18:36 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-07-01 11:42 [Intel-gfx] [PATCH] drm/i915: Add TTM offset argument to mmap Maarten Lankhorst
2021-07-01 11:50 ` Maarten Lankhorst
2021-07-05 14:36 ` Matthew Auld
2021-07-09 9:30 ` Matthew Auld
2021-07-09 12:47 ` Maarten Lankhorst
2021-07-01 11:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-07-01 12:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-01 13:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-09 14:14 ` [Intel-gfx] [PATCH] " Jason Ekstrand
2021-07-14 10:03 Maarten Lankhorst
2021-07-14 16:17 ` Jason Ekstrand
2021-07-14 17:05 ` Maarten Lankhorst
2021-07-14 18:35 ` Jason Ekstrand
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