From: "Kulkarni, Vandita" <vandita.kulkarni@intel.com>
To: "Lee, Shawn C" <shawn.c.lee@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "Nikula, Jani" <jani.nikula@intel.com>,
"ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
"Chiou, Cooper" <cooper.chiou@intel.com>,
"Tseng, William" <william.tseng@intel.com>,
Jani Nikula <jani.nikula@linux.intel.com>
Subject: Re: [Intel-gfx] [v4 3/7] drm/i915/dsi: wait for header and payload credit available
Date: Thu, 26 Aug 2021 05:54:45 +0000 [thread overview]
Message-ID: <73675ce3e86b42c9ba70bd95354d17e3@intel.com> (raw)
In-Reply-To: <20210812154237.13911-4-shawn.c.lee@intel.com>
> -----Original Message-----
> From: Lee, Shawn C <shawn.c.lee@intel.com>
> Sent: Thursday, August 12, 2021 9:13 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; ville.syrjala@linux.intel.com;
> Kulkarni, Vandita <vandita.kulkarni@intel.com>; Chiou, Cooper
> <cooper.chiou@intel.com>; Tseng, William <william.tseng@intel.com>; Lee,
> Shawn C <shawn.c.lee@intel.com>; Jani Nikula <jani.nikula@linux.intel.com>
> Subject: [v4 3/7] drm/i915/dsi: wait for header and payload credit available
>
> Driver should wait for free header or payload buffer in FIFO.
> It would be good to wait a while for HW to release credit before give it up to
> write to HW. Without sending initailize command sets completely. It would
> caused MIPI display can't light up properly.
>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Cc: Cooper Chiou <cooper.chiou@intel.com>
> Cc: William Tseng <william.tseng@intel.com>
> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
Looks good to me.
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 40 ++++++++++++--------------
> 1 file changed, 19 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 43ec7fcd3f5d..1780830d9909 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -54,20 +54,28 @@ static int payload_credits_available(struct
> drm_i915_private *dev_priv,
> >> FREE_PLOAD_CREDIT_SHIFT;
> }
>
> -static void wait_for_header_credits(struct drm_i915_private *dev_priv,
> - enum transcoder dsi_trans)
> +static bool wait_for_header_credits(struct drm_i915_private *dev_priv,
> + enum transcoder dsi_trans, int hdr_credit)
> {
> if (wait_for_us(header_credits_available(dev_priv, dsi_trans) >=
> - MAX_HEADER_CREDIT, 100))
> + hdr_credit, 100)) {
> drm_err(&dev_priv->drm, "DSI header credits not
> released\n");
> + return false;
> + }
> +
> + return true;
> }
>
> -static void wait_for_payload_credits(struct drm_i915_private *dev_priv,
> - enum transcoder dsi_trans)
> +static bool wait_for_payload_credits(struct drm_i915_private *dev_priv,
> + enum transcoder dsi_trans, int
> payld_credit)
> {
> if (wait_for_us(payload_credits_available(dev_priv, dsi_trans) >=
> - MAX_PLOAD_CREDIT, 100))
> + payld_credit, 100)) {
> drm_err(&dev_priv->drm, "DSI payload credits not
> released\n");
> + return false;
> + }
> +
> + return true;
> }
>
> static enum transcoder dsi_port_to_transcoder(enum port port) @@ -90,8
> +98,8 @@ static void wait_for_cmds_dispatched_to_panel(struct
> intel_encoder *encoder)
> /* wait for header/payload credits to be released */
> for_each_dsi_port(port, intel_dsi->ports) {
> dsi_trans = dsi_port_to_transcoder(port);
> - wait_for_header_credits(dev_priv, dsi_trans);
> - wait_for_payload_credits(dev_priv, dsi_trans);
> + wait_for_header_credits(dev_priv, dsi_trans,
> MAX_HEADER_CREDIT);
> + wait_for_payload_credits(dev_priv, dsi_trans,
> MAX_PLOAD_CREDIT);
> }
>
> /* send nop DCS command */
> @@ -108,7 +116,7 @@ static void
> wait_for_cmds_dispatched_to_panel(struct intel_encoder *encoder)
> /* wait for header credits to be released */
> for_each_dsi_port(port, intel_dsi->ports) {
> dsi_trans = dsi_port_to_transcoder(port);
> - wait_for_header_credits(dev_priv, dsi_trans);
> + wait_for_header_credits(dev_priv, dsi_trans,
> MAX_HEADER_CREDIT);
> }
>
> /* wait for LP TX in progress bit to be cleared */ @@ -126,18 +134,13
> @@ static bool add_payld_to_queue(struct intel_dsi_host *host, const u8
> *data,
> struct intel_dsi *intel_dsi = host->intel_dsi;
> struct drm_i915_private *dev_priv = to_i915(intel_dsi-
> >base.base.dev);
> enum transcoder dsi_trans = dsi_port_to_transcoder(host->port);
> - int free_credits;
> int i, j;
>
> for (i = 0; i < len; i += 4) {
> u32 tmp = 0;
>
> - free_credits = payload_credits_available(dev_priv,
> dsi_trans);
> - if (free_credits < 1) {
> - drm_err(&dev_priv->drm,
> - "Payload credit not available\n");
> + if (!wait_for_payload_credits(dev_priv, dsi_trans, 1))
> return false;
> - }
>
> for (j = 0; j < min_t(u32, len - i, 4); j++)
> tmp |= *data++ << 8 * j;
> @@ -155,15 +158,10 @@ static int dsi_send_pkt_hdr(struct intel_dsi_host
> *host,
> struct drm_i915_private *dev_priv = to_i915(intel_dsi-
> >base.base.dev);
> enum transcoder dsi_trans = dsi_port_to_transcoder(host->port);
> u32 tmp;
> - int free_credits;
>
> /* check if header credit available */
> - free_credits = header_credits_available(dev_priv, dsi_trans);
> - if (free_credits < 1) {
> - drm_err(&dev_priv->drm,
> - "send pkt header failed, not enough hdr credits\n");
> + if (!wait_for_header_credits(dev_priv, dsi_trans, 1))
> return -1;
> - }
>
> tmp = intel_de_read(dev_priv, DSI_CMD_TXHDR(dsi_trans));
>
> --
> 2.17.1
next prev parent reply other threads:[~2021-08-26 5:54 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-12 15:42 [Intel-gfx] [v4 0/7] MIPI DSI driver enhancements Lee Shawn C
2021-08-12 15:42 ` [Intel-gfx] [v4 1/7] drm/i915/dsi: send correct gpio_number on gen11 platform Lee Shawn C
2021-08-12 15:42 ` [Intel-gfx] [v4 2/7] drm/i915/jsl: program DSI panel GPIOs Lee Shawn C
2021-08-23 12:06 ` Jani Nikula
2021-08-12 15:42 ` [Intel-gfx] [v4 3/7] drm/i915/dsi: wait for header and payload credit available Lee Shawn C
2021-08-26 5:54 ` Kulkarni, Vandita [this message]
2021-08-12 15:42 ` [Intel-gfx] [v4 4/7] drm/i915/dsi: refine send MIPI DCS command sequence Lee Shawn C
2021-08-23 9:45 ` Kulkarni, Vandita
2021-08-12 15:42 ` [Intel-gfx] [v4 5/7] drm/i915: Get proper min cdclk if vDSC enabled Lee Shawn C
2021-08-23 12:19 ` Kulkarni, Vandita
2021-08-12 15:42 ` [Intel-gfx] [v4 6/7] drm/i915/dsi: Retrieve max brightness level from VBT Lee Shawn C
2021-08-23 8:46 ` Kulkarni, Vandita
2021-08-23 9:03 ` Lee, Shawn C
2021-08-23 12:10 ` Kulkarni, Vandita
2021-08-24 14:00 ` [Intel-gfx] [PATCH] " Lee Shawn C
2021-08-24 14:33 ` Jani Nikula
2021-08-24 15:53 ` Lee, Shawn C
2021-08-12 15:42 ` [Intel-gfx] [v4 7/7] drm/i915/dsi: Send proper brightness value via MIPI DCS command Lee Shawn C
2021-08-12 23:22 ` kernel test robot
2021-08-13 2:46 ` [Intel-gfx] [v4] " Lee Shawn C
2021-08-18 11:10 ` Jani Nikula
2021-08-18 14:58 ` Lee, Shawn C
2021-08-19 11:16 ` [Intel-gfx] [v4] drm/i915/dsi: Read/write " Lee Shawn C
2021-08-12 20:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MIPI DSI driver enhancements (rev5) Patchwork
2021-08-12 20:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-12 21:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-13 2:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-08-13 2:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MIPI DSI driver enhancements (rev6) Patchwork
2021-08-13 2:58 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-13 3:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-13 7:56 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-08-19 11:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MIPI DSI driver enhancements (rev7) Patchwork
2021-08-19 11:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-19 12:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-19 13:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-08-24 19:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for MIPI DSI driver enhancements (rev8) Patchwork
2021-08-24 19:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-24 19:41 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-08-25 1:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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