From: John Harrison <john.c.harrison@intel.com>
To: Matthew Brost <matthew.brost@intel.com>,
<intel-gfx@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>
Cc: <daniel.vetter@ffwll.ch>, <tony.ye@intel.com>, <zhengguo.xu@intel.com>
Subject: Re: [Intel-gfx] [PATCH 09/27] drm/i915: Expose logical engine instance to user
Date: Mon, 13 Sep 2021 16:06:33 -0700 [thread overview]
Message-ID: <7f3495e7-d66a-3254-3473-b25e4c757b5c@intel.com> (raw)
In-Reply-To: <20210820224446.30620-10-matthew.brost@intel.com>
On 8/20/2021 15:44, Matthew Brost wrote:
> Expose logical engine instance to user via query engine info IOCTL. This
> is required for split-frame workloads as these needs to be placed on
> engines in a logically contiguous order. The logical mapping can change
> based on fusing. Rather than having user have knowledge of the fusing we
> simply just expose the logical mapping with the existing query engine
> info IOCTL.
>
> IGT: https://patchwork.freedesktop.org/patch/445637/?series=92854&rev=1
> media UMD: link coming soon
>
> v2:
> (Daniel Vetter)
> - Add IGT link, placeholder for media UMD
>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/i915/i915_query.c | 2 ++
> include/uapi/drm/i915_drm.h | 8 +++++++-
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index e49da36c62fb..8a72923fbdba 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -124,7 +124,9 @@ query_engine_info(struct drm_i915_private *i915,
> for_each_uabi_engine(engine, i915) {
> info.engine.engine_class = engine->uabi_class;
> info.engine.engine_instance = engine->uabi_instance;
> + info.flags = I915_ENGINE_INFO_HAS_LOGICAL_INSTANCE;
> info.capabilities = engine->uabi_capabilities;
> + info.logical_instance = ilog2(engine->logical_mask);
>
> if (copy_to_user(info_ptr, &info, sizeof(info)))
> return -EFAULT;
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index bde5860b3686..b1248a67b4f8 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -2726,14 +2726,20 @@ struct drm_i915_engine_info {
>
> /** @flags: Engine flags. */
> __u64 flags;
> +#define I915_ENGINE_INFO_HAS_LOGICAL_INSTANCE (1 << 0)
>
> /** @capabilities: Capabilities of this engine. */
> __u64 capabilities;
> #define I915_VIDEO_CLASS_CAPABILITY_HEVC (1 << 0)
> #define I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC (1 << 1)
>
> + /** @logical_instance: Logical instance of engine */
> + __u16 logical_instance;
> +
> /** @rsvd1: Reserved fields. */
> - __u64 rsvd1[4];
> + __u16 rsvd1[3];
> + /** @rsvd2: Reserved fields. */
> + __u64 rsvd2[3];
> };
>
> /**
Any idea why the padding? Would be useful if the comment said 'this
structure must be at least/exactly X bytes in size / a multiple of X
bytes in size because ...' or whatever.
However, not really anything to do with this patch as such, so either way:
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
next prev parent reply other threads:[~2021-09-13 23:06 UTC|newest]
Thread overview: 109+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-20 22:44 [Intel-gfx] [PATCH 00/27] Parallel submission aka multi-bb execbuf Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 01/27] drm/i915/guc: Squash Clean up GuC CI failures, simplify locking, and kernel DOC Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 02/27] drm/i915/guc: Allow flexible number of context ids Matthew Brost
2021-09-09 22:13 ` John Harrison
2021-09-10 0:14 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 03/27] drm/i915/guc: Connect the number of guc_ids to debugfs Matthew Brost
2021-09-09 22:16 ` John Harrison
2021-09-10 0:16 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 04/27] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
2021-09-09 22:28 ` John Harrison
2021-09-10 0:21 ` Matthew Brost
2021-09-13 9:55 ` Tvrtko Ursulin
2021-09-13 17:12 ` Matthew Brost
2021-09-14 8:41 ` Tvrtko Ursulin
2021-08-20 22:44 ` [Intel-gfx] [PATCH 05/27] drm/i915: Add GT PM unpark worker Matthew Brost
2021-09-09 22:36 ` John Harrison
2021-09-10 0:34 ` Matthew Brost
2021-09-10 8:36 ` Tvrtko Ursulin
2021-09-10 20:09 ` Matthew Brost
2021-09-13 10:33 ` Tvrtko Ursulin
2021-09-13 17:20 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 06/27] drm/i915/guc: Take engine PM when a context is pinned with GuC submission Matthew Brost
2021-09-09 22:46 ` John Harrison
2021-09-10 0:41 ` Matthew Brost
2021-09-13 22:26 ` John Harrison
2021-09-14 1:12 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 07/27] drm/i915/guc: Don't call switch_to_kernel_context " Matthew Brost
2021-09-09 22:51 ` John Harrison
2021-09-13 16:54 ` Matthew Brost
2021-09-13 22:38 ` John Harrison
2021-09-14 5:02 ` Matthew Brost
2021-09-13 16:55 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 08/27] drm/i915: Add logical engine mapping Matthew Brost
2021-09-10 11:12 ` Tvrtko Ursulin
2021-09-10 19:49 ` Matthew Brost
2021-09-13 9:24 ` Tvrtko Ursulin
2021-09-13 16:50 ` Matthew Brost
2021-09-14 8:34 ` Tvrtko Ursulin
2021-09-14 18:04 ` Matthew Brost
2021-09-15 8:24 ` Tvrtko Ursulin
2021-09-15 16:58 ` Matthew Brost
2021-09-16 8:31 ` Tvrtko Ursulin
2021-08-20 22:44 ` [Intel-gfx] [PATCH 09/27] drm/i915: Expose logical engine instance to user Matthew Brost
2021-09-13 23:06 ` John Harrison [this message]
2021-09-14 1:08 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 10/27] drm/i915/guc: Introduce context parent-child relationship Matthew Brost
2021-09-13 23:19 ` John Harrison
2021-09-14 1:18 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 11/27] drm/i915/guc: Implement parallel context pin / unpin functions Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 12/27] drm/i915/guc: Add multi-lrc context registration Matthew Brost
2021-09-15 19:21 ` John Harrison
2021-09-15 19:31 ` Matthew Brost
2021-09-15 20:23 ` John Harrison
2021-09-15 20:33 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 13/27] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts Matthew Brost
2021-09-15 19:24 ` John Harrison
2021-09-15 19:34 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 14/27] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids Matthew Brost
2021-09-15 20:04 ` John Harrison
2021-09-15 20:55 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 15/27] drm/i915/guc: Implement multi-lrc submission Matthew Brost
2021-08-21 14:04 ` kernel test robot
2021-08-22 2:18 ` kernel test robot
2021-09-20 21:48 ` John Harrison
2021-09-22 16:25 ` Matthew Brost
2021-09-22 20:15 ` John Harrison
2021-09-23 2:44 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 16/27] drm/i915/guc: Insert submit fences between requests in parent-child relationship Matthew Brost
2021-09-20 21:57 ` John Harrison
2021-08-20 22:44 ` [Intel-gfx] [PATCH 17/27] drm/i915/guc: Implement multi-lrc reset Matthew Brost
2021-09-20 22:44 ` John Harrison
2021-09-22 16:16 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 18/27] drm/i915/guc: Update debugfs for GuC multi-lrc Matthew Brost
2021-09-20 22:48 ` John Harrison
2021-09-21 19:13 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 19/27] drm/i915: Fix bug in user proto-context creation that leaked contexts Matthew Brost
2021-09-20 22:57 ` John Harrison
2021-09-21 14:49 ` Tvrtko Ursulin
2021-09-21 19:28 ` Matthew Brost
2021-09-21 19:28 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 20/27] drm/i915/guc: Connect UAPI to GuC multi-lrc interface Matthew Brost
2021-08-29 4:00 ` kernel test robot
2021-08-29 19:59 ` kernel test robot
2021-09-21 0:09 ` John Harrison
2021-09-22 16:38 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 21/27] drm/i915/doc: Update parallel submit doc to point to i915_drm.h Matthew Brost
2021-09-21 0:12 ` John Harrison
2021-08-20 22:44 ` [Intel-gfx] [PATCH 22/27] drm/i915/guc: Add basic GuC multi-lrc selftest Matthew Brost
2021-09-28 20:47 ` John Harrison
2021-08-20 22:44 ` [Intel-gfx] [PATCH 23/27] drm/i915/guc: Implement no mid batch preemption for multi-lrc Matthew Brost
2021-09-10 11:25 ` Tvrtko Ursulin
2021-09-10 20:49 ` Matthew Brost
2021-09-13 10:52 ` Tvrtko Ursulin
2021-09-28 22:20 ` John Harrison
2021-09-28 22:33 ` Matthew Brost
2021-09-28 23:33 ` John Harrison
2021-09-29 0:22 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 24/27] drm/i915: Multi-BB execbuf Matthew Brost
2021-08-21 19:01 ` kernel test robot
2021-08-30 3:46 ` kernel test robot
2021-09-30 22:16 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 25/27] drm/i915/guc: Handle errors in multi-lrc requests Matthew Brost
2021-09-29 20:44 ` John Harrison
2021-09-29 20:58 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 26/27] drm/i915: Enable multi-bb execbuf Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 27/27] drm/i915/execlists: Weak parallel submission support for execlists Matthew Brost
2021-08-20 23:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev3) Patchwork
2021-08-20 23:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-20 23:45 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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