* [Intel-gfx] [PATCH] drm/i915/dg2: UHBR tables added for pll programming
@ 2021-08-27 10:38 Jani Nikula
2021-08-27 11:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Jani Nikula @ 2021-08-27 10:38 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Animesh Manna
From: Animesh Manna <animesh.manna@intel.com>
UHBR modes has higher link rate and added new values for programming
mpll of SNPS phy. No change in sequence, only the pll parameters
are different for UHBR modes.
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_snps_phy.c | 147 ++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 4 +
2 files changed, 151 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index 58ec2467ad66..2405f70d82de 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -171,11 +171,81 @@ static const struct intel_mpllb_state dg2_dp_hbr3_100 = {
REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 1),
};
+static const struct intel_mpllb_state dg2_dp_uhbr10_100 = {
+ .clock = 1000000,
+ .ref_control =
+ REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, 3),
+ .mpllb_cp =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, 4) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, 21) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, 65) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, 127),
+ .mpllb_div =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_CLK_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_MULTIPLIER, 8) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_WORD_DIV2_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DP2_MODE, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, 2),
+ .mpllb_div2 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, 2) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, 368),
+ .mpllb_fracn1 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 1),
+
+ /*
+ * SSC will be enabled, DP UHBR has a minimum SSC requirement.
+ */
+ .mpllb_sscen =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_PEAK, 58982),
+ .mpllb_sscstep =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_STEPSIZE, 76101),
+};
+
+static const struct intel_mpllb_state dg2_dp_uhbr13_100 = {
+ .clock = 1350000,
+ .ref_control =
+ REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, 3),
+ .mpllb_cp =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, 5) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, 45) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, 65) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, 127),
+ .mpllb_div =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_CLK_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_MULTIPLIER, 8) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_WORD_DIV2_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DP2_MODE, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, 3),
+ .mpllb_div2 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, 2) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, 508),
+ .mpllb_fracn1 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 1),
+
+ /*
+ * SSC will be enabled, DP UHBR has a minimum SSC requirement.
+ */
+ .mpllb_sscen =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_PEAK, 79626),
+ .mpllb_sscstep =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_STEPSIZE, 102737),
+};
+
static const struct intel_mpllb_state * const dg2_dp_100_tables[] = {
&dg2_dp_rbr_100,
&dg2_dp_hbr1_100,
&dg2_dp_hbr2_100,
&dg2_dp_hbr3_100,
+ &dg2_dp_uhbr10_100,
+ &dg2_dp_uhbr13_100,
NULL,
};
@@ -284,11 +354,88 @@ static const struct intel_mpllb_state dg2_dp_hbr3_38_4 = {
REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, 61440),
};
+static const struct intel_mpllb_state dg2_dp_uhbr10_38_4 = {
+ .clock = 1000000,
+ .ref_control =
+ REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, 1),
+ .mpllb_cp =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, 5) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, 26) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, 65) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, 127),
+ .mpllb_div =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_CLK_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_MULTIPLIER, 8) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_WORD_DIV2_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DP2_MODE, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, 2),
+ .mpllb_div2 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, 488),
+ .mpllb_fracn1 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 3),
+ .mpllb_fracn2 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 2) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, 27306),
+
+ /*
+ * SSC will be enabled, DP UHBR has a minimum SSC requirement.
+ */
+ .mpllb_sscen =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_PEAK, 76800),
+ .mpllb_sscstep =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_STEPSIZE, 129024),
+};
+
+static const struct intel_mpllb_state dg2_dp_uhbr13_38_4 = {
+ .clock = 1350000,
+ .ref_control =
+ REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, 1),
+ .mpllb_cp =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, 6) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, 56) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, 65) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, 127),
+ .mpllb_div =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_CLK_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_MULTIPLIER, 8) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_WORD_DIV2_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_DP2_MODE, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, 3),
+ .mpllb_div2 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, 670),
+ .mpllb_fracn1 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 1),
+ .mpllb_fracn2 =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, 36864),
+
+ /*
+ * SSC will be enabled, DP UHBR has a minimum SSC requirement.
+ */
+ .mpllb_sscen =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_EN, 1) |
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_PEAK, 103680),
+ .mpllb_sscstep =
+ REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_STEPSIZE, 174182),
+};
+
static const struct intel_mpllb_state * const dg2_dp_38_4_tables[] = {
&dg2_dp_rbr_38_4,
&dg2_dp_hbr1_38_4,
&dg2_dp_hbr2_38_4,
&dg2_dp_hbr3_38_4,
+ &dg2_dp_uhbr10_38_4,
+ &dg2_dp_uhbr13_38_4,
NULL,
};
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8d4cf1e203ab..40943dd5e0db 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2237,10 +2237,14 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define SNPS_PHY_MPLLB_DIV(phy) _MMIO_SNPS(phy, 0x168004)
#define SNPS_PHY_MPLLB_FORCE_EN REG_BIT(31)
+#define SNPS_PHY_MPLLB_DIV_CLK_EN REG_BIT(30)
#define SNPS_PHY_MPLLB_DIV5_CLK_EN REG_BIT(29)
#define SNPS_PHY_MPLLB_V2I REG_GENMASK(27, 26)
#define SNPS_PHY_MPLLB_FREQ_VCO REG_GENMASK(25, 24)
+#define SNPS_PHY_MPLLB_DIV_MULTIPLIER REG_GENMASK(23, 16)
#define SNPS_PHY_MPLLB_PMIX_EN REG_BIT(10)
+#define SNPS_PHY_MPLLB_DP2_MODE REG_BIT(9)
+#define SNPS_PHY_MPLLB_WORD_DIV2_EN REG_BIT(8)
#define SNPS_PHY_MPLLB_TX_CLK_DIV REG_GENMASK(7, 5)
#define SNPS_PHY_MPLLB_FRACN1(phy) _MMIO_SNPS(phy, 0x168008)
--
2.20.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: UHBR tables added for pll programming
2021-08-27 10:38 [Intel-gfx] [PATCH] drm/i915/dg2: UHBR tables added for pll programming Jani Nikula
@ 2021-08-27 11:21 ` Patchwork
2021-08-27 15:03 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-08-30 10:25 ` [Intel-gfx] [PATCH] " Jani Nikula
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2021-08-27 11:21 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 2237 bytes --]
== Series Details ==
Series: drm/i915/dg2: UHBR tables added for pll programming
URL : https://patchwork.freedesktop.org/series/94100/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10530 -> Patchwork_20908
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/index.html
Known issues
------------
Here are the changes found in Patchwork_20908 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-soraka: [PASS][1] -> [INCOMPLETE][2] ([i915#155])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/fi-kbl-soraka/igt@gem_exec_suspend@basic-s0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/fi-kbl-soraka/igt@gem_exec_suspend@basic-s0.html
#### Possible fixes ####
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [DMESG-WARN][3] ([i915#2203] / [i915#2868]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
[i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868
Participating hosts (38 -> 32)
------------------------------
Missing (6): fi-ilk-m540 bat-adls-5 fi-bsw-cyan fi-kbl-7500u fi-bdw-samus bat-jsl-1
Build changes
-------------
* Linux: CI_DRM_10530 -> Patchwork_20908
CI-20190529: 20190529
CI_DRM_10530: 63bca765c920120bd9746d9093190d82c4ace341 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6187: 1afd52c1471dafdf521eae431f3e228826de6de2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20908: 37a3cc965a3b884bb5ca84f4a645c08fa6c68ead @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
37a3cc965a3b drm/i915/dg2: UHBR tables added for pll programming
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/index.html
[-- Attachment #2: Type: text/html, Size: 2853 bytes --]
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dg2: UHBR tables added for pll programming
2021-08-27 10:38 [Intel-gfx] [PATCH] drm/i915/dg2: UHBR tables added for pll programming Jani Nikula
2021-08-27 11:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2021-08-27 15:03 ` Patchwork
2021-08-30 10:25 ` [Intel-gfx] [PATCH] " Jani Nikula
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2021-08-27 15:03 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30274 bytes --]
== Series Details ==
Series: drm/i915/dg2: UHBR tables added for pll programming
URL : https://patchwork.freedesktop.org/series/94100/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10530_full -> Patchwork_20908_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_20908_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@legacy-engines-mixed-process:
- shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) +5 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-snb5/igt@gem_ctx_persistence@legacy-engines-mixed-process.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][2] -> [TIMEOUT][3] ([i915#2369] / [i915#3063] / [i915#3648])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-tglb3/igt@gem_eio@unwedge-stress.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-tglb7/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-kbl: [PASS][4] -> [FAIL][5] ([i915#2842])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@gem_exec_fair@basic-none-solo@rcs0.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl7/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][6] ([i915#2842])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-iclb: [PASS][7] -> [FAIL][8] ([i915#2842])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb3/igt@gem_exec_fair@basic-pace@rcs0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb6/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][9] -> [FAIL][10] ([i915#2849])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb5/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_params@no-blt:
- shard-iclb: NOTRUN -> [SKIP][11] ([fdo#109283])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb3/igt@gem_exec_params@no-blt.html
* igt@gem_huc_copy@huc-copy:
- shard-apl: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#2190])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl1/igt@gem_huc_copy@huc-copy.html
* igt@gem_mmap_gtt@cpuset-medium-copy:
- shard-glk: [PASS][13] -> [FAIL][14] ([i915#1888] / [i915#307])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk8/igt@gem_mmap_gtt@cpuset-medium-copy.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-glk7/igt@gem_mmap_gtt@cpuset-medium-copy.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-apl: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#3323])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl2/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@input-checking:
- shard-skl: NOTRUN -> [DMESG-WARN][16] ([i915#3002])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl6/igt@gem_userptr_blits@input-checking.html
- shard-apl: NOTRUN -> [DMESG-WARN][17] ([i915#3002])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl3/igt@gem_userptr_blits@input-checking.html
- shard-snb: NOTRUN -> [DMESG-WARN][18] ([i915#3002])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-snb7/igt@gem_userptr_blits@input-checking.html
* igt@i915_suspend@forcewake:
- shard-apl: NOTRUN -> [DMESG-WARN][19] ([i915#180])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl6/igt@i915_suspend@forcewake.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-apl: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#3777]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-180:
- shard-skl: [PASS][21] -> [DMESG-WARN][22] ([i915#1982])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl10/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl6/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-kbl: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3777]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
- shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271]) +288 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#3886]) +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-glk8/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#3886]) +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl6/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#3886]) +18 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl1/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs:
- shard-snb: NOTRUN -> [SKIP][28] ([fdo#109271]) +327 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-snb2/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html
* igt@kms_ccs@pipe-d-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][29] ([fdo#109271]) +47 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-glk8/igt@kms_ccs@pipe-d-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@hdmi-edid-change-during-suspend:
- shard-apl: NOTRUN -> [SKIP][30] ([fdo#109271] / [fdo#111827]) +24 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl8/igt@kms_chamelium@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium@hdmi-hpd-storm-disable:
- shard-kbl: NOTRUN -> [SKIP][31] ([fdo#109271] / [fdo#111827]) +7 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl4/igt@kms_chamelium@hdmi-hpd-storm-disable.html
* igt@kms_chamelium@vga-hpd-after-suspend:
- shard-glk: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111827]) +2 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-glk8/igt@kms_chamelium@vga-hpd-after-suspend.html
* igt@kms_color@pipe-d-ctm-negative:
- shard-skl: NOTRUN -> [SKIP][33] ([fdo#109271]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl6/igt@kms_color@pipe-d-ctm-negative.html
* igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes:
- shard-snb: NOTRUN -> [SKIP][34] ([fdo#109271] / [fdo#111827]) +15 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-snb5/igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes.html
* igt@kms_content_protection@lic:
- shard-apl: NOTRUN -> [TIMEOUT][35] ([i915#1319])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl7/igt@kms_content_protection@lic.html
* igt@kms_cursor_crc@pipe-c-cursor-512x512-onscreen:
- shard-iclb: NOTRUN -> [SKIP][36] ([fdo#109278] / [fdo#109279])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb3/igt@kms_cursor_crc@pipe-c-cursor-512x512-onscreen.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-skl: [PASS][37] -> [FAIL][38] ([i915#79])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: [PASS][39] -> [DMESG-WARN][40] ([i915#180]) +4 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-apl: NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#2672])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
- shard-kbl: NOTRUN -> [SKIP][42] ([fdo#109271]) +103 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite:
- shard-tglb: NOTRUN -> [SKIP][43] ([fdo#111825])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-tglb7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][44] -> [FAIL][45] ([i915#1188]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl5/igt@kms_hdr@bpc-switch-suspend.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl9/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
- shard-glk: NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#533])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-glk8/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][47] ([fdo#108145] / [i915#265]) +4 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
- shard-glk: NOTRUN -> [FAIL][48] ([fdo#108145] / [i915#265])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-glk8/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][49] ([i915#265])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][50] -> [FAIL][51] ([fdo#108145] / [i915#265])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-kbl: NOTRUN -> [FAIL][52] ([fdo#108145] / [i915#265])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html
* igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping:
- shard-apl: NOTRUN -> [SKIP][53] ([fdo#109271] / [i915#2733])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl1/igt@kms_plane_scaling@scaler-with-clipping-clamping@pipe-c-scaler-with-clipping-clamping.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5:
- shard-glk: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#658])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-glk8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
- shard-apl: NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#658]) +5 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-0:
- shard-kbl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#658]) +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl6/igt@kms_psr2_sf@plane-move-sf-dmg-area-0.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [PASS][57] -> [SKIP][58] ([fdo#109642] / [fdo#111068] / [i915#658])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb2/igt@kms_psr2_su@page_flip.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb7/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [PASS][59] -> [SKIP][60] ([fdo#109441]) +2 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb3/igt@kms_psr@psr2_sprite_blt.html
* igt@kms_setmode@basic:
- shard-snb: NOTRUN -> [FAIL][61] ([i915#31])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-snb2/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-d-wait-idle:
- shard-apl: NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#533]) +3 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl1/igt@kms_vblank@pipe-d-wait-idle.html
* igt@kms_writeback@writeback-check-output:
- shard-kbl: NOTRUN -> [SKIP][63] ([fdo#109271] / [i915#2437])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl4/igt@kms_writeback@writeback-check-output.html
* igt@runner@aborted:
- shard-snb: NOTRUN -> [FAIL][64] ([i915#3002])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-snb7/igt@runner@aborted.html
* igt@sysfs_clients@create:
- shard-apl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#2994]) +2 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl2/igt@sysfs_clients@create.html
* igt@sysfs_clients@recycle:
- shard-kbl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#2994]) +1 similar issue
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl6/igt@sysfs_clients@recycle.html
#### Possible fixes ####
* igt@gem_eio@unwedge-stress:
- shard-iclb: [TIMEOUT][67] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb1/igt@gem_eio@unwedge-stress.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb4/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_endless@dispatch@vecs0:
- {shard-rkl}: [INCOMPLETE][69] ([i915#3778]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-1/igt@gem_exec_endless@dispatch@vecs0.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-2/igt@gem_exec_endless@dispatch@vecs0.html
* igt@gem_exec_fair@basic-deadline:
- {shard-rkl}: [FAIL][71] ([i915#2846]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-1/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-glk: [FAIL][73] ([i915#2842]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk5/igt@gem_exec_fair@basic-pace@vecs0.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-glk8/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- {shard-rkl}: [FAIL][75] ([i915#2842]) -> [PASS][76] +1 similar issue
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-6/igt@gem_exec_fair@basic-throttle@rcs0.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_mmap_gtt@cpuset-big-copy-xy:
- shard-iclb: [FAIL][77] ([i915#307]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb3/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [INCOMPLETE][79] ([i915#198]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl8/igt@gem_softpin@noreloc-s3.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl6/igt@gem_softpin@noreloc-s3.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [DMESG-WARN][81] ([i915#180]) -> [PASS][82] +1 similar issue
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-apl2/igt@gem_workarounds@suspend-resume-context.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl3/igt@gem_workarounds@suspend-resume-context.html
* igt@gen9_exec_parse@allowed-all:
- shard-glk: [DMESG-WARN][83] ([i915#1436] / [i915#716]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk1/igt@gen9_exec_parse@allowed-all.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-glk4/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
- {shard-rkl}: [SKIP][85] ([i915#1397]) -> [PASS][86] +1 similar issue
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-180:
- {shard-rkl}: [SKIP][87] ([i915#3638]) -> [PASS][88] +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0:
- {shard-rkl}: [SKIP][89] ([i915#3721]) -> [PASS][90] +2 similar issues
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_color@pipe-b-ctm-0-25:
- {shard-rkl}: [SKIP][91] ([i915#1149] / [i915#1849]) -> [PASS][92] +2 similar issues
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_color@pipe-b-ctm-0-25.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_color@pipe-b-ctm-0-25.html
* igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding:
- {shard-rkl}: [SKIP][93] ([fdo#112022]) -> [PASS][94] +7 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html
* igt@kms_cursor_legacy@cursor-vs-flip-atomic:
- {shard-rkl}: [SKIP][95] ([fdo#111825]) -> [PASS][96] +1 similar issue
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][97] ([i915#2346] / [i915#533]) -> [PASS][98]
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_dp_aux_dev:
- {shard-rkl}: [SKIP][99] ([i915#1257]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_dp_aux_dev.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_dp_aux_dev.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled:
- {shard-rkl}: [SKIP][101] ([fdo#111314]) -> [PASS][102] +4 similar issues
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [INCOMPLETE][103] ([i915#155] / [i915#180] / [i915#636]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl4/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_fbcon_fbt@psr:
- {shard-rkl}: [SKIP][105] ([fdo#110189] / [i915#3955]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_fbcon_fbt@psr.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_fbcon_fbt@psr.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-skl: [FAIL][107] ([i915#79]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
- shard-skl: [FAIL][109] ([i915#2122]) -> [PASS][110] +3 similar issues
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-rkl}: [SKIP][111] ([i915#1849]) -> [PASS][112] +22 similar issues
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- {shard-rkl}: [SKIP][113] ([i915#1849] / [i915#3558]) -> [PASS][114] +1 similar issue
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_plane_multiple@atomic-pipe-c-tiling-y.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_plane_multiple@atomic-pipe-c-tiling-y.html
* igt@kms_psr@no_drrs:
- {shard-rkl}: [SKIP][115] ([i915#1072]) -> [PASS][116] +1 similar issue
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_psr@no_drrs.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_cursor_plane_move:
- shard-iclb: [SKIP][117] ([fdo#109441]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb7/igt@kms_psr@psr2_cursor_plane_move.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-kbl: [DMESG-WARN][119] ([i915#180]) -> [PASS][120] +1 similar issue
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl6/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@kms_vblank@pipe-c-wait-busy:
- {shard-rkl}: [SKIP][121] ([i915#1845]) -> [PASS][122] +22 similar issues
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-rkl-2/igt@kms_vblank@pipe-c-wait-busy.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-rkl-6/igt@kms_vblank@pipe-c-wait-busy.html
* igt@perf@polling:
- shard-skl: [FAIL][123] ([i915#1542]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-skl5/igt@perf@polling.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-skl9/igt@perf@polling.html
#### Warnings ####
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-iclb: [FAIL][125] ([i915#2842]) -> [FAIL][126] ([i915#2852])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb4/igt@gem_exec_fair@basic-none-rrul@rcs0.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb3/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][127] ([i915#1804] / [i915#2684]) -> [WARN][128] ([i915#2684])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb7/igt@i915_pm_rc6_residency@rc6-fence.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb2/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][129] ([i915#2684]) -> [WARN][130] ([i915#1804] / [i915#2684])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb7/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-iclb: [SKIP][131] ([i915#658]) -> [SKIP][132] ([i915#2920]) +1 similar issue
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb7/igt@kms_psr2_sf@cursor-plane-update-sf.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb2/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
- shard-iclb: [SKIP][133] ([i915#2920]) -> [SKIP][134] ([i915#658])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-iclb1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][135], [FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602] / [i915#92]) -> ([FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl4/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl6/igt@runner@aborted.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl4/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl1/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl3/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl7/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl4/igt@runner@aborted.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl1/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-kbl1/igt@runner@aborted.html
- shard-apl: ([FAIL][145], [FAIL][146]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3363]) -> ([FAIL][147], [FAIL][148]) ([i915#180] / [i915#3002] / [i915#3363])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-apl2/igt@runner@aborted.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-apl6/igt@runner@aborted.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl6/igt@runner@aborted.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/shard-apl3/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20908/index.html
[-- Attachment #2: Type: text/html, Size: 33852 bytes --]
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/dg2: UHBR tables added for pll programming
2021-08-27 10:38 [Intel-gfx] [PATCH] drm/i915/dg2: UHBR tables added for pll programming Jani Nikula
2021-08-27 11:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-08-27 15:03 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2021-08-30 10:25 ` Jani Nikula
2 siblings, 0 replies; 4+ messages in thread
From: Jani Nikula @ 2021-08-30 10:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Animesh Manna
On Fri, 27 Aug 2021, Jani Nikula <jani.nikula@intel.com> wrote:
> From: Animesh Manna <animesh.manna@intel.com>
>
> UHBR modes has higher link rate and added new values for programming
> mpll of SNPS phy. No change in sequence, only the pll parameters
> are different for UHBR modes.
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Pushed, thanks for the patch.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/display/intel_snps_phy.c | 147 ++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 4 +
> 2 files changed, 151 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> index 58ec2467ad66..2405f70d82de 100644
> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> @@ -171,11 +171,81 @@ static const struct intel_mpllb_state dg2_dp_hbr3_100 = {
> REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 1),
> };
>
> +static const struct intel_mpllb_state dg2_dp_uhbr10_100 = {
> + .clock = 1000000,
> + .ref_control =
> + REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, 3),
> + .mpllb_cp =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, 4) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, 21) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, 65) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, 127),
> + .mpllb_div =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_CLK_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_MULTIPLIER, 8) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_WORD_DIV2_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DP2_MODE, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, 2),
> + .mpllb_div2 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, 2) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, 368),
> + .mpllb_fracn1 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 1),
> +
> + /*
> + * SSC will be enabled, DP UHBR has a minimum SSC requirement.
> + */
> + .mpllb_sscen =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_PEAK, 58982),
> + .mpllb_sscstep =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_STEPSIZE, 76101),
> +};
> +
> +static const struct intel_mpllb_state dg2_dp_uhbr13_100 = {
> + .clock = 1350000,
> + .ref_control =
> + REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, 3),
> + .mpllb_cp =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, 5) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, 45) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, 65) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, 127),
> + .mpllb_div =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_CLK_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_MULTIPLIER, 8) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_WORD_DIV2_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DP2_MODE, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, 3),
> + .mpllb_div2 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, 2) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, 508),
> + .mpllb_fracn1 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 1),
> +
> + /*
> + * SSC will be enabled, DP UHBR has a minimum SSC requirement.
> + */
> + .mpllb_sscen =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_PEAK, 79626),
> + .mpllb_sscstep =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_STEPSIZE, 102737),
> +};
> +
> static const struct intel_mpllb_state * const dg2_dp_100_tables[] = {
> &dg2_dp_rbr_100,
> &dg2_dp_hbr1_100,
> &dg2_dp_hbr2_100,
> &dg2_dp_hbr3_100,
> + &dg2_dp_uhbr10_100,
> + &dg2_dp_uhbr13_100,
> NULL,
> };
>
> @@ -284,11 +354,88 @@ static const struct intel_mpllb_state dg2_dp_hbr3_38_4 = {
> REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, 61440),
> };
>
> +static const struct intel_mpllb_state dg2_dp_uhbr10_38_4 = {
> + .clock = 1000000,
> + .ref_control =
> + REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, 1),
> + .mpllb_cp =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, 5) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, 26) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, 65) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, 127),
> + .mpllb_div =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_CLK_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_MULTIPLIER, 8) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_WORD_DIV2_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DP2_MODE, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, 2),
> + .mpllb_div2 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, 488),
> + .mpllb_fracn1 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 3),
> + .mpllb_fracn2 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_REM, 2) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, 27306),
> +
> + /*
> + * SSC will be enabled, DP UHBR has a minimum SSC requirement.
> + */
> + .mpllb_sscen =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_PEAK, 76800),
> + .mpllb_sscstep =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_STEPSIZE, 129024),
> +};
> +
> +static const struct intel_mpllb_state dg2_dp_uhbr13_38_4 = {
> + .clock = 1350000,
> + .ref_control =
> + REG_FIELD_PREP(SNPS_PHY_REF_CONTROL_REF_RANGE, 1),
> + .mpllb_cp =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT, 6) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP, 56) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_INT_GS, 65) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_CP_PROP_GS, 127),
> + .mpllb_div =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_CLK_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV_MULTIPLIER, 8) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_PMIX_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_WORD_DIV2_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_DP2_MODE, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_V2I, 3),
> + .mpllb_div2 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_REF_CLK_DIV, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_MULTIPLIER, 670),
> + .mpllb_fracn1 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_CGG_UPDATE_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_DEN, 1),
> + .mpllb_fracn2 =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_FRACN_QUOT, 36864),
> +
> + /*
> + * SSC will be enabled, DP UHBR has a minimum SSC requirement.
> + */
> + .mpllb_sscen =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_EN, 1) |
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_PEAK, 103680),
> + .mpllb_sscstep =
> + REG_FIELD_PREP(SNPS_PHY_MPLLB_SSC_STEPSIZE, 174182),
> +};
> +
> static const struct intel_mpllb_state * const dg2_dp_38_4_tables[] = {
> &dg2_dp_rbr_38_4,
> &dg2_dp_hbr1_38_4,
> &dg2_dp_hbr2_38_4,
> &dg2_dp_hbr3_38_4,
> + &dg2_dp_uhbr10_38_4,
> + &dg2_dp_uhbr13_38_4,
> NULL,
> };
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8d4cf1e203ab..40943dd5e0db 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2237,10 +2237,14 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>
> #define SNPS_PHY_MPLLB_DIV(phy) _MMIO_SNPS(phy, 0x168004)
> #define SNPS_PHY_MPLLB_FORCE_EN REG_BIT(31)
> +#define SNPS_PHY_MPLLB_DIV_CLK_EN REG_BIT(30)
> #define SNPS_PHY_MPLLB_DIV5_CLK_EN REG_BIT(29)
> #define SNPS_PHY_MPLLB_V2I REG_GENMASK(27, 26)
> #define SNPS_PHY_MPLLB_FREQ_VCO REG_GENMASK(25, 24)
> +#define SNPS_PHY_MPLLB_DIV_MULTIPLIER REG_GENMASK(23, 16)
> #define SNPS_PHY_MPLLB_PMIX_EN REG_BIT(10)
> +#define SNPS_PHY_MPLLB_DP2_MODE REG_BIT(9)
> +#define SNPS_PHY_MPLLB_WORD_DIV2_EN REG_BIT(8)
> #define SNPS_PHY_MPLLB_TX_CLK_DIV REG_GENMASK(7, 5)
>
> #define SNPS_PHY_MPLLB_FRACN1(phy) _MMIO_SNPS(phy, 0x168008)
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-08-30 10:25 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2021-08-27 10:38 [Intel-gfx] [PATCH] drm/i915/dg2: UHBR tables added for pll programming Jani Nikula
2021-08-27 11:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-08-27 15:03 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-08-30 10:25 ` [Intel-gfx] [PATCH] " Jani Nikula
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