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* [Intel-gfx] [PATCH] drm/i915: pps_lock moved to encoder to support dual EDP
@ 2021-12-20  6:35 Animesh Manna
  2021-12-20  7:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Animesh Manna @ 2021-12-20  6:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula

Currently dev_priv->pps_lock is used for locking mechanism and one
instance of pps registers are used for pps register programming.
Second instance enabled as per port number and pps_lock is moved
under encoder.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  3 ++
 drivers/gpu/drm/i915/display/intel_dp.c       |  1 +
 drivers/gpu/drm/i915/display/intel_pps.c      | 43 +++++++++----------
 drivers/gpu/drm/i915/i915_driver.c            |  1 -
 drivers/gpu/drm/i915/i915_drv.h               |  3 --
 5 files changed, 24 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index c9c6efadf8b4..a091ad10c213 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1664,6 +1664,9 @@ struct intel_dp {
 
 	/* When we last wrote the OUI for eDP */
 	unsigned long last_oui_write;
+
+	/* protects panel power sequencer state */
+	struct mutex pps_mutex;
 };
 
 enum lspcon_vendor {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b5e2508db1cf..a1ef497de773 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5089,6 +5089,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
 	intel_dp->reset_link_params = true;
 	intel_dp->pps.pps_pipe = INVALID_PIPE;
 	intel_dp->pps.active_pipe = INVALID_PIPE;
+	mutex_init(&intel_dp->pps_mutex);
 
 	/* Preserve the current hw state. */
 	intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg);
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index e9c679bb1b2e..f6e86a17ea48 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -27,7 +27,7 @@ intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp)
 	 * See intel_pps_reset_all() why we need a power domain reference here.
 	 */
 	wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
-	mutex_lock(&dev_priv->pps_mutex);
+	mutex_lock(&intel_dp->pps_mutex);
 
 	return wakeref;
 }
@@ -37,7 +37,7 @@ intel_wakeref_t intel_pps_unlock(struct intel_dp *intel_dp,
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-	mutex_unlock(&dev_priv->pps_mutex);
+	mutex_unlock(&intel_dp->pps_mutex);
 	intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
 
 	return 0;
@@ -162,7 +162,7 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp)
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 	enum pipe pipe;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	/* We should never land here with regular DP ports */
 	drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp));
@@ -210,7 +210,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	int backlight_controller = dev_priv->vbt.backlight.controller;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	/* We should never land here with regular DP ports */
 	drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp));
@@ -280,7 +280,7 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 	enum port port = dig_port->base.port;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	/* try to find a pipe with this port selected */
 	/* first pick one where the panel is on */
@@ -359,7 +359,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
 				    struct pps_registers *regs)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	int pps_idx = 0;
+	int pps_idx = dp_to_dig_port(intel_dp)->base.port;
 
 	memset(regs, 0, sizeof(*regs));
 
@@ -405,7 +405,7 @@ static bool edp_have_panel_power(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
 	    intel_dp->pps.pps_pipe == INVALID_PIPE)
@@ -418,7 +418,7 @@ static bool edp_have_panel_vdd(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
 	    intel_dp->pps.pps_pipe == INVALID_PIPE)
@@ -461,7 +461,7 @@ static void wait_panel_status(struct intel_dp *intel_dp,
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	i915_reg_t pp_stat_reg, pp_ctrl_reg;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	intel_pps_verify_state(intel_dp);
 
@@ -554,7 +554,7 @@ static  u32 ilk_get_pp_control(struct intel_dp *intel_dp)
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	u32 control;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	control = intel_de_read(dev_priv, _pp_ctrl_reg(intel_dp));
 	if (drm_WARN_ON(&dev_priv->drm, !HAS_DDI(dev_priv) &&
@@ -578,7 +578,7 @@ bool intel_pps_vdd_on_unlocked(struct intel_dp *intel_dp)
 	i915_reg_t pp_stat_reg, pp_ctrl_reg;
 	bool need_to_disable = !intel_dp->pps.want_panel_vdd;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	if (!intel_dp_is_edp(intel_dp))
 		return false;
@@ -655,7 +655,7 @@ static void intel_pps_vdd_off_sync_unlocked(struct intel_dp *intel_dp)
 	u32 pp;
 	i915_reg_t pp_stat_reg, pp_ctrl_reg;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.want_panel_vdd);
 
@@ -737,9 +737,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
  */
 void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync)
 {
-	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	if (!intel_dp_is_edp(intel_dp))
 		return;
@@ -762,7 +760,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
 	u32 pp;
 	i915_reg_t pp_ctrl_reg;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	if (!intel_dp_is_edp(intel_dp))
 		return;
@@ -823,7 +821,7 @@ void intel_pps_off_unlocked(struct intel_dp *intel_dp)
 	u32 pp;
 	i915_reg_t pp_ctrl_reg;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	if (!intel_dp_is_edp(intel_dp))
 		return;
@@ -982,11 +980,10 @@ static void vlv_steal_power_sequencer(struct drm_i915_private *dev_priv,
 {
 	struct intel_encoder *encoder;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
-
 	for_each_intel_dp(&dev_priv->drm, encoder) {
 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
+		lockdep_assert_held(&intel_dp->pps_mutex);
 		drm_WARN(&dev_priv->drm, intel_dp->pps.active_pipe == pipe,
 			 "stealing pipe %c power sequencer from active [ENCODER:%d:%s]\n",
 			 pipe_name(pipe), encoder->base.base.id,
@@ -1012,7 +1009,7 @@ void vlv_pps_init(struct intel_encoder *encoder,
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.active_pipe != INVALID_PIPE);
 
@@ -1055,7 +1052,7 @@ static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	if (!edp_have_panel_vdd(intel_dp))
 		return;
@@ -1160,7 +1157,7 @@ static void pps_init_delays(struct intel_dp *intel_dp)
 	struct edp_power_seq cur, vbt, spec,
 		*final = &intel_dp->pps.pps_delays;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	/* already initialized? */
 	if (final->t11_t12 != 0)
@@ -1258,7 +1255,7 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd
 	enum port port = dp_to_dig_port(intel_dp)->base.port;
 	const struct edp_power_seq *seq = &intel_dp->pps.pps_delays;
 
-	lockdep_assert_held(&dev_priv->pps_mutex);
+	lockdep_assert_held(&intel_dp->pps_mutex);
 
 	intel_pps_get_registers(intel_dp, &regs);
 
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 95174938b160..9e337e4216d7 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -327,7 +327,6 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
 
 	mutex_init(&dev_priv->audio.mutex);
 	mutex_init(&dev_priv->wm.wm_mutex);
-	mutex_init(&dev_priv->pps_mutex);
 	mutex_init(&dev_priv->hdcp_comp_mutex);
 
 	i915_memcpy_init_early(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 471be2716abe..4680e1c84985 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -749,9 +749,6 @@ struct drm_i915_private {
 	/* backlight registers and fields in struct intel_panel */
 	struct mutex backlight_lock;
 
-	/* protects panel power sequencer state */
-	struct mutex pps_mutex;
-
 	unsigned int fsb_freq, mem_freq, is_ddr3;
 	unsigned int skl_preferred_vco_freq;
 	unsigned int max_cdclk_freq;
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: pps_lock moved to encoder to support dual EDP
  2021-12-20  6:35 [Intel-gfx] [PATCH] drm/i915: pps_lock moved to encoder to support dual EDP Animesh Manna
@ 2021-12-20  7:12 ` Patchwork
  2021-12-20  7:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2021-12-20  7:12 UTC (permalink / raw)
  To: Animesh Manna; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: pps_lock moved to encoder to support dual EDP
URL   : https://patchwork.freedesktop.org/series/98221/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.



^ permalink raw reply	[flat|nested] 5+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: pps_lock moved to encoder to support dual EDP
  2021-12-20  6:35 [Intel-gfx] [PATCH] drm/i915: pps_lock moved to encoder to support dual EDP Animesh Manna
  2021-12-20  7:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
@ 2021-12-20  7:46 ` Patchwork
  2021-12-20 21:26 ` [Intel-gfx] [PATCH] " Ville Syrjälä
  2021-12-21  6:56 ` Jani Nikula
  3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2021-12-20  7:46 UTC (permalink / raw)
  To: Animesh Manna; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 9906 bytes --]

== Series Details ==

Series: drm/i915: pps_lock moved to encoder to support dual EDP
URL   : https://patchwork.freedesktop.org/series/98221/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11014 -> Patchwork_21877
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_21877 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21877, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/index.html

Participating hosts (41 -> 33)
------------------------------

  Additional (3): fi-bxt-dsi fi-bdw-5557u fi-tgl-u2 
  Missing    (11): fi-kbl-soraka bat-dg1-6 bat-dg1-5 fi-skl-guc fi-icl-u2 fi-bsw-cyan bat-adlp-6 fi-ivb-3770 fi-pnv-d510 bat-jsl-2 fi-bdw-samus 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_21877:

### IGT changes ###

#### Possible regressions ####

  * igt@runner@aborted:
    - fi-bsw-kefka:       NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bsw-kefka/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_21877 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@semaphore:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][2] ([fdo#109271]) +31 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html

  * igt@gem_huc_copy@huc-copy:
    - fi-tgl-u2:          NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-tgl-u2/igt@gem_huc_copy@huc-copy.html
    - fi-bxt-dsi:         NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bxt-dsi/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@verify-random:
    - fi-tgl-u2:          NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-tgl-u2/igt@gem_lmem_swapping@verify-random.html
    - fi-bxt-dsi:         NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bxt-dsi/igt@gem_lmem_swapping@verify-random.html

  * igt@i915_selftest@live@execlists:
    - fi-bsw-n3050:       [PASS][7] -> [INCOMPLETE][8] ([i915#2940])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11014/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bsw-n3050/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [PASS][9] -> [INCOMPLETE][10] ([i915#3303])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11014/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
    - fi-snb-2600:        [PASS][11] -> [INCOMPLETE][12] ([i915#3921])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11014/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][13] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bxt-dsi/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html
    - fi-bsw-nick:        NOTRUN -> [SKIP][15] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bsw-nick/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_chamelium@dp-hpd-fast:
    - fi-tgl-u2:          NOTRUN -> [SKIP][16] ([fdo#109284] / [fdo#111827]) +8 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-tgl-u2/igt@kms_chamelium@dp-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-tgl-u2:          NOTRUN -> [SKIP][17] ([i915#4103]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-tgl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][18] ([fdo#109271]) +30 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bxt-dsi/igt@kms_force_connector_basic@force-load-detect.html
    - fi-tgl-u2:          NOTRUN -> [SKIP][19] ([fdo#109285])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-tgl-u2/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#533])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bxt-dsi/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@primary_page_flip:
    - fi-skl-6600u:       [PASS][21] -> [FAIL][22] ([i915#4547])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11014/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-skl-6600u/igt@kms_psr@primary_page_flip.html

  * igt@prime_vgem@basic-fence-flip:
    - fi-bsw-nick:        NOTRUN -> [SKIP][23] ([fdo#109271]) +62 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bsw-nick/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-userptr:
    - fi-tgl-u2:          NOTRUN -> [SKIP][24] ([i915#3301])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-tgl-u2/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-skl-6600u:       NOTRUN -> [FAIL][25] ([i915#4312])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-skl-6600u/igt@runner@aborted.html
    - fi-hsw-4770:        NOTRUN -> [FAIL][26] ([fdo#109271] / [i915#1436] / [i915#4312])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-hsw-4770/igt@runner@aborted.html
    - fi-bsw-n3050:       NOTRUN -> [FAIL][27] ([fdo#109271] / [i915#1436] / [i915#3428] / [i915#4312])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bsw-n3050/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@gem_ctx_exec@basic:
    - fi-bsw-nick:        [DMESG-WARN][28] ([i915#3428]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11014/fi-bsw-nick/igt@gem_ctx_exec@basic.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-bsw-nick/igt@gem_ctx_exec@basic.html

  * igt@i915_selftest@live@gem_contexts:
    - {fi-tgl-dsi}:       [INCOMPLETE][30] ([i915#402]) -> [PASS][31]
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11014/fi-tgl-dsi/igt@i915_selftest@live@gem_contexts.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-tgl-dsi/igt@i915_selftest@live@gem_contexts.html

  * igt@i915_selftest@live@hugepages:
    - {fi-tgl-dsi}:       [INCOMPLETE][32] -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11014/fi-tgl-dsi/igt@i915_selftest@live@hugepages.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/fi-tgl-dsi/igt@i915_selftest@live@hugepages.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Build changes
-------------

  * Linux: CI_DRM_11014 -> Patchwork_21877

  CI-20190529: 20190529
  CI_DRM_11014: c4f095f24fcdc6e85ae112052b3034328e24ae66 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6313: 1793ed798cc09966c27bf478781e0c1d6bb23bad @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21877: 1be3eab2eac96a6bd3be6de49f12f134ea0e146c @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

1be3eab2eac9 drm/i915: pps_lock moved to encoder to support dual EDP

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21877/index.html

[-- Attachment #2: Type: text/html, Size: 12257 bytes --]

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915: pps_lock moved to encoder to support dual EDP
  2021-12-20  6:35 [Intel-gfx] [PATCH] drm/i915: pps_lock moved to encoder to support dual EDP Animesh Manna
  2021-12-20  7:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
  2021-12-20  7:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2021-12-20 21:26 ` Ville Syrjälä
  2021-12-21  6:56 ` Jani Nikula
  3 siblings, 0 replies; 5+ messages in thread
From: Ville Syrjälä @ 2021-12-20 21:26 UTC (permalink / raw)
  To: Animesh Manna; +Cc: jani.nikula, intel-gfx

On Mon, Dec 20, 2021 at 12:05:40PM +0530, Animesh Manna wrote:
> Currently dev_priv->pps_lock is used for locking mechanism and one
> instance of pps registers are used for pps register programming.
> Second instance enabled as per port number and pps_lock is moved
> under encoder.

Nak. Please read commit e39b999a6f22 ("drm/i915: Fix edp vdd locking")

> 
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  .../drm/i915/display/intel_display_types.h    |  3 ++
>  drivers/gpu/drm/i915/display/intel_dp.c       |  1 +
>  drivers/gpu/drm/i915/display/intel_pps.c      | 43 +++++++++----------
>  drivers/gpu/drm/i915/i915_driver.c            |  1 -
>  drivers/gpu/drm/i915/i915_drv.h               |  3 --
>  5 files changed, 24 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index c9c6efadf8b4..a091ad10c213 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1664,6 +1664,9 @@ struct intel_dp {
>  
>  	/* When we last wrote the OUI for eDP */
>  	unsigned long last_oui_write;
> +
> +	/* protects panel power sequencer state */
> +	struct mutex pps_mutex;
>  };
>  
>  enum lspcon_vendor {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index b5e2508db1cf..a1ef497de773 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5089,6 +5089,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
>  	intel_dp->reset_link_params = true;
>  	intel_dp->pps.pps_pipe = INVALID_PIPE;
>  	intel_dp->pps.active_pipe = INVALID_PIPE;
> +	mutex_init(&intel_dp->pps_mutex);
>  
>  	/* Preserve the current hw state. */
>  	intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg);
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index e9c679bb1b2e..f6e86a17ea48 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -27,7 +27,7 @@ intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp)
>  	 * See intel_pps_reset_all() why we need a power domain reference here.
>  	 */
>  	wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
> -	mutex_lock(&dev_priv->pps_mutex);
> +	mutex_lock(&intel_dp->pps_mutex);
>  
>  	return wakeref;
>  }
> @@ -37,7 +37,7 @@ intel_wakeref_t intel_pps_unlock(struct intel_dp *intel_dp,
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  
> -	mutex_unlock(&dev_priv->pps_mutex);
> +	mutex_unlock(&intel_dp->pps_mutex);
>  	intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
>  
>  	return 0;
> @@ -162,7 +162,7 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp)
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	enum pipe pipe;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	/* We should never land here with regular DP ports */
>  	drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp));
> @@ -210,7 +210,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	int backlight_controller = dev_priv->vbt.backlight.controller;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	/* We should never land here with regular DP ports */
>  	drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp));
> @@ -280,7 +280,7 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	enum port port = dig_port->base.port;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	/* try to find a pipe with this port selected */
>  	/* first pick one where the panel is on */
> @@ -359,7 +359,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
>  				    struct pps_registers *regs)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	int pps_idx = 0;
> +	int pps_idx = dp_to_dig_port(intel_dp)->base.port;
>  
>  	memset(regs, 0, sizeof(*regs));
>  
> @@ -405,7 +405,7 @@ static bool edp_have_panel_power(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
>  	    intel_dp->pps.pps_pipe == INVALID_PIPE)
> @@ -418,7 +418,7 @@ static bool edp_have_panel_vdd(struct intel_dp *intel_dp)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
>  	    intel_dp->pps.pps_pipe == INVALID_PIPE)
> @@ -461,7 +461,7 @@ static void wait_panel_status(struct intel_dp *intel_dp,
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	i915_reg_t pp_stat_reg, pp_ctrl_reg;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	intel_pps_verify_state(intel_dp);
>  
> @@ -554,7 +554,7 @@ static  u32 ilk_get_pp_control(struct intel_dp *intel_dp)
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	u32 control;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	control = intel_de_read(dev_priv, _pp_ctrl_reg(intel_dp));
>  	if (drm_WARN_ON(&dev_priv->drm, !HAS_DDI(dev_priv) &&
> @@ -578,7 +578,7 @@ bool intel_pps_vdd_on_unlocked(struct intel_dp *intel_dp)
>  	i915_reg_t pp_stat_reg, pp_ctrl_reg;
>  	bool need_to_disable = !intel_dp->pps.want_panel_vdd;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	if (!intel_dp_is_edp(intel_dp))
>  		return false;
> @@ -655,7 +655,7 @@ static void intel_pps_vdd_off_sync_unlocked(struct intel_dp *intel_dp)
>  	u32 pp;
>  	i915_reg_t pp_stat_reg, pp_ctrl_reg;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.want_panel_vdd);
>  
> @@ -737,9 +737,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
>   */
>  void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync)
>  {
> -	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
> @@ -762,7 +760,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
>  	u32 pp;
>  	i915_reg_t pp_ctrl_reg;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
> @@ -823,7 +821,7 @@ void intel_pps_off_unlocked(struct intel_dp *intel_dp)
>  	u32 pp;
>  	i915_reg_t pp_ctrl_reg;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
> @@ -982,11 +980,10 @@ static void vlv_steal_power_sequencer(struct drm_i915_private *dev_priv,
>  {
>  	struct intel_encoder *encoder;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> -
>  	for_each_intel_dp(&dev_priv->drm, encoder) {
>  		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  
> +		lockdep_assert_held(&intel_dp->pps_mutex);
>  		drm_WARN(&dev_priv->drm, intel_dp->pps.active_pipe == pipe,
>  			 "stealing pipe %c power sequencer from active [ENCODER:%d:%s]\n",
>  			 pipe_name(pipe), encoder->base.base.id,
> @@ -1012,7 +1009,7 @@ void vlv_pps_init(struct intel_encoder *encoder,
>  	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	drm_WARN_ON(&dev_priv->drm, intel_dp->pps.active_pipe != INVALID_PIPE);
>  
> @@ -1055,7 +1052,7 @@ static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	if (!edp_have_panel_vdd(intel_dp))
>  		return;
> @@ -1160,7 +1157,7 @@ static void pps_init_delays(struct intel_dp *intel_dp)
>  	struct edp_power_seq cur, vbt, spec,
>  		*final = &intel_dp->pps.pps_delays;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	/* already initialized? */
>  	if (final->t11_t12 != 0)
> @@ -1258,7 +1255,7 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd
>  	enum port port = dp_to_dig_port(intel_dp)->base.port;
>  	const struct edp_power_seq *seq = &intel_dp->pps.pps_delays;
>  
> -	lockdep_assert_held(&dev_priv->pps_mutex);
> +	lockdep_assert_held(&intel_dp->pps_mutex);
>  
>  	intel_pps_get_registers(intel_dp, &regs);
>  
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 95174938b160..9e337e4216d7 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -327,7 +327,6 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
>  
>  	mutex_init(&dev_priv->audio.mutex);
>  	mutex_init(&dev_priv->wm.wm_mutex);
> -	mutex_init(&dev_priv->pps_mutex);
>  	mutex_init(&dev_priv->hdcp_comp_mutex);
>  
>  	i915_memcpy_init_early(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 471be2716abe..4680e1c84985 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -749,9 +749,6 @@ struct drm_i915_private {
>  	/* backlight registers and fields in struct intel_panel */
>  	struct mutex backlight_lock;
>  
> -	/* protects panel power sequencer state */
> -	struct mutex pps_mutex;
> -
>  	unsigned int fsb_freq, mem_freq, is_ddr3;
>  	unsigned int skl_preferred_vco_freq;
>  	unsigned int max_cdclk_freq;
> -- 
> 2.29.0

-- 
Ville Syrjälä
Intel

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915: pps_lock moved to encoder to support dual EDP
  2021-12-20  6:35 [Intel-gfx] [PATCH] drm/i915: pps_lock moved to encoder to support dual EDP Animesh Manna
                   ` (2 preceding siblings ...)
  2021-12-20 21:26 ` [Intel-gfx] [PATCH] " Ville Syrjälä
@ 2021-12-21  6:56 ` Jani Nikula
  3 siblings, 0 replies; 5+ messages in thread
From: Jani Nikula @ 2021-12-21  6:56 UTC (permalink / raw)
  To: Animesh Manna, intel-gfx

On Mon, 20 Dec 2021, Animesh Manna <animesh.manna@intel.com> wrote:
> @@ -359,7 +359,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
>  				    struct pps_registers *regs)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	int pps_idx = 0;
> +	int pps_idx = dp_to_dig_port(intel_dp)->base.port;

I thought we get the index to use from VBT, both for PPS and backlight.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2021-12-21  6:56 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-12-20  6:35 [Intel-gfx] [PATCH] drm/i915: pps_lock moved to encoder to support dual EDP Animesh Manna
2021-12-20  7:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for " Patchwork
2021-12-20  7:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-12-20 21:26 ` [Intel-gfx] [PATCH] " Ville Syrjälä
2021-12-21  6:56 ` Jani Nikula

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