From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Clear the whole first page of LRC on gen9
Date: Tue, 21 Jan 2020 15:44:22 +0200 [thread overview]
Message-ID: <87lfq0q5zd.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20200118105217.3484773-1-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Try clearing the whole first page of the LRC on gen9, just in case HW
First page of LRC is a bit misleading as this is first page of
LRC registers and techincally first page of LRC would be hwsp?
So,
s/LRC/LRC register state
> tries peeking at the poisoned data.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 2d6b41e66b16..bf0c5a998428 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -549,7 +549,7 @@ static void set_offsets(u32 *regs,
> }
>
> if (clear) {
> - u8 count = *++data;
> + unsigned int count = *++data * 16u;
Nitpick: const
>
> /* Clear past the tail for HW access */
> GEM_BUG_ON(dword_in_page(regs) > count);
You might want to add also check that you dont write past page.
As this seems to be always confined inside a page.
No other complaints, and above are minor so
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> @@ -594,7 +594,7 @@ static const u8 gen8_xcs_offsets[] = {
> REG16(0x200),
> REG(0x028),
>
> - END(80)
> + END(5)
> };
>
> static const u8 gen9_xcs_offsets[] = {
> @@ -678,7 +678,7 @@ static const u8 gen9_xcs_offsets[] = {
> REG16(0x67c),
> REG(0x068),
>
> - END(176)
> + END(64)
> };
>
> static const u8 gen12_xcs_offsets[] = {
> @@ -710,7 +710,7 @@ static const u8 gen12_xcs_offsets[] = {
> REG16(0x274),
> REG16(0x270),
>
> - END(80)
> + END(5)
> };
>
> static const u8 gen8_rcs_offsets[] = {
> @@ -747,7 +747,7 @@ static const u8 gen8_rcs_offsets[] = {
> LRI(1, 0),
> REG(0x0c8),
>
> - END(80)
> + END(5)
> };
>
> static const u8 gen9_rcs_offsets[] = {
> @@ -831,7 +831,7 @@ static const u8 gen9_rcs_offsets[] = {
> REG16(0x67c),
> REG(0x68),
>
> - END(176)
> + END(64)
> };
>
> static const u8 gen11_rcs_offsets[] = {
> @@ -872,7 +872,7 @@ static const u8 gen11_rcs_offsets[] = {
> LRI(1, 0),
> REG(0x0c8),
>
> - END(80)
> + END(5)
> };
>
> static const u8 gen12_rcs_offsets[] = {
> @@ -913,7 +913,7 @@ static const u8 gen12_rcs_offsets[] = {
> LRI(1, 0),
> REG(0x0c8),
>
> - END(80)
> + END(5)
> };
>
> #undef END
> --
> 2.25.0
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next prev parent reply other threads:[~2020-01-21 13:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-18 10:52 [Intel-gfx] [PATCH] drm/i915/gt: Clear the whole first page of LRC on gen9 Chris Wilson
2020-01-18 11:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-01-18 11:50 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-20 21:52 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-01-21 13:44 ` Mika Kuoppala [this message]
2020-01-21 13:50 ` [Intel-gfx] [PATCH] " Chris Wilson
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