From: "Gupta, Anshuman" <anshuman.gupta@intel.com>
To: "Huang, Sean Z" <sean.z.huang@intel.com>,
"Intel-gfx@lists.freedesktop.org"
<Intel-gfx@lists.freedesktop.org>,
"Nikula, Jani" <jani.nikula@intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: "Vetter, Daniel" <daniel.vetter@intel.com>,
"Gaurav, Kumar" <kumar.gaurav@intel.com>,
"Bommu, Krishnaiah" <krishnaiah.bommu@intel.com>
Subject: Re: [Intel-gfx] [RFC-v23 13/13] drm/i915/pxp: Add plane decryption support
Date: Tue, 19 Jan 2021 09:35:18 +0000 [thread overview]
Message-ID: <9babc226536544f7aa7ec98e80de4b21@intel.com> (raw)
In-Reply-To: <20210119074320.28768-14-sean.z.huang@intel.com>
Jani/Ville
I had received an offline comment form Gaurav on this patch,
See below,
> -----Original Message-----
> From: Huang, Sean Z <sean.z.huang@intel.com>
> Sent: Tuesday, January 19, 2021 1:13 PM
> To: Intel-gfx@lists.freedesktop.org
> Cc: Gaurav, Kumar <kumar.gaurav@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>; Bommu, Krishnaiah
> <krishnaiah.bommu@intel.com>; Huang, Sean Z <sean.z.huang@intel.com>
> Subject: [RFC-v23 13/13] drm/i915/pxp: Add plane decryption support
>
> From: Anshuman Gupta <anshuman.gupta@intel.com>
>
> Add support to enable/disable PLANE_SURF Decryption Request bit.
> It requires only to enable plane decryption support when following
> condition met.
> 1. PXP session is enabled.
> 2. Buffer object is protected.
>
> v2:
> - Rebased to libva_cp-drm-tip_tgl_cp tree.
> - Used gen fb obj user_flags instead gem_object_metadata. [Krishna]
>
> v3:
> - intel_pxp_gem_object_status() API changes.
>
> Cc: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> Cc: Huang Sean Z <sean.z.huang@intel.com>
> Cc: Gaurav Kumar <kumar.gaurav@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_sprite.c | 21 ++++++++++++++++++---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
> b/drivers/gpu/drm/i915/display/intel_sprite.c
> index cf3589fd0ddb..39f8c922ce66 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -39,6 +39,8 @@
> #include <drm/drm_plane_helper.h>
> #include <drm/drm_rect.h>
>
> +#include "pxp/intel_pxp.h"
> +
> #include "i915_drv.h"
> #include "i915_trace.h"
> #include "i915_vgpu.h"
> @@ -768,6 +770,11 @@ icl_program_input_csc(struct intel_plane *plane,
> PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2),
> 0x0); }
>
> +static bool intel_fb_obj_protected(const struct drm_i915_gem_object
> +*obj) {
> + return obj->user_flags & I915_BO_PROTECTED ? true : false; }
> +
> static void
> skl_plane_async_flip(struct intel_plane *plane,
> const struct intel_crtc_state *crtc_state, @@ -804,6
> +811,7 @@ skl_program_plane(struct intel_plane *plane,
> u32 surf_addr = plane_state->color_plane[color_plane].offset;
> u32 stride = skl_plane_stride(plane_state, color_plane);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> + const struct drm_i915_gem_object *obj = intel_fb_obj(fb);
> int aux_plane = intel_main_to_aux_plane(fb, color_plane);
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_y = plane_state->uapi.dst.y1; @@ -814,7 +822,7 @@
> skl_program_plane(struct intel_plane *plane,
> u8 alpha = plane_state->hw.alpha >> 8;
> u32 plane_color_ctl = 0, aux_dist = 0;
> unsigned long irqflags;
> - u32 keymsk, keymax;
> + u32 keymsk, keymax, plane_surf;
> u32 plane_ctl = plane_state->ctl;
>
> plane_ctl |= skl_plane_ctl_crtc(crtc_state); @@ -890,8 +898,15
> @@ skl_program_plane(struct intel_plane *plane,
> * the control register just before the surface register.
> */
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> - intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> - intel_plane_ggtt_offset(plane_state) + surf_addr);
> + plane_surf = intel_plane_ggtt_offset(plane_state) + surf_addr;
> +
> + if (intel_pxp_gem_object_status(dev_priv) &&
> + intel_fb_obj_protected(obj))
> + plane_surf |= PLANE_SURF_DECRYPTION_ENABLED;
Here in case of if fb obj is protected but pxp session is not enabled i.e intel_pxp_gem_object_status() returns false, request to show the black frame buffer on display instead of corrupted data.
plane_surf = 0xXXX; //Pointer to black framebuffer
But above approach would be a hack.
@Jani and @Ville could you please guide with the general way of handling this as pxp session keys can be invalidated at any time.
Thanks,
Anshuman Gupta.
> + else
> + plane_surf &= ~PLANE_SURF_DECRYPTION_ENABLED;
> +
> + intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> plane_surf);
>
> if (plane_state->scaler_id >= 0)
> skl_program_scaler(plane, crtc_state, plane_state); diff --git
> a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 97bcecada87f..7a4817054bc8 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7208,6 +7208,7 @@ enum {
> #define _PLANE_SURF_3(pipe) _PIPE(pipe, _PLANE_SURF_3_A,
> _PLANE_SURF_3_B)
> #define PLANE_SURF(pipe, plane) \
> _MMIO_PLANE(plane, _PLANE_SURF_1(pipe),
> _PLANE_SURF_2(pipe))
> +#define PLANE_SURF_DECRYPTION_ENABLED REG_BIT(2)
>
> #define _PLANE_OFFSET_1_B 0x711a4
> #define _PLANE_OFFSET_2_B 0x712a4
> --
> 2.17.1
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next prev parent reply other threads:[~2021-01-19 9:35 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-19 7:43 [Intel-gfx] [RFC-v23 00/13] Introduce Intel PXP component - Mesa single session Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 01/13] drm/i915/pxp: Introduce Intel PXP component Huang, Sean Z
2021-01-21 16:08 ` Chris Wilson
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 02/13] drm/i915/pxp: set KCR reg init during the boot time Huang, Sean Z
2021-01-21 17:04 ` Chris Wilson
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 03/13] drm/i915/pxp: Implement funcs to create the TEE channel Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 04/13] drm/i915/pxp: Create the arbitrary session after boot Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 05/13] drm/i915/pxp: Func to send hardware session termination Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 06/13] drm/i915/pxp: Enable PXP irq worker and callback stub Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 07/13] drm/i915/pxp: Destroy arb session upon teardown Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 08/13] drm/i915/pxp: Enable PXP power management Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 09/13] drm/i915/pxp: Expose session state for display protection flip Huang, Sean Z
2021-01-21 19:47 ` Rodrigo Vivi
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 10/13] mei: pxp: export pavp client to me client bus Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 11/13] drm/i915/uapi: introduce drm_i915_gem_create_ext Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 12/13] drm/i915/pxp: User interface for Protected buffer Huang, Sean Z
2021-01-19 7:43 ` [Intel-gfx] [RFC-v23 13/13] drm/i915/pxp: Add plane decryption support Huang, Sean Z
2021-01-19 9:35 ` Gupta, Anshuman [this message]
2021-01-21 20:30 ` Ville Syrjälä
2021-01-21 20:50 ` Gaurav, Kumar
2021-01-21 21:00 ` Ville Syrjälä
2021-01-21 21:34 ` Gaurav, Kumar
2021-01-22 11:58 ` Ville Syrjälä
2021-01-22 17:25 ` Gaurav, Kumar
2021-01-19 12:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Intel PXP component - Mesa single session (rev23) Patchwork
2021-01-19 13:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-01-23 14:18 ` [Intel-gfx] [RFC-v23 00/13] Introduce Intel PXP component - Mesa single session Lionel Landwerlin
2021-01-23 21:47 ` Gaurav, Kumar
2021-01-25 15:38 ` Lionel Landwerlin
2021-01-25 16:22 ` Gaurav, Kumar
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