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* [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
@ 2023-03-17  5:52 Tejas Upadhyay
  2023-03-17  8:22 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
                   ` (4 more replies)
  0 siblings, 5 replies; 12+ messages in thread
From: Tejas Upadhyay @ 2023-03-17  5:52 UTC (permalink / raw)
  To: Intel-GFX

In order to make igt_live_test work in proper
way, we need to consider multi-gt in all tests
where igt_live_test is used as well as at other
random places where multi-gt should be considered.

Cc: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 13 ++--
 .../drm/i915/gem/selftests/i915_gem_context.c | 28 ++++----
 drivers/gpu/drm/i915/gt/intel_engine_user.c   |  2 +-
 drivers/gpu/drm/i915/gt/selftest_execlists.c  | 68 +++++++++----------
 drivers/gpu/drm/i915/selftests/i915_request.c | 36 +++++-----
 .../gpu/drm/i915/selftests/igt_live_test.c    | 10 +--
 .../gpu/drm/i915/selftests/igt_live_test.h    |  4 +-
 7 files changed, 81 insertions(+), 80 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 9dce2957b4e5..289b75ac39e1 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2449,9 +2449,9 @@ static int eb_submit(struct i915_execbuffer *eb)
 	return err;
 }
 
-static int num_vcs_engines(struct drm_i915_private *i915)
+static int num_vcs_engines(struct intel_gt *gt)
 {
-	return hweight_long(VDBOX_MASK(to_gt(i915)));
+	return hweight_long(VDBOX_MASK(gt));
 }
 
 /*
@@ -2459,7 +2459,7 @@ static int num_vcs_engines(struct drm_i915_private *i915)
  * The engine index is returned.
  */
 static unsigned int
-gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,
+gen8_dispatch_bsd_engine(struct intel_gt *gt,
 			 struct drm_file *file)
 {
 	struct drm_i915_file_private *file_priv = file->driver_priv;
@@ -2467,7 +2467,7 @@ gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,
 	/* Check whether the file_priv has already selected one ring. */
 	if ((int)file_priv->bsd_engine < 0)
 		file_priv->bsd_engine =
-			get_random_u32_below(num_vcs_engines(dev_priv));
+			get_random_u32_below(num_vcs_engines(gt));
 
 	return file_priv->bsd_engine;
 }
@@ -2644,6 +2644,7 @@ static unsigned int
 eb_select_legacy_ring(struct i915_execbuffer *eb)
 {
 	struct drm_i915_private *i915 = eb->i915;
+	struct intel_gt *gt = eb->gt;
 	struct drm_i915_gem_execbuffer2 *args = eb->args;
 	unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;
 
@@ -2655,11 +2656,11 @@ eb_select_legacy_ring(struct i915_execbuffer *eb)
 		return -1;
 	}
 
-	if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) {
+	if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(gt) > 1) {
 		unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK;
 
 		if (bsd_idx == I915_EXEC_BSD_DEFAULT) {
-			bsd_idx = gen8_dispatch_bsd_engine(i915, eb->file);
+			bsd_idx = gen8_dispatch_bsd_engine(gt, eb->file);
 		} else if (bsd_idx >= I915_EXEC_BSD_RING1 &&
 			   bsd_idx <= I915_EXEC_BSD_RING2) {
 			bsd_idx >>= I915_EXEC_BSD_SHIFT;
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index a81fa6a20f5a..b2695aab54e5 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -93,7 +93,7 @@ static int live_nop_switch(void *arg)
 		}
 		if (i915_request_wait(rq, 0, 10 * HZ) < 0) {
 			pr_err("Failed to populated %d contexts\n", nctx);
-			intel_gt_set_wedged(to_gt(i915));
+			intel_gt_set_wedged(engine->gt);
 			i915_request_put(rq);
 			err = -EIO;
 			goto out_file;
@@ -105,7 +105,7 @@ static int live_nop_switch(void *arg)
 		pr_info("Populated %d contexts on %s in %lluns\n",
 			nctx, engine->name, ktime_to_ns(times[1] - times[0]));
 
-		err = igt_live_test_begin(&t, i915, __func__, engine->name);
+		err = igt_live_test_begin(&t, engine->gt, __func__, engine->name);
 		if (err)
 			goto out_file;
 
@@ -149,7 +149,7 @@ static int live_nop_switch(void *arg)
 			if (i915_request_wait(rq, 0, HZ / 5) < 0) {
 				pr_err("Switching between %ld contexts timed out\n",
 				       prime);
-				intel_gt_set_wedged(to_gt(i915));
+				intel_gt_set_wedged(engine->gt);
 				i915_request_put(rq);
 				break;
 			}
@@ -163,7 +163,7 @@ static int live_nop_switch(void *arg)
 				break;
 		}
 
-		err = igt_live_test_end(&t);
+		err = igt_live_test_end(&t, engine->gt);
 		if (err)
 			goto out_file;
 
@@ -376,7 +376,7 @@ static int live_parallel_switch(void *arg)
 	for (fn = func; !err && *fn; fn++) {
 		struct igt_live_test t;
 
-		err = igt_live_test_begin(&t, i915, __func__, "");
+		err = igt_live_test_begin(&t, to_gt(i915), __func__, "");
 		if (err)
 			break;
 
@@ -397,7 +397,7 @@ static int live_parallel_switch(void *arg)
 			}
 		}
 
-		if (igt_live_test_end(&t))
+		if (igt_live_test_end(&t, to_gt(i915)))
 			err = -EIO;
 	}
 
@@ -682,7 +682,7 @@ static int igt_ctx_exec(void *arg)
 		if (IS_ERR(file))
 			return PTR_ERR(file);
 
-		err = igt_live_test_begin(&t, i915, __func__, engine->name);
+		err = igt_live_test_begin(&t, engine->gt, __func__, engine->name);
 		if (err)
 			goto out_file;
 
@@ -760,7 +760,7 @@ static int igt_ctx_exec(void *arg)
 
 out_file:
 		throttle_release(tq, ARRAY_SIZE(tq));
-		if (igt_live_test_end(&t))
+		if (igt_live_test_end(&t, engine->gt))
 			err = -EIO;
 
 		fput(file);
@@ -806,7 +806,7 @@ static int igt_shared_ctx_exec(void *arg)
 		goto out_file;
 	}
 
-	err = igt_live_test_begin(&t, i915, __func__, "");
+	err = igt_live_test_begin(&t, to_gt(i915), __func__, "");
 	if (err)
 		goto out_file;
 
@@ -895,7 +895,7 @@ static int igt_shared_ctx_exec(void *arg)
 	}
 out_test:
 	throttle_release(tq, ARRAY_SIZE(tq));
-	if (igt_live_test_end(&t))
+	if (igt_live_test_end(&t, to_gt(i915)))
 		err = -EIO;
 out_file:
 	fput(file);
@@ -1382,7 +1382,7 @@ static int igt_ctx_readonly(void *arg)
 	if (IS_ERR(file))
 		return PTR_ERR(file);
 
-	err = igt_live_test_begin(&t, i915, __func__, "");
+	err = igt_live_test_begin(&t, to_gt(i915), __func__, "");
 	if (err)
 		goto out_file;
 
@@ -1472,7 +1472,7 @@ static int igt_ctx_readonly(void *arg)
 
 out_file:
 	throttle_release(tq, ARRAY_SIZE(tq));
-	if (igt_live_test_end(&t))
+	if (igt_live_test_end(&t, to_gt(i915)))
 		err = -EIO;
 
 	fput(file);
@@ -1785,7 +1785,7 @@ static int igt_vm_isolation(void *arg)
 	if (IS_ERR(file))
 		return PTR_ERR(file);
 
-	err = igt_live_test_begin(&t, i915, __func__, "");
+	err = igt_live_test_begin(&t, to_gt(i915), __func__, "");
 	if (err)
 		goto out_file;
 
@@ -1882,7 +1882,7 @@ static int igt_vm_isolation(void *arg)
 put_a:
 	i915_gem_object_put(obj_a);
 out_file:
-	if (igt_live_test_end(&t))
+	if (igt_live_test_end(&t, to_gt(i915)))
 		err = -EIO;
 	fput(file);
 	return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index cd4f1b126f75..dcedff41a825 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -117,7 +117,7 @@ static void set_scheduler_caps(struct drm_i915_private *i915)
 			disabled |= (I915_SCHEDULER_CAP_ENABLED |
 				     I915_SCHEDULER_CAP_PRIORITY);
 
-		if (intel_uc_uses_guc_submission(&to_gt(i915)->uc))
+		if (intel_uc_uses_guc_submission(&engine->gt->uc))
 			enabled |= I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP;
 
 		for (i = 0; i < ARRAY_SIZE(map); i++) {
diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c b/drivers/gpu/drm/i915/gt/selftest_execlists.c
index 736b89a8ecf5..4384d466a632 100644
--- a/drivers/gpu/drm/i915/gt/selftest_execlists.c
+++ b/drivers/gpu/drm/i915/gt/selftest_execlists.c
@@ -189,7 +189,7 @@ static int live_unlite_restore(struct intel_gt *gt, int prio)
 		if (!intel_engine_can_store_dword(engine))
 			continue;
 
-		if (igt_live_test_begin(&t, gt->i915, __func__, engine->name)) {
+		if (igt_live_test_begin(&t, gt, __func__, engine->name)) {
 			err = -EIO;
 			break;
 		}
@@ -302,7 +302,7 @@ static int live_unlite_restore(struct intel_gt *gt, int prio)
 		}
 
 		st_engine_heartbeat_enable(engine);
-		if (igt_live_test_end(&t))
+		if (igt_live_test_end(&t, gt))
 			err = -EIO;
 		if (err)
 			break;
@@ -351,7 +351,7 @@ static int live_unlite_ring(void *arg)
 		if (!intel_engine_can_store_dword(engine))
 			continue;
 
-		if (igt_live_test_begin(&t, gt->i915, __func__, engine->name)) {
+		if (igt_live_test_begin(&t, gt, __func__, engine->name)) {
 			err = -EIO;
 			break;
 		}
@@ -462,7 +462,7 @@ static int live_unlite_ring(void *arg)
 			intel_context_put(ce[n]);
 		}
 		st_engine_heartbeat_enable(engine);
-		if (igt_live_test_end(&t))
+		if (igt_live_test_end(&t, gt))
 			err = -EIO;
 		if (err)
 			break;
@@ -494,7 +494,7 @@ static int live_pin_rewind(void *arg)
 		struct intel_ring *ring;
 		struct igt_live_test t;
 
-		if (igt_live_test_begin(&t, gt->i915, __func__, engine->name)) {
+		if (igt_live_test_begin(&t, gt, __func__, engine->name)) {
 			err = -EIO;
 			break;
 		}
@@ -541,7 +541,7 @@ static int live_pin_rewind(void *arg)
 		i915_request_add(rq);
 
 		/* Expect not to hang! */
-		if (igt_live_test_end(&t)) {
+		if (igt_live_test_end(&t, gt)) {
 			err = -EIO;
 			break;
 		}
@@ -1585,7 +1585,7 @@ static int live_busywait_preempt(void *arg)
 		if (!intel_engine_can_store_dword(engine))
 			continue;
 
-		if (igt_live_test_begin(&t, gt->i915, __func__, engine->name)) {
+		if (igt_live_test_begin(&t, gt, __func__, engine->name)) {
 			err = -EIO;
 			goto err_vma;
 		}
@@ -1687,7 +1687,7 @@ static int live_busywait_preempt(void *arg)
 		GEM_BUG_ON(READ_ONCE(*map));
 		i915_request_put(lo);
 
-		if (igt_live_test_end(&t)) {
+		if (igt_live_test_end(&t, gt)) {
 			err = -EIO;
 			goto err_vma;
 		}
@@ -1757,7 +1757,7 @@ static int live_preempt(void *arg)
 		if (!intel_engine_has_preemption(engine))
 			continue;
 
-		if (igt_live_test_begin(&t, gt->i915, __func__, engine->name)) {
+		if (igt_live_test_begin(&t, gt, __func__, engine->name)) {
 			err = -EIO;
 			goto err_spin_lo;
 		}
@@ -1798,7 +1798,7 @@ static int live_preempt(void *arg)
 		igt_spinner_end(&spin_hi);
 		igt_spinner_end(&spin_lo);
 
-		if (igt_live_test_end(&t)) {
+		if (igt_live_test_end(&t, gt)) {
 			err = -EIO;
 			goto err_spin_lo;
 		}
@@ -1850,7 +1850,7 @@ static int live_late_preempt(void *arg)
 		if (!intel_engine_has_preemption(engine))
 			continue;
 
-		if (igt_live_test_begin(&t, gt->i915, __func__, engine->name)) {
+		if (igt_live_test_begin(&t, gt, __func__, engine->name)) {
 			err = -EIO;
 			goto err_spin_lo;
 		}
@@ -1894,7 +1894,7 @@ static int live_late_preempt(void *arg)
 		igt_spinner_end(&spin_hi);
 		igt_spinner_end(&spin_lo);
 
-		if (igt_live_test_end(&t)) {
+		if (igt_live_test_end(&t, gt)) {
 			err = -EIO;
 			goto err_spin_lo;
 		}
@@ -2057,7 +2057,7 @@ static int __cancel_active0(struct live_preempt_cancel *arg)
 
 	/* Preempt cancel of ELSP0 */
 	GEM_TRACE("%s(%s)\n", __func__, arg->engine->name);
-	if (igt_live_test_begin(&t, arg->engine->i915,
+	if (igt_live_test_begin(&t, arg->engine->gt,
 				__func__, arg->engine->name))
 		return -EIO;
 
@@ -2088,7 +2088,7 @@ static int __cancel_active0(struct live_preempt_cancel *arg)
 
 out:
 	i915_request_put(rq);
-	if (igt_live_test_end(&t))
+	if (igt_live_test_end(&t, arg->engine->gt))
 		err = -EIO;
 	return err;
 }
@@ -2101,7 +2101,7 @@ static int __cancel_active1(struct live_preempt_cancel *arg)
 
 	/* Preempt cancel of ELSP1 */
 	GEM_TRACE("%s(%s)\n", __func__, arg->engine->name);
-	if (igt_live_test_begin(&t, arg->engine->i915,
+	if (igt_live_test_begin(&t, arg->engine->gt,
 				__func__, arg->engine->name))
 		return -EIO;
 
@@ -2159,7 +2159,7 @@ static int __cancel_active1(struct live_preempt_cancel *arg)
 out:
 	i915_request_put(rq[1]);
 	i915_request_put(rq[0]);
-	if (igt_live_test_end(&t))
+	if (igt_live_test_end(&t, arg->engine->gt))
 		err = -EIO;
 	return err;
 }
@@ -2172,7 +2172,7 @@ static int __cancel_queued(struct live_preempt_cancel *arg)
 
 	/* Full ELSP and one in the wings */
 	GEM_TRACE("%s(%s)\n", __func__, arg->engine->name);
-	if (igt_live_test_begin(&t, arg->engine->i915,
+	if (igt_live_test_begin(&t, arg->engine->gt,
 				__func__, arg->engine->name))
 		return -EIO;
 
@@ -2254,7 +2254,7 @@ static int __cancel_queued(struct live_preempt_cancel *arg)
 	i915_request_put(rq[2]);
 	i915_request_put(rq[1]);
 	i915_request_put(rq[0]);
-	if (igt_live_test_end(&t))
+	if (igt_live_test_end(&t, arg->engine->gt))
 		err = -EIO;
 	return err;
 }
@@ -2599,7 +2599,7 @@ static int live_chain_preempt(void *arg)
 		}
 		i915_request_put(rq);
 
-		if (igt_live_test_begin(&t, gt->i915, __func__, engine->name)) {
+		if (igt_live_test_begin(&t, gt, __func__, engine->name)) {
 			err = -EIO;
 			goto err_wedged;
 		}
@@ -2673,7 +2673,7 @@ static int live_chain_preempt(void *arg)
 			i915_request_put(rq);
 		}
 
-		if (igt_live_test_end(&t)) {
+		if (igt_live_test_end(&t, gt)) {
 			err = -EIO;
 			goto err_wedged;
 		}
@@ -2799,7 +2799,7 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
 	int err = 0;
 	int n;
 
-	if (igt_live_test_begin(&t, engine->i915, __func__, engine->name))
+	if (igt_live_test_begin(&t, engine->gt, __func__, engine->name))
 		return -EIO;
 
 	for (n = 0; n < ARRAY_SIZE(ce); n++) {
@@ -2902,7 +2902,7 @@ static int __live_preempt_ring(struct intel_engine_cs *engine,
 		intel_context_unpin(ce[n]);
 		intel_context_put(ce[n]);
 	}
-	if (igt_live_test_end(&t))
+	if (igt_live_test_end(&t, engine->gt))
 		err = -EIO;
 	return err;
 }
@@ -2978,7 +2978,7 @@ static int live_preempt_gang(void *arg)
 		if (!intel_engine_has_preemption(engine))
 			continue;
 
-		if (igt_live_test_begin(&t, gt->i915, __func__, engine->name))
+		if (igt_live_test_begin(&t, gt, __func__, engine->name))
 			return -EIO;
 
 		do {
@@ -3030,7 +3030,7 @@ static int live_preempt_gang(void *arg)
 			rq = n;
 		}
 
-		if (igt_live_test_end(&t))
+		if (igt_live_test_end(&t, gt))
 			err = -EIO;
 		if (err)
 			return err;
@@ -3284,7 +3284,7 @@ static int live_preempt_user(void *arg)
 		if (GRAPHICS_VER(gt->i915) == 8 && engine->class != RENDER_CLASS)
 			continue; /* we need per-context GPR */
 
-		if (igt_live_test_begin(&t, gt->i915, __func__, engine->name)) {
+		if (igt_live_test_begin(&t, gt, __func__, engine->name)) {
 			err = -EIO;
 			break;
 		}
@@ -3347,7 +3347,7 @@ static int live_preempt_user(void *arg)
 
 		/* Flush the semaphores on error */
 		smp_store_mb(result[0], -1);
-		if (igt_live_test_end(&t))
+		if (igt_live_test_end(&t, gt))
 			err = -EIO;
 		if (err)
 			break;
@@ -3665,7 +3665,7 @@ static int live_preempt_smoke(void *arg)
 	i915_gem_object_flush_map(smoke.batch);
 	i915_gem_object_unpin_map(smoke.batch);
 
-	if (igt_live_test_begin(&t, smoke.gt->i915, __func__, "all")) {
+	if (igt_live_test_begin(&t, smoke.gt, __func__, "all")) {
 		err = -EIO;
 		goto err_batch;
 	}
@@ -3687,7 +3687,7 @@ static int live_preempt_smoke(void *arg)
 	}
 
 err_ctx:
-	if (igt_live_test_end(&t))
+	if (igt_live_test_end(&t, smoke.gt))
 		err = -EIO;
 
 	for (n = 0; n < smoke.ncontext; n++) {
@@ -3737,7 +3737,7 @@ static int nop_virtual_engine(struct intel_gt *gt,
 		}
 	}
 
-	err = igt_live_test_begin(&t, gt->i915, __func__, ve[0]->engine->name);
+	err = igt_live_test_begin(&t, gt, __func__, ve[0]->engine->name);
 	if (err)
 		goto out;
 
@@ -3810,7 +3810,7 @@ static int nop_virtual_engine(struct intel_gt *gt,
 			break;
 	}
 
-	err = igt_live_test_end(&t);
+	err = igt_live_test_end(&t, gt);
 	if (err)
 		goto out;
 
@@ -3928,7 +3928,7 @@ static int mask_virtual_engine(struct intel_gt *gt,
 	if (err)
 		goto out_put;
 
-	err = igt_live_test_begin(&t, gt->i915, __func__, ve->engine->name);
+	err = igt_live_test_begin(&t, gt, __func__, ve->engine->name);
 	if (err)
 		goto out_unpin;
 
@@ -3973,7 +3973,7 @@ static int mask_virtual_engine(struct intel_gt *gt,
 		}
 	}
 
-	err = igt_live_test_end(&t);
+	err = igt_live_test_end(&t, gt);
 out:
 	if (igt_flush_test(gt->i915))
 		err = -EIO;
@@ -4213,7 +4213,7 @@ static int preserved_virtual_engine(struct intel_gt *gt,
 	if (err)
 		goto out_put;
 
-	err = igt_live_test_begin(&t, gt->i915, __func__, ve->engine->name);
+	err = igt_live_test_begin(&t, gt, __func__, ve->engine->name);
 	if (err)
 		goto out_unpin;
 
@@ -4277,7 +4277,7 @@ static int preserved_virtual_engine(struct intel_gt *gt,
 	i915_gem_object_unpin_map(scratch->obj);
 
 out_end:
-	if (igt_live_test_end(&t))
+	if (igt_live_test_end(&t, gt))
 		err = -EIO;
 	i915_request_put(last);
 out_unpin:
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
index a9b79888c193..8f71c4bd66d9 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -582,7 +582,7 @@ static int live_nop_request(void *arg)
 		IGT_TIMEOUT(end_time);
 		ktime_t times[2] = {};
 
-		err = igt_live_test_begin(&t, i915, __func__, engine->name);
+		err = igt_live_test_begin(&t, engine->gt, __func__, engine->name);
 		if (err)
 			return err;
 
@@ -627,7 +627,7 @@ static int live_nop_request(void *arg)
 		}
 		intel_engine_pm_put(engine);
 
-		err = igt_live_test_end(&t);
+		err = igt_live_test_end(&t, engine->gt);
 		if (err)
 			return err;
 
@@ -929,7 +929,7 @@ static int live_cancel_request(void *arg)
 		if (!intel_engine_has_preemption(engine))
 			continue;
 
-		err = igt_live_test_begin(&t, i915, __func__, engine->name);
+		err = igt_live_test_begin(&t, engine->gt, __func__, engine->name);
 		if (err)
 			return err;
 
@@ -939,7 +939,7 @@ static int live_cancel_request(void *arg)
 		if (err == 0)
 			err = __cancel_completed(engine);
 
-		err2 = igt_live_test_end(&t);
+		err2 = igt_live_test_end(&t, engine->gt);
 		if (err)
 			return err;
 		if (err2)
@@ -1058,7 +1058,7 @@ static int live_empty_request(void *arg)
 		if (IS_ERR(batch))
 			return PTR_ERR(batch);
 
-		err = igt_live_test_begin(&t, i915, __func__, engine->name);
+		err = igt_live_test_begin(&t, engine->gt, __func__, engine->name);
 		if (err)
 			goto out_batch;
 
@@ -1097,7 +1097,7 @@ static int live_empty_request(void *arg)
 		i915_request_put(request);
 		intel_engine_pm_put(engine);
 
-		err = igt_live_test_end(&t);
+		err = igt_live_test_end(&t, engine->gt);
 		if (err)
 			goto out_batch;
 
@@ -1206,7 +1206,7 @@ static int live_all_engines(void *arg)
 	if (!request)
 		return -ENOMEM;
 
-	err = igt_live_test_begin(&t, i915, __func__, "");
+	err = igt_live_test_begin(&t, to_gt(i915), __func__, "");
 	if (err)
 		goto out_free;
 
@@ -1292,7 +1292,7 @@ static int live_all_engines(void *arg)
 		idx++;
 	}
 
-	err = igt_live_test_end(&t);
+	err = igt_live_test_end(&t, to_gt(i915));
 
 out_request:
 	idx = 0;
@@ -1336,7 +1336,7 @@ static int live_sequential_engines(void *arg)
 	if (!request)
 		return -ENOMEM;
 
-	err = igt_live_test_begin(&t, i915, __func__, "");
+	err = igt_live_test_begin(&t, to_gt(i915), __func__, "");
 	if (err)
 		goto out_free;
 
@@ -1423,7 +1423,7 @@ static int live_sequential_engines(void *arg)
 		idx++;
 	}
 
-	err = igt_live_test_end(&t);
+	err = igt_live_test_end(&t, to_gt(i915));
 
 out_request:
 	idx = 0;
@@ -1635,7 +1635,7 @@ static int live_parallel_engines(void *arg)
 		unsigned int idx;
 
 		snprintf(name, sizeof(name), "%ps", *fn);
-		err = igt_live_test_begin(&t, i915, __func__, name);
+		err = igt_live_test_begin(&t, to_gt(i915), __func__, name);
 		if (err)
 			break;
 
@@ -1676,7 +1676,7 @@ static int live_parallel_engines(void *arg)
 			kthread_destroy_worker(threads[idx++].worker);
 		}
 
-		if (igt_live_test_end(&t))
+		if (igt_live_test_end(&t, to_gt(i915)))
 			err = -EIO;
 	}
 
@@ -1783,7 +1783,7 @@ static int live_breadcrumbs_smoketest(void *arg)
 		}
 	}
 
-	ret = igt_live_test_begin(&live, i915, __func__, "");
+	ret = igt_live_test_begin(&live, to_gt(i915), __func__, "");
 	if (ret)
 		goto out_contexts;
 
@@ -1853,7 +1853,7 @@ static int live_breadcrumbs_smoketest(void *arg)
 	pr_info("Completed %lu waits for %lu fences across %d engines and %d cpus\n",
 		num_waits, num_fences, idx, ncpus);
 
-	ret = igt_live_test_end(&live) ?: ret;
+	ret = igt_live_test_end(&live, to_gt(i915)) ?: ret;
 out_contexts:
 	kfree(smoke[0].contexts);
 out_threads:
@@ -2877,7 +2877,7 @@ static int perf_series_engines(void *arg)
 		struct igt_live_test t;
 
 		snprintf(name, sizeof(name), "%ps", *fn);
-		err = igt_live_test_begin(&t, i915, __func__, name);
+		err = igt_live_test_begin(&t, to_gt(i915), __func__, name);
 		if (err)
 			break;
 
@@ -2898,7 +2898,7 @@ static int perf_series_engines(void *arg)
 		}
 
 		err = (*fn)(ps);
-		if (igt_live_test_end(&t))
+		if (igt_live_test_end(&t, to_gt(i915)))
 			err = -EIO;
 
 		for (idx = 0; idx < nengines; idx++) {
@@ -3205,7 +3205,7 @@ static int perf_parallel_engines(void *arg)
 		unsigned int idx;
 
 		snprintf(name, sizeof(name), "%ps", *fn);
-		err = igt_live_test_begin(&t, i915, __func__, name);
+		err = igt_live_test_begin(&t, to_gt(i915), __func__, name);
 		if (err)
 			break;
 
@@ -3254,7 +3254,7 @@ static int perf_parallel_engines(void *arg)
 			idx++;
 		}
 
-		if (igt_live_test_end(&t))
+		if (igt_live_test_end(&t, to_gt(i915)))
 			err = -EIO;
 		if (err)
 			break;
diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.c b/drivers/gpu/drm/i915/selftests/igt_live_test.c
index 72b58b66692a..0e7a16962549 100644
--- a/drivers/gpu/drm/i915/selftests/igt_live_test.c
+++ b/drivers/gpu/drm/i915/selftests/igt_live_test.c
@@ -12,11 +12,11 @@
 #include "igt_live_test.h"
 
 int igt_live_test_begin(struct igt_live_test *t,
-			struct drm_i915_private *i915,
+			struct intel_gt *gt,
 			const char *func,
 			const char *name)
 {
-	struct intel_gt *gt = to_gt(i915);
+	struct drm_i915_private *i915 = gt->i915;
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
 	int err;
@@ -41,9 +41,9 @@ int igt_live_test_begin(struct igt_live_test *t,
 	return 0;
 }
 
-int igt_live_test_end(struct igt_live_test *t)
+int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt)
 {
-	struct drm_i915_private *i915 = t->i915;
+	struct drm_i915_private *i915 = gt->i915;
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
 
@@ -57,7 +57,7 @@ int igt_live_test_end(struct igt_live_test *t)
 		return -EIO;
 	}
 
-	for_each_engine(engine, to_gt(i915), id) {
+	for_each_engine(engine, gt, id) {
 		if (t->reset_engine[id] ==
 		    i915_reset_engine_count(&i915->gpu_error, engine))
 			continue;
diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.h b/drivers/gpu/drm/i915/selftests/igt_live_test.h
index 36ed42736c52..209b0548c603 100644
--- a/drivers/gpu/drm/i915/selftests/igt_live_test.h
+++ b/drivers/gpu/drm/i915/selftests/igt_live_test.h
@@ -27,9 +27,9 @@ struct igt_live_test {
  * e.g. if the GPU was reset.
  */
 int igt_live_test_begin(struct igt_live_test *t,
-			struct drm_i915_private *i915,
+			struct intel_gt *gt,
 			const char *func,
 			const char *name);
-int igt_live_test_end(struct igt_live_test *t);
+int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt);
 
 #endif /* IGT_LIVE_TEST_H */
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Consider multi-gt at all places
  2023-03-17  5:52 [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places Tejas Upadhyay
@ 2023-03-17  8:22 ` Patchwork
  2023-03-17  9:16 ` [Intel-gfx] [PATCH] " Tvrtko Ursulin
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-03-17  8:22 UTC (permalink / raw)
  To: Tejas Upadhyay; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 15444 bytes --]

== Series Details ==

Series: drm/i915/gt: Consider multi-gt at all places
URL   : https://patchwork.freedesktop.org/series/115302/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12873 -> Patchwork_115302v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_115302v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_115302v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/index.html

Participating hosts (35 -> 36)
------------------------------

  Additional (2): bat-atsm-1 bat-dg1-6 
  Missing    (1): fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_115302v1:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_suspend@basic-s0@smem:
    - bat-jsl-3:          NOTRUN -> [ABORT][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-jsl-3/igt@gem_exec_suspend@basic-s0@smem.html
    - fi-kbl-8809g:       [PASS][2] -> [ABORT][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/fi-kbl-8809g/igt@gem_exec_suspend@basic-s0@smem.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-kbl-8809g/igt@gem_exec_suspend@basic-s0@smem.html
    - fi-bsw-nick:        NOTRUN -> [ABORT][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-bsw-nick/igt@gem_exec_suspend@basic-s0@smem.html
    - fi-bsw-n3050:       NOTRUN -> [ABORT][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-bsw-n3050/igt@gem_exec_suspend@basic-s0@smem.html

  * igt@gem_exec_suspend@basic-s3@smem:
    - bat-dg1-5:          [PASS][6] -> [ABORT][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-dg1-5/igt@gem_exec_suspend@basic-s3@smem.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-5/igt@gem_exec_suspend@basic-s3@smem.html
    - bat-dg1-7:          [PASS][8] -> [ABORT][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-dg1-7/igt@gem_exec_suspend@basic-s3@smem.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-7/igt@gem_exec_suspend@basic-s3@smem.html
    - fi-kbl-7567u:       [PASS][10] -> [ABORT][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/fi-kbl-7567u/igt@gem_exec_suspend@basic-s3@smem.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-kbl-7567u/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@gem_huc_copy@huc-copy:
    - bat-adln-1:         [PASS][12] -> [FAIL][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-adln-1/igt@gem_huc_copy@huc-copy.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-adln-1/igt@gem_huc_copy@huc-copy.html
    - bat-dg2-8:          [PASS][14] -> [FAIL][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-dg2-8/igt@gem_huc_copy@huc-copy.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg2-8/igt@gem_huc_copy@huc-copy.html
    - fi-kbl-guc:         [PASS][16] -> [FAIL][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/fi-kbl-guc/igt@gem_huc_copy@huc-copy.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-kbl-guc/igt@gem_huc_copy@huc-copy.html
    - bat-adlm-1:         [PASS][18] -> [FAIL][19]
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-adlm-1/igt@gem_huc_copy@huc-copy.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-adlm-1/igt@gem_huc_copy@huc-copy.html
    - bat-rplp-1:         [PASS][20] -> [FAIL][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-rplp-1/igt@gem_huc_copy@huc-copy.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-rplp-1/igt@gem_huc_copy@huc-copy.html
    - fi-cfl-guc:         [PASS][22] -> [FAIL][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/fi-cfl-guc/igt@gem_huc_copy@huc-copy.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-cfl-guc/igt@gem_huc_copy@huc-copy.html
    - bat-rpls-1:         [PASS][24] -> [FAIL][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-rpls-1/igt@gem_huc_copy@huc-copy.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-rpls-1/igt@gem_huc_copy@huc-copy.html
    - bat-adls-5:         [PASS][26] -> [FAIL][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-adls-5/igt@gem_huc_copy@huc-copy.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-adls-5/igt@gem_huc_copy@huc-copy.html
    - bat-atsm-1:         NOTRUN -> [FAIL][28]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-atsm-1/igt@gem_huc_copy@huc-copy.html
    - bat-dg1-7:          [PASS][29] -> [FAIL][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-dg1-7/igt@gem_huc_copy@huc-copy.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-7/igt@gem_huc_copy@huc-copy.html
    - bat-adlp-9:         [PASS][31] -> [FAIL][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-adlp-9/igt@gem_huc_copy@huc-copy.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-adlp-9/igt@gem_huc_copy@huc-copy.html
    - fi-skl-guc:         [PASS][33] -> [FAIL][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/fi-skl-guc/igt@gem_huc_copy@huc-copy.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-skl-guc/igt@gem_huc_copy@huc-copy.html

  * igt@gem_ringfill@basic-all:
    - bat-rpls-1:         [PASS][35] -> [ABORT][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-rpls-1/igt@gem_ringfill@basic-all.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-rpls-1/igt@gem_ringfill@basic-all.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_suspend@basic-s3@smem:
    - {bat-kbl-2}:        [PASS][37] -> [ABORT][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-kbl-2/igt@gem_exec_suspend@basic-s3@smem.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-kbl-2/igt@gem_exec_suspend@basic-s3@smem.html

  
Known issues
------------

  Here are the changes found in Patchwork_115302v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@eof:
    - bat-atsm-1:         NOTRUN -> [SKIP][39] ([i915#2582]) +4 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-atsm-1/igt@fbdev@eof.html

  * igt@gem_exec_suspend@basic-s0@lmem0:
    - bat-dg1-6:          NOTRUN -> [ABORT][40] ([i915#6311])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@gem_exec_suspend@basic-s0@lmem0.html

  * igt@gem_mmap@basic:
    - bat-atsm-1:         NOTRUN -> [SKIP][41] ([i915#4083])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-atsm-1/igt@gem_mmap@basic.html
    - bat-dg1-6:          NOTRUN -> [SKIP][42] ([i915#4083])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@gem_mmap@basic.html

  * igt@gem_render_tiled_blits@basic:
    - bat-dg1-6:          NOTRUN -> [SKIP][43] ([i915#4079]) +1 similar issue
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@gem_render_tiled_blits@basic.html

  * igt@gem_sync@basic-each:
    - bat-atsm-1:         NOTRUN -> [FAIL][44] ([i915#8062]) +1 similar issue
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-atsm-1/igt@gem_sync@basic-each.html

  * igt@gem_tiled_fence_blits@basic:
    - bat-dg1-6:          NOTRUN -> [SKIP][45] ([i915#4077]) +2 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@gem_tiled_fence_blits@basic.html
    - bat-atsm-1:         NOTRUN -> [SKIP][46] ([i915#4077]) +2 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-atsm-1/igt@gem_tiled_fence_blits@basic.html

  * igt@gem_tiled_pread_basic:
    - bat-atsm-1:         NOTRUN -> [SKIP][47] ([i915#4079]) +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-atsm-1/igt@gem_tiled_pread_basic.html

  * igt@i915_hangman@error-state-basic:
    - bat-atsm-1:         NOTRUN -> [ABORT][48] ([i915#8060])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-atsm-1/igt@i915_hangman@error-state-basic.html

  * igt@i915_pm_backlight@basic-brightness:
    - bat-dg1-6:          NOTRUN -> [SKIP][49] ([i915#7561])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_pm_rps@basic-api:
    - bat-dg1-6:          NOTRUN -> [SKIP][50] ([i915#6621])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@i915_pm_rps@basic-api.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-dg1-6:          NOTRUN -> [SKIP][51] ([i915#4215])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_addfb_basic@tile-pitch-mismatch:
    - bat-dg1-6:          NOTRUN -> [SKIP][52] ([i915#4212]) +7 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@kms_addfb_basic@tile-pitch-mismatch.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - bat-dg1-6:          NOTRUN -> [SKIP][53] ([i915#7828]) +7 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - bat-dg1-6:          NOTRUN -> [SKIP][54] ([i915#4103] / [i915#4213]) +1 similar issue
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-dg1-6:          NOTRUN -> [SKIP][55] ([fdo#109285])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_psr@sprite_plane_onoff:
    - bat-dg1-6:          NOTRUN -> [SKIP][56] ([i915#1072] / [i915#4078]) +3 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-dg1-6:          NOTRUN -> [SKIP][57] ([i915#3555])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-gtt:
    - bat-dg1-6:          NOTRUN -> [SKIP][58] ([i915#3708] / [i915#4077]) +1 similar issue
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@prime_vgem@basic-gtt.html

  * igt@prime_vgem@basic-read:
    - bat-dg1-6:          NOTRUN -> [SKIP][59] ([i915#3708]) +3 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@prime_vgem@basic-read.html

  * igt@prime_vgem@basic-userptr:
    - bat-dg1-6:          NOTRUN -> [SKIP][60] ([i915#3708] / [i915#4873])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-dg1-6/igt@prime_vgem@basic-userptr.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@execlists:
    - fi-bsw-n3050:       [ABORT][61] ([i915#7911]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
    - fi-bsw-nick:        [ABORT][63] ([i915#7911] / [i915#7913]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/fi-bsw-nick/igt@i915_selftest@live@execlists.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-bsw-nick/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@gem_contexts:
    - bat-jsl-3:          [INCOMPLETE][65] -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/bat-jsl-3/igt@i915_selftest@live@gem_contexts.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/bat-jsl-3/igt@i915_selftest@live@gem_contexts.html

  * igt@i915_selftest@live@hangcheck:
    - fi-skl-guc:         [DMESG-WARN][67] ([i915#8073]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12873/fi-skl-guc/igt@i915_selftest@live@hangcheck.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/fi-skl-guc/igt@i915_selftest@live@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#6311]: https://gitlab.freedesktop.org/drm/intel/issues/6311
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#8060]: https://gitlab.freedesktop.org/drm/intel/issues/8060
  [i915#8062]: https://gitlab.freedesktop.org/drm/intel/issues/8062
  [i915#8073]: https://gitlab.freedesktop.org/drm/intel/issues/8073


Build changes
-------------

  * Linux: CI_DRM_12873 -> Patchwork_115302v1

  CI-20190529: 20190529
  CI_DRM_12873: b97925f47e2a20e1b79bc7c8cc236ded1bd431df @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7202: b4ec7dac375eed2dda89c64d4de94c4c9205b601 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_115302v1: b97925f47e2a20e1b79bc7c8cc236ded1bd431df @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

54f4eb107e35 drm/i915/gt: Consider multi-gt at all places

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_115302v1/index.html

[-- Attachment #2: Type: text/html, Size: 17580 bytes --]

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
  2023-03-17  5:52 [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places Tejas Upadhyay
  2023-03-17  8:22 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
@ 2023-03-17  9:16 ` Tvrtko Ursulin
  2023-03-21 23:33   ` Andi Shyti
  2023-04-05  6:56   ` Upadhyay, Tejas
  2023-03-20  0:24 ` Andi Shyti
                   ` (2 subsequent siblings)
  4 siblings, 2 replies; 12+ messages in thread
From: Tvrtko Ursulin @ 2023-03-17  9:16 UTC (permalink / raw)
  To: Tejas Upadhyay, Intel-GFX


On 17/03/2023 05:52, Tejas Upadhyay wrote:
> In order to make igt_live_test work in proper
> way, we need to consider multi-gt in all tests
> where igt_live_test is used as well as at other
> random places where multi-gt should be considered.

Description is a bit vague - is this for Meteorlake in general? What is 
the "proper way" ie what is broken?

> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
> ---
>   .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 13 ++--
>   .../drm/i915/gem/selftests/i915_gem_context.c | 28 ++++----
>   drivers/gpu/drm/i915/gt/intel_engine_user.c   |  2 +-
>   drivers/gpu/drm/i915/gt/selftest_execlists.c  | 68 +++++++++----------
>   drivers/gpu/drm/i915/selftests/i915_request.c | 36 +++++-----
>   .../gpu/drm/i915/selftests/igt_live_test.c    | 10 +--
>   .../gpu/drm/i915/selftests/igt_live_test.h    |  4 +-
>   7 files changed, 81 insertions(+), 80 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 9dce2957b4e5..289b75ac39e1 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -2449,9 +2449,9 @@ static int eb_submit(struct i915_execbuffer *eb)
>   	return err;
>   }
>   
> -static int num_vcs_engines(struct drm_i915_private *i915)
> +static int num_vcs_engines(struct intel_gt *gt)
>   {
> -	return hweight_long(VDBOX_MASK(to_gt(i915)));
> +	return hweight_long(VDBOX_MASK(gt));
>   }
>   
>   /*
> @@ -2459,7 +2459,7 @@ static int num_vcs_engines(struct drm_i915_private *i915)
>    * The engine index is returned.
>    */
>   static unsigned int
> -gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,
> +gen8_dispatch_bsd_engine(struct intel_gt *gt,
>   			 struct drm_file *file)
>   {
>   	struct drm_i915_file_private *file_priv = file->driver_priv;
> @@ -2467,7 +2467,7 @@ gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,
>   	/* Check whether the file_priv has already selected one ring. */
>   	if ((int)file_priv->bsd_engine < 0)
>   		file_priv->bsd_engine =
> -			get_random_u32_below(num_vcs_engines(dev_priv));
> +			get_random_u32_below(num_vcs_engines(gt));
>   
>   	return file_priv->bsd_engine;
>   }
> @@ -2644,6 +2644,7 @@ static unsigned int
>   eb_select_legacy_ring(struct i915_execbuffer *eb)
>   {
>   	struct drm_i915_private *i915 = eb->i915;
> +	struct intel_gt *gt = eb->gt;
>   	struct drm_i915_gem_execbuffer2 *args = eb->args;
>   	unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;
>   
> @@ -2655,11 +2656,11 @@ eb_select_legacy_ring(struct i915_execbuffer *eb)
>   		return -1;
>   	}
>   
> -	if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) {
> +	if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(gt) > 1) {
>   		unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK;
>   
>   		if (bsd_idx == I915_EXEC_BSD_DEFAULT) {
> -			bsd_idx = gen8_dispatch_bsd_engine(i915, eb->file);
> +			bsd_idx = gen8_dispatch_bsd_engine(gt, eb->file);
>   		} else if (bsd_idx >= I915_EXEC_BSD_RING1 &&
>   			   bsd_idx <= I915_EXEC_BSD_RING2) {
>   			bsd_idx >>= I915_EXEC_BSD_SHIFT;

The hunks above I don't think are correct. Execbuf is in principle based 
on uabi engines, and that is not a per GT concept.

There is also no functional change above so I can only guess it is a 
prep work for something?

[snip]

> -int igt_live_test_end(struct igt_live_test *t)
> +int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt)
>   {
> -	struct drm_i915_private *i915 = t->i915;
> +	struct drm_i915_private *i915 = gt->i915;
>   	struct intel_engine_cs *engine;
>   	enum intel_engine_id id;
>   
> @@ -57,7 +57,7 @@ int igt_live_test_end(struct igt_live_test *t)
>   		return -EIO;
>   	}
>   
> -	for_each_engine(engine, to_gt(i915), id) {
> +	for_each_engine(engine, gt, id) {
>   		if (t->reset_engine[id] ==
>   		    i915_reset_engine_count(&i915->gpu_error, engine))
>   			continue;
> diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.h b/drivers/gpu/drm/i915/selftests/igt_live_test.h
> index 36ed42736c52..209b0548c603 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_live_test.h
> +++ b/drivers/gpu/drm/i915/selftests/igt_live_test.h
> @@ -27,9 +27,9 @@ struct igt_live_test {
>    * e.g. if the GPU was reset.
>    */
>   int igt_live_test_begin(struct igt_live_test *t,
> -			struct drm_i915_private *i915,
> +			struct intel_gt *gt,
>   			const char *func,
>   			const char *name);
> -int igt_live_test_end(struct igt_live_test *t);
> +int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt);

Back in the day the plan was that live selftests are device focused and 
then we also have intel_gt_live_subtests, which are obviously GT 
focused. So in that sense adding a single GT parameter to 
igt_live_test_begin isn't something I immediately understand.

Could you explain in one or two practical examples what is not working 
properly and how is this patch fixing it?

Regards,

Tvrtko

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
  2023-03-17  5:52 [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places Tejas Upadhyay
  2023-03-17  8:22 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
  2023-03-17  9:16 ` [Intel-gfx] [PATCH] " Tvrtko Ursulin
@ 2023-03-20  0:24 ` Andi Shyti
  2023-03-21 13:51 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev2) Patchwork
  2023-04-17 20:40 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev3) Patchwork
  4 siblings, 0 replies; 12+ messages in thread
From: Andi Shyti @ 2023-03-20  0:24 UTC (permalink / raw)
  To: Tejas Upadhyay; +Cc: Intel-GFX

Hi Tejas,

On Fri, Mar 17, 2023 at 11:22:39AM +0530, Tejas Upadhyay wrote:
> In order to make igt_live_test work in proper
> way, we need to consider multi-gt in all tests
> where igt_live_test is used as well as at other
> random places where multi-gt should be considered.
> 
> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>

Everything looks good, but many things could potentially go wrong
when changing i915 to gt. I would like to see some positive
results from the CI before proceeding.

I will take care of resubmitting the tests once CI is back from
holiday.

Thanks Tejas,
Andi

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev2)
  2023-03-17  5:52 [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places Tejas Upadhyay
                   ` (2 preceding siblings ...)
  2023-03-20  0:24 ` Andi Shyti
@ 2023-03-21 13:51 ` Patchwork
  2023-03-21 23:24   ` Andi Shyti
  2023-04-17 20:40 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev3) Patchwork
  4 siblings, 1 reply; 12+ messages in thread
From: Patchwork @ 2023-03-21 13:51 UTC (permalink / raw)
  To: Tejas Upadhyay; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gt: Consider multi-gt at all places (rev2)
URL   : https://patchwork.freedesktop.org/series/115302/
State : failure

== Summary ==

Error: patch https://patchwork.freedesktop.org/api/1.0/series/115302/revisions/2/mbox/ not applied
Applying: drm/i915/gt: Consider multi-gt at all places
Using index info to reconstruct a base tree...
M	drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 drm/i915/gt: Consider multi-gt at all places
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced



^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx]  ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev2)
  2023-03-21 13:51 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev2) Patchwork
@ 2023-03-21 23:24   ` Andi Shyti
  0 siblings, 0 replies; 12+ messages in thread
From: Andi Shyti @ 2023-03-21 23:24 UTC (permalink / raw)
  To: intel-gfx

Hi Tejas,

On Tue, Mar 21, 2023 at 01:51:36PM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/gt: Consider multi-gt at all places (rev2)
> URL   : https://patchwork.freedesktop.org/series/115302/
> State : failure
> 
> == Summary ==
> 
> Error: patch https://patchwork.freedesktop.org/api/1.0/series/115302/revisions/2/mbox/ not applied
> Applying: drm/i915/gt: Consider multi-gt at all places
> Using index info to reconstruct a base tree...
> M	drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> Falling back to patching base and 3-way merge...
> Auto-merging drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> error: Failed to merge in the changes.
> hint: Use 'git am --show-current-patch=diff' to see the failed patch
> Patch failed at 0001 drm/i915/gt: Consider multi-gt at all places
> When you have resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
> Build failed, no error log produced

I think you need a rebase here.

Andi

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
  2023-03-17  9:16 ` [Intel-gfx] [PATCH] " Tvrtko Ursulin
@ 2023-03-21 23:33   ` Andi Shyti
  2023-04-05  6:56   ` Upadhyay, Tejas
  1 sibling, 0 replies; 12+ messages in thread
From: Andi Shyti @ 2023-03-21 23:33 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: Intel-GFX

Hi,

> > diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.h b/drivers/gpu/drm/i915/selftests/igt_live_test.h
> > index 36ed42736c52..209b0548c603 100644
> > --- a/drivers/gpu/drm/i915/selftests/igt_live_test.h
> > +++ b/drivers/gpu/drm/i915/selftests/igt_live_test.h
> > @@ -27,9 +27,9 @@ struct igt_live_test {
> >    * e.g. if the GPU was reset.
> >    */
> >   int igt_live_test_begin(struct igt_live_test *t,
> > -			struct drm_i915_private *i915,
> > +			struct intel_gt *gt,
> >   			const char *func,
> >   			const char *name);
> > -int igt_live_test_end(struct igt_live_test *t);
> > +int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt);
> 
> Back in the day the plan was that live selftests are device focused and then
> we also have intel_gt_live_subtests, which are obviously GT focused. So in
> that sense adding a single GT parameter to igt_live_test_begin isn't
> something I immediately understand.
> 
> Could you explain in one or two practical examples what is not working
> properly and how is this patch fixing it?

Tejas, would it help to split this patch in several patches?

Andi

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
  2023-03-17  9:16 ` [Intel-gfx] [PATCH] " Tvrtko Ursulin
  2023-03-21 23:33   ` Andi Shyti
@ 2023-04-05  6:56   ` Upadhyay, Tejas
  2023-04-05  8:30     ` Tvrtko Ursulin
  1 sibling, 1 reply; 12+ messages in thread
From: Upadhyay, Tejas @ 2023-04-05  6:56 UTC (permalink / raw)
  To: Tvrtko Ursulin, Intel-GFX

Sorry for late response. Inline responses below,

> -----Original Message-----
> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Sent: Friday, March 17, 2023 2:46 PM
> To: Upadhyay, Tejas <tejas.upadhyay@intel.com>; Intel-
> GFX@Lists.FreeDesktop.Org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
> 
> 
> On 17/03/2023 05:52, Tejas Upadhyay wrote:
> > In order to make igt_live_test work in proper way, we need to consider
> > multi-gt in all tests where igt_live_test is used as well as at other
> > random places where multi-gt should be considered.
> 
> Description is a bit vague - is this for Meteorlake in general? What is the
> "proper way" ie what is broken?
> 
> > Cc: Andi Shyti <andi.shyti@linux.intel.com>
> > Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
> > ---
> >   .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 13 ++--
> >   .../drm/i915/gem/selftests/i915_gem_context.c | 28 ++++----
> >   drivers/gpu/drm/i915/gt/intel_engine_user.c   |  2 +-
> >   drivers/gpu/drm/i915/gt/selftest_execlists.c  | 68 +++++++++----------
> >   drivers/gpu/drm/i915/selftests/i915_request.c | 36 +++++-----
> >   .../gpu/drm/i915/selftests/igt_live_test.c    | 10 +--
> >   .../gpu/drm/i915/selftests/igt_live_test.h    |  4 +-
> >   7 files changed, 81 insertions(+), 80 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > index 9dce2957b4e5..289b75ac39e1 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > @@ -2449,9 +2449,9 @@ static int eb_submit(struct i915_execbuffer *eb)
> >   	return err;
> >   }
> >
> > -static int num_vcs_engines(struct drm_i915_private *i915)
> > +static int num_vcs_engines(struct intel_gt *gt)
> >   {
> > -	return hweight_long(VDBOX_MASK(to_gt(i915)));
> > +	return hweight_long(VDBOX_MASK(gt));
> >   }
> >
> >   /*
> > @@ -2459,7 +2459,7 @@ static int num_vcs_engines(struct
> drm_i915_private *i915)
> >    * The engine index is returned.
> >    */
> >   static unsigned int
> > -gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,
> > +gen8_dispatch_bsd_engine(struct intel_gt *gt,
> >   			 struct drm_file *file)
> >   {
> >   	struct drm_i915_file_private *file_priv = file->driver_priv; @@
> > -2467,7 +2467,7 @@ gen8_dispatch_bsd_engine(struct drm_i915_private
> *dev_priv,
> >   	/* Check whether the file_priv has already selected one ring. */
> >   	if ((int)file_priv->bsd_engine < 0)
> >   		file_priv->bsd_engine =
> > -
> 	get_random_u32_below(num_vcs_engines(dev_priv));
> > +			get_random_u32_below(num_vcs_engines(gt));
> >
> >   	return file_priv->bsd_engine;
> >   }
> > @@ -2644,6 +2644,7 @@ static unsigned int
> >   eb_select_legacy_ring(struct i915_execbuffer *eb)
> >   {
> >   	struct drm_i915_private *i915 = eb->i915;
> > +	struct intel_gt *gt = eb->gt;
> >   	struct drm_i915_gem_execbuffer2 *args = eb->args;
> >   	unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;
> >
> > @@ -2655,11 +2656,11 @@ eb_select_legacy_ring(struct i915_execbuffer
> *eb)
> >   		return -1;
> >   	}
> >
> > -	if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) {
> > +	if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(gt) > 1) {
> >   		unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK;
> >
> >   		if (bsd_idx == I915_EXEC_BSD_DEFAULT) {
> > -			bsd_idx = gen8_dispatch_bsd_engine(i915, eb->file);
> > +			bsd_idx = gen8_dispatch_bsd_engine(gt, eb->file);
> >   		} else if (bsd_idx >= I915_EXEC_BSD_RING1 &&
> >   			   bsd_idx <= I915_EXEC_BSD_RING2) {
> >   			bsd_idx >>= I915_EXEC_BSD_SHIFT;
> 
> The hunks above I don't think are correct. Execbuf is in principle based on
> uabi engines, and that is not a per GT concept.
> 
> There is also no functional change above so I can only guess it is a prep work
> for something?

This I think you remove with below patch, so no more discussion required :
commit 927fb9c5ef6ae385c65ae04b181cc2ee94663e28
Author: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Date:   Thu Mar 16 14:27:28 2023 +0000

    drm/i915: Simplify vcs/bsd engine selection

> 
> [snip]
> 
> > -int igt_live_test_end(struct igt_live_test *t)
> > +int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt)
> >   {
> > -	struct drm_i915_private *i915 = t->i915;
> > +	struct drm_i915_private *i915 = gt->i915;
> >   	struct intel_engine_cs *engine;
> >   	enum intel_engine_id id;
> >
> > @@ -57,7 +57,7 @@ int igt_live_test_end(struct igt_live_test *t)
> >   		return -EIO;
> >   	}
> >
> > -	for_each_engine(engine, to_gt(i915), id) {
> > +	for_each_engine(engine, gt, id) {
> >   		if (t->reset_engine[id] ==
> >   		    i915_reset_engine_count(&i915->gpu_error, engine))
> >   			continue;
> > diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.h
> > b/drivers/gpu/drm/i915/selftests/igt_live_test.h
> > index 36ed42736c52..209b0548c603 100644
> > --- a/drivers/gpu/drm/i915/selftests/igt_live_test.h
> > +++ b/drivers/gpu/drm/i915/selftests/igt_live_test.h
> > @@ -27,9 +27,9 @@ struct igt_live_test {
> >    * e.g. if the GPU was reset.
> >    */
> >   int igt_live_test_begin(struct igt_live_test *t,
> > -			struct drm_i915_private *i915,
> > +			struct intel_gt *gt,
> >   			const char *func,
> >   			const char *name);
> > -int igt_live_test_end(struct igt_live_test *t);
> > +int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt);
> 
> Back in the day the plan was that live selftests are device focused and then
> we also have intel_gt_live_subtests, which are obviously GT focused. So in
> that sense adding a single GT parameter to igt_live_test_begin isn't
> something I immediately understand.
> 
> Could you explain in one or two practical examples what is not working
> properly and how is this patch fixing it?

For example you are running test "live_all_engines(void *arg)",

-- Below test begin, will reset counters for primary GT - Tile0 --
err = igt_live_test_begin(&t, to_gt(i915), __func__, "");
        if (err)
                goto out_free;

--- Now we loop for all engines, note here for MTL vcs, vecs engines are not on primary GT or tile 0,
     So counters did not reset on test begin does not cover them. ---
	     
      In test_begin, below will not reset count for vcs, vecs engines on MTL,
	for_each_engine(engine, gt, id)
                t->reset_engine[id] =
                        i915_reset_engine_count(&i915->gpu_error, engine);

--- Then below will end test, again for primary GT where above mentioned engines are not there --- 
err = igt_live_test_end(&t, to_gt(i915));

In short to me it looks like igt_live_test for device needs attention when we have different engines on different GTs like MTL.

Regards,
Tejas
> 
> Regards,
> 
> Tvrtko

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
  2023-04-05  6:56   ` Upadhyay, Tejas
@ 2023-04-05  8:30     ` Tvrtko Ursulin
  2023-04-17 18:13       ` Upadhyay, Tejas
  0 siblings, 1 reply; 12+ messages in thread
From: Tvrtko Ursulin @ 2023-04-05  8:30 UTC (permalink / raw)
  To: Upadhyay, Tejas, Intel-GFX


On 05/04/2023 07:56, Upadhyay, Tejas wrote:
>>> -int igt_live_test_end(struct igt_live_test *t)
>>> +int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt)
>>>    {
>>> -	struct drm_i915_private *i915 = t->i915;
>>> +	struct drm_i915_private *i915 = gt->i915;
>>>    	struct intel_engine_cs *engine;
>>>    	enum intel_engine_id id;
>>>
>>> @@ -57,7 +57,7 @@ int igt_live_test_end(struct igt_live_test *t)
>>>    		return -EIO;
>>>    	}
>>>
>>> -	for_each_engine(engine, to_gt(i915), id) {
>>> +	for_each_engine(engine, gt, id) {
>>>    		if (t->reset_engine[id] ==
>>>    		    i915_reset_engine_count(&i915->gpu_error, engine))
>>>    			continue;
>>> diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.h
>>> b/drivers/gpu/drm/i915/selftests/igt_live_test.h
>>> index 36ed42736c52..209b0548c603 100644
>>> --- a/drivers/gpu/drm/i915/selftests/igt_live_test.h
>>> +++ b/drivers/gpu/drm/i915/selftests/igt_live_test.h
>>> @@ -27,9 +27,9 @@ struct igt_live_test {
>>>     * e.g. if the GPU was reset.
>>>     */
>>>    int igt_live_test_begin(struct igt_live_test *t,
>>> -			struct drm_i915_private *i915,
>>> +			struct intel_gt *gt,
>>>    			const char *func,
>>>    			const char *name);
>>> -int igt_live_test_end(struct igt_live_test *t);
>>> +int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt);
>>
>> Back in the day the plan was that live selftests are device focused and then
>> we also have intel_gt_live_subtests, which are obviously GT focused. So in
>> that sense adding a single GT parameter to igt_live_test_begin isn't
>> something I immediately understand.
>>
>> Could you explain in one or two practical examples what is not working
>> properly and how is this patch fixing it?
> 
> For example you are running test "live_all_engines(void *arg)",
> 
> -- Below test begin, will reset counters for primary GT - Tile0 --
> err = igt_live_test_begin(&t, to_gt(i915), __func__, "");
>          if (err)
>                  goto out_free;
> 
> --- Now we loop for all engines, note here for MTL vcs, vecs engines are not on primary GT or tile 0,
>       So counters did not reset on test begin does not cover them. ---
> 	
>        In test_begin, below will not reset count for vcs, vecs engines on MTL,
> 	for_each_engine(engine, gt, id)
>                  t->reset_engine[id] =
>                          i915_reset_engine_count(&i915->gpu_error, engine);
> 
> --- Then below will end test, again for primary GT where above mentioned engines are not there ---
> err = igt_live_test_end(&t, to_gt(i915));
> 
> In short to me it looks like igt_live_test for device needs attention when we have different engines on different GTs like MTL.

If you either add for_each_gt to that for_each_engine in 
igt_live_test_begin and igt_live_test_end, or alternatively 
for_each_uabi_engine (maybe misses some internal engines?), everything 
works? That would be much smaller patch and wouldn't falsely associate 
live tests with a single gt.

Regards,

Tvrtko

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
  2023-04-05  8:30     ` Tvrtko Ursulin
@ 2023-04-17 18:13       ` Upadhyay, Tejas
  2023-04-18  7:32         ` Tvrtko Ursulin
  0 siblings, 1 reply; 12+ messages in thread
From: Upadhyay, Tejas @ 2023-04-17 18:13 UTC (permalink / raw)
  To: Tvrtko Ursulin, Intel-GFX; +Cc: Shyti, Andi



> -----Original Message-----
> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Sent: Wednesday, April 5, 2023 2:01 PM
> To: Upadhyay, Tejas <tejas.upadhyay@intel.com>; Intel-
> GFX@Lists.FreeDesktop.Org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
> 
> 
> On 05/04/2023 07:56, Upadhyay, Tejas wrote:
> >>> -int igt_live_test_end(struct igt_live_test *t)
> >>> +int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt)
> >>>    {
> >>> -	struct drm_i915_private *i915 = t->i915;
> >>> +	struct drm_i915_private *i915 = gt->i915;
> >>>    	struct intel_engine_cs *engine;
> >>>    	enum intel_engine_id id;
> >>>
> >>> @@ -57,7 +57,7 @@ int igt_live_test_end(struct igt_live_test *t)
> >>>    		return -EIO;
> >>>    	}
> >>>
> >>> -	for_each_engine(engine, to_gt(i915), id) {
> >>> +	for_each_engine(engine, gt, id) {
> >>>    		if (t->reset_engine[id] ==
> >>>    		    i915_reset_engine_count(&i915->gpu_error, engine))
> >>>    			continue;
> >>> diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.h
> >>> b/drivers/gpu/drm/i915/selftests/igt_live_test.h
> >>> index 36ed42736c52..209b0548c603 100644
> >>> --- a/drivers/gpu/drm/i915/selftests/igt_live_test.h
> >>> +++ b/drivers/gpu/drm/i915/selftests/igt_live_test.h
> >>> @@ -27,9 +27,9 @@ struct igt_live_test {
> >>>     * e.g. if the GPU was reset.
> >>>     */
> >>>    int igt_live_test_begin(struct igt_live_test *t,
> >>> -			struct drm_i915_private *i915,
> >>> +			struct intel_gt *gt,
> >>>    			const char *func,
> >>>    			const char *name);
> >>> -int igt_live_test_end(struct igt_live_test *t);
> >>> +int igt_live_test_end(struct igt_live_test *t, struct intel_gt
> >>> +*gt);
> >>
> >> Back in the day the plan was that live selftests are device focused
> >> and then we also have intel_gt_live_subtests, which are obviously GT
> >> focused. So in that sense adding a single GT parameter to
> >> igt_live_test_begin isn't something I immediately understand.
> >>
> >> Could you explain in one or two practical examples what is not
> >> working properly and how is this patch fixing it?
> >
> > For example you are running test "live_all_engines(void *arg)",
> >
> > -- Below test begin, will reset counters for primary GT - Tile0 -- err
> > = igt_live_test_begin(&t, to_gt(i915), __func__, "");
> >          if (err)
> >                  goto out_free;
> >
> > --- Now we loop for all engines, note here for MTL vcs, vecs engines are not
> on primary GT or tile 0,
> >       So counters did not reset on test begin does not cover them. ---
> >
> >        In test_begin, below will not reset count for vcs, vecs engines on MTL,
> > 	for_each_engine(engine, gt, id)
> >                  t->reset_engine[id] =
> >                          i915_reset_engine_count(&i915->gpu_error,
> > engine);
> >
> > --- Then below will end test, again for primary GT where above
> > mentioned engines are not there --- err = igt_live_test_end(&t,
> > to_gt(i915));
> >
> > In short to me it looks like igt_live_test for device needs attention when we
> have different engines on different GTs like MTL.
> 
> If you either add for_each_gt to that for_each_engine in igt_live_test_begin
> and igt_live_test_end, or alternatively for_each_uabi_engine (maybe misses
> some internal engines?), everything works? That would be much smaller
> patch and wouldn't falsely associate live tests with a single gt.
> 

Below would work, if you agree I will rearrange and send patch.

--- a/drivers/gpu/drm/i915/selftests/igt_live_test.c
+++ b/drivers/gpu/drm/i915/selftests/igt_live_test.c
@@ -16,28 +16,31 @@ int igt_live_test_begin(struct igt_live_test *t,
                        const char *func,
                        const char *name)
 {
-       struct intel_gt *gt = to_gt(i915);
+       struct intel_gt *gt;
        struct intel_engine_cs *engine;
        enum intel_engine_id id;
        int err;
+       unsigned int i;

-       t->i915 = i915;
-       t->func = func;
-       t->name = name;
+       for_each_gt(gt, i915, i) {
+               t->i915 = i915;
+               t->func = func;
+               t->name = name;

-       err = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
-       if (err) {
-               pr_err("%s(%s): failed to idle before, with err=%d!",
-                      func, name, err);
-               return err;
-       }
+               err = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
+               if (err) {
+                       pr_err("%s(%s): failed to idle before, with err=%d!",
+                                       func, name, err);
+                       return err;
+               }

-       t->reset_global = i915_reset_count(&i915->gpu_error);
+               t->reset_global = i915_reset_count(&i915->gpu_error);

-       for_each_engine(engine, gt, id)
-               t->reset_engine[id] =
+               for_each_engine(engine, gt, id)
+                       t->reset_engine[id] =
                        i915_reset_engine_count(&i915->gpu_error, engine);

+       }
        return 0;
 }

@@ -46,6 +49,7 @@ int igt_live_test_end(struct igt_live_test *t)
        struct drm_i915_private *i915 = t->i915;
        struct intel_engine_cs *engine;
        enum intel_engine_id id;
+       unsigned int i;

        if (igt_flush_test(i915))
                return -EIO;
@@ -57,17 +61,18 @@ int igt_live_test_end(struct igt_live_test *t)
                return -EIO;
        }

-       for_each_engine(engine, to_gt(i915), id) {
-               if (t->reset_engine[id] ==
-                   i915_reset_engine_count(&i915->gpu_error, engine))
-                       continue;
+       for_each_gt(gt, i915, i) {
+               for_each_engine(engine, gt, id) {
+                       if (t->reset_engine[id] ==
+                                       i915_reset_engine_count(&i915->gpu_error, engine))
+                               continue;

-               pr_err("%s(%s): engine '%s' was reset %d times!\n",
-                      t->func, t->name, engine->name,
-                      i915_reset_engine_count(&i915->gpu_error, engine) -
-                      t->reset_engine[id]);
-               return -EIO;
+                       pr_err("%s(%s): engine '%s' was reset %d times!\n",
+                                       t->func, t->name, engine->name,
+                                       i915_reset_engine_count(&i915->gpu_error, engine) -
+                                       t->reset_engine[id]);
+                       return -EIO;
+               }
        }
     
Regards,
Tejas                             
> Regards,
> 
> Tvrtko

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev3)
  2023-03-17  5:52 [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places Tejas Upadhyay
                   ` (3 preceding siblings ...)
  2023-03-21 13:51 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev2) Patchwork
@ 2023-04-17 20:40 ` Patchwork
  4 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-04-17 20:40 UTC (permalink / raw)
  To: Upadhyay, Tejas; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gt: Consider multi-gt at all places (rev3)
URL   : https://patchwork.freedesktop.org/series/115302/
State : failure

== Summary ==

Error: patch https://patchwork.freedesktop.org/api/1.0/series/115302/revisions/3/mbox/ not applied
Applying: drm/i915/gt: Consider multi-gt at all places
error: corrupt patch at line 83
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 drm/i915/gt: Consider multi-gt at all places
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced



^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
  2023-04-17 18:13       ` Upadhyay, Tejas
@ 2023-04-18  7:32         ` Tvrtko Ursulin
  0 siblings, 0 replies; 12+ messages in thread
From: Tvrtko Ursulin @ 2023-04-18  7:32 UTC (permalink / raw)
  To: Upadhyay, Tejas, Intel-GFX; +Cc: Shyti, Andi


On 17/04/2023 19:13, Upadhyay, Tejas wrote:
> 
> 
>> -----Original Message-----
>> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
>> Sent: Wednesday, April 5, 2023 2:01 PM
>> To: Upadhyay, Tejas <tejas.upadhyay@intel.com>; Intel-
>> GFX@Lists.FreeDesktop.Org
>> Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places
>>
>>
>> On 05/04/2023 07:56, Upadhyay, Tejas wrote:
>>>>> -int igt_live_test_end(struct igt_live_test *t)
>>>>> +int igt_live_test_end(struct igt_live_test *t, struct intel_gt *gt)
>>>>>     {
>>>>> -	struct drm_i915_private *i915 = t->i915;
>>>>> +	struct drm_i915_private *i915 = gt->i915;
>>>>>     	struct intel_engine_cs *engine;
>>>>>     	enum intel_engine_id id;
>>>>>
>>>>> @@ -57,7 +57,7 @@ int igt_live_test_end(struct igt_live_test *t)
>>>>>     		return -EIO;
>>>>>     	}
>>>>>
>>>>> -	for_each_engine(engine, to_gt(i915), id) {
>>>>> +	for_each_engine(engine, gt, id) {
>>>>>     		if (t->reset_engine[id] ==
>>>>>     		    i915_reset_engine_count(&i915->gpu_error, engine))
>>>>>     			continue;
>>>>> diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.h
>>>>> b/drivers/gpu/drm/i915/selftests/igt_live_test.h
>>>>> index 36ed42736c52..209b0548c603 100644
>>>>> --- a/drivers/gpu/drm/i915/selftests/igt_live_test.h
>>>>> +++ b/drivers/gpu/drm/i915/selftests/igt_live_test.h
>>>>> @@ -27,9 +27,9 @@ struct igt_live_test {
>>>>>      * e.g. if the GPU was reset.
>>>>>      */
>>>>>     int igt_live_test_begin(struct igt_live_test *t,
>>>>> -			struct drm_i915_private *i915,
>>>>> +			struct intel_gt *gt,
>>>>>     			const char *func,
>>>>>     			const char *name);
>>>>> -int igt_live_test_end(struct igt_live_test *t);
>>>>> +int igt_live_test_end(struct igt_live_test *t, struct intel_gt
>>>>> +*gt);
>>>>
>>>> Back in the day the plan was that live selftests are device focused
>>>> and then we also have intel_gt_live_subtests, which are obviously GT
>>>> focused. So in that sense adding a single GT parameter to
>>>> igt_live_test_begin isn't something I immediately understand.
>>>>
>>>> Could you explain in one or two practical examples what is not
>>>> working properly and how is this patch fixing it?
>>>
>>> For example you are running test "live_all_engines(void *arg)",
>>>
>>> -- Below test begin, will reset counters for primary GT - Tile0 -- err
>>> = igt_live_test_begin(&t, to_gt(i915), __func__, "");
>>>           if (err)
>>>                   goto out_free;
>>>
>>> --- Now we loop for all engines, note here for MTL vcs, vecs engines are not
>> on primary GT or tile 0,
>>>        So counters did not reset on test begin does not cover them. ---
>>>
>>>         In test_begin, below will not reset count for vcs, vecs engines on MTL,
>>> 	for_each_engine(engine, gt, id)
>>>                   t->reset_engine[id] =
>>>                           i915_reset_engine_count(&i915->gpu_error,
>>> engine);
>>>
>>> --- Then below will end test, again for primary GT where above
>>> mentioned engines are not there --- err = igt_live_test_end(&t,
>>> to_gt(i915));
>>>
>>> In short to me it looks like igt_live_test for device needs attention when we
>> have different engines on different GTs like MTL.
>>
>> If you either add for_each_gt to that for_each_engine in igt_live_test_begin
>> and igt_live_test_end, or alternatively for_each_uabi_engine (maybe misses
>> some internal engines?), everything works? That would be much smaller
>> patch and wouldn't falsely associate live tests with a single gt.
>>
> 
> Below would work, if you agree I will rearrange and send patch.
> 
> --- a/drivers/gpu/drm/i915/selftests/igt_live_test.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_live_test.c
> @@ -16,28 +16,31 @@ int igt_live_test_begin(struct igt_live_test *t,
>                          const char *func,
>                          const char *name)
>   {
> -       struct intel_gt *gt = to_gt(i915);
> +       struct intel_gt *gt;
>          struct intel_engine_cs *engine;
>          enum intel_engine_id id;
>          int err;
> +       unsigned int i;
> 
> -       t->i915 = i915;
> -       t->func = func;
> -       t->name = name;
> +       for_each_gt(gt, i915, i) {
> +               t->i915 = i915;
> +               t->func = func;
> +               t->name = name;

These three assignments should stay outside the outer loop.

> 
> -       err = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
> -       if (err) {
> -               pr_err("%s(%s): failed to idle before, with err=%d!",
> -                      func, name, err);
> -               return err;
> -       }
> +               err = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
> +               if (err) {
> +                       pr_err("%s(%s): failed to idle before, with err=%d!",
> +                                       func, name, err);
> +                       return err;
> +               }
> 
> -       t->reset_global = i915_reset_count(&i915->gpu_error);
> +               t->reset_global = i915_reset_count(&i915->gpu_error);

Ditto.

Rest looks good to me.

Regards,

Tvrtko

> 
> -       for_each_engine(engine, gt, id)
> -               t->reset_engine[id] =
> +               for_each_engine(engine, gt, id)
> +                       t->reset_engine[id] =
>                          i915_reset_engine_count(&i915->gpu_error, engine);
> 
> +       }
>          return 0;
>   }
> 
> @@ -46,6 +49,7 @@ int igt_live_test_end(struct igt_live_test *t)
>          struct drm_i915_private *i915 = t->i915;
>          struct intel_engine_cs *engine;
>          enum intel_engine_id id;
> +       unsigned int i;
> 
>          if (igt_flush_test(i915))
>                  return -EIO;
> @@ -57,17 +61,18 @@ int igt_live_test_end(struct igt_live_test *t)
>                  return -EIO;
>          }
> 
> -       for_each_engine(engine, to_gt(i915), id) {
> -               if (t->reset_engine[id] ==
> -                   i915_reset_engine_count(&i915->gpu_error, engine))
> -                       continue;
> +       for_each_gt(gt, i915, i) {
> +               for_each_engine(engine, gt, id) {
> +                       if (t->reset_engine[id] ==
> +                                       i915_reset_engine_count(&i915->gpu_error, engine))
> +                               continue;
> 
> -               pr_err("%s(%s): engine '%s' was reset %d times!\n",
> -                      t->func, t->name, engine->name,
> -                      i915_reset_engine_count(&i915->gpu_error, engine) -
> -                      t->reset_engine[id]);
> -               return -EIO;
> +                       pr_err("%s(%s): engine '%s' was reset %d times!\n",
> +                                       t->func, t->name, engine->name,
> +                                       i915_reset_engine_count(&i915->gpu_error, engine) -
> +                                       t->reset_engine[id]);
> +                       return -EIO;
> +               }
>          }
>       
> Regards,
> Tejas
>> Regards,
>>
>> Tvrtko

^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2023-04-18  7:32 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-17  5:52 [Intel-gfx] [PATCH] drm/i915/gt: Consider multi-gt at all places Tejas Upadhyay
2023-03-17  8:22 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2023-03-17  9:16 ` [Intel-gfx] [PATCH] " Tvrtko Ursulin
2023-03-21 23:33   ` Andi Shyti
2023-04-05  6:56   ` Upadhyay, Tejas
2023-04-05  8:30     ` Tvrtko Ursulin
2023-04-17 18:13       ` Upadhyay, Tejas
2023-04-18  7:32         ` Tvrtko Ursulin
2023-03-20  0:24 ` Andi Shyti
2023-03-21 13:51 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev2) Patchwork
2023-03-21 23:24   ` Andi Shyti
2023-04-17 20:40 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gt: Consider multi-gt at all places (rev3) Patchwork

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