messages from 2020-05-01 15:07:17 to 2020-05-04 13:33:52 UTC [more...]
[Intel-gfx] [PATCH 01/22] drm/i915: Allow some leniency in PCU reads
2020-05-04 13:33 UTC (33+ messages)
` [Intel-gfx] [PATCH 02/22] drm/i915/gem: Specify address type for chained reloc batches
` [Intel-gfx] [PATCH 03/22] drm/i915/gem: Implement legacy MI_STORE_DATA_IMM
` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] [PATCH 04/22] drm/i915/gt: Small tidy of gen8+ breadcrumb emission
` [Intel-gfx] [PATCH 05/22] drm/i915: Mark concurrent submissions with a weak-dependency
` [Intel-gfx] [PATCH 06/22] drm/i915/selftests: Repeat the rps clock frequency measurement
` [Intel-gfx] [PATCH 07/22] drm/i915/gt: Stop holding onto the pinned_default_state
` [Intel-gfx] [PATCH 08/22] dma-buf: Proxy fence, an unsignaled fence placeholder
` [Intel-gfx] [PATCH 09/22] drm/syncobj: Allow use of dma-fence-proxy
` [Intel-gfx] [PATCH 10/22] drm/i915/gem: Teach execbuf how to wait on future syncobj
` [Intel-gfx] [PATCH 11/22] drm/i915/gem: Allow combining submit-fences with syncobj
` [Intel-gfx] [PATCH 12/22] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] [PATCH 13/22] drm/i915: Replace the hardcoded I915_FENCE_TIMEOUT
` [Intel-gfx] [PATCH 14/22] drm/i915: Drop I915_RESET_TIMEOUT and friends
` [Intel-gfx] [PATCH 15/22] drm/i915: Drop I915_IDLE_ENGINES_TIMEOUT
` [Intel-gfx] [PATCH 16/22] drm/i915: Always defer fenced work to the worker
` [Intel-gfx] [PATCH 17/22] drm/i915/gem: Assign context id for async work
` [Intel-gfx] [PATCH 18/22] drm/i915: Export a preallocate variant of i915_active_acquire()
` [Intel-gfx] [PATCH 19/22] drm/i915/gem: Separate the ww_mutex walker into its own list
` [Intel-gfx] [PATCH 20/22] drm/i915/gem: Asynchronous GTT unbinding
` [Intel-gfx] [PATCH 21/22] drm/i915/gem: Bind the fence async for execbuf
` [Intel-gfx] [PATCH 22/22] drm/i915/gem: Lazily acquire the device wakeref for freeing objects
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/22] drm/i915: Allow some leniency in PCU reads
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH hmm v2 5/5] mm/hmm: remove the customizable pfn format from hmm_range_fault
2020-05-04 13:14 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915: Avoid using simd from interrupt context
2020-05-04 13:06 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v2 06/21] drm: i915: fix sg_table nents vs. orig_nents misuse for dmabuf objects
2020-05-04 12:53 UTC
[Intel-gfx] [CI] drm/i915/gem: Specify address type for chained reloc batches
2020-05-04 12:51 UTC
[Intel-gfx] [PATCH] drm: Replace drm_modeset_lock/unlock_all with DRM_MODESET_LOCK_ALL_* helpers
2020-05-04 11:53 UTC (6+ messages)
[Intel-gfx] [PATCH v12 0/4] drm/i915/perf: Add support for multi context perf queries
2020-05-04 11:50 UTC (9+ messages)
` [Intel-gfx] [PATCH v12 1/4] drm/i915/perf: break OA config buffer object in 2
` [Intel-gfx] [PATCH v12 2/4] drm/i915/perf: stop using the kernel context
` [Intel-gfx] [PATCH v12 3/4] drm/i915/perf: prepare driver to receive multiple ctx handles
` [Intel-gfx] [PATCH v12 4/4] drm/i915/perf: enable filtering on multiple contexts
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: Add support for multi context perf queries (rev6)
[Intel-gfx] [PATCH v2 0/3] Steer multicast register workaround verification
2020-05-04 11:43 UTC (8+ messages)
` [Intel-gfx] [PATCH v2 1/3] drm/i915: Setup multicast register steering for all gen >= 10
` [Intel-gfx] [PATCH v2 2/3] drm/i915: Setup MCR steering for RCS engine workarounds
` [Intel-gfx] [PATCH v2 3/3] drm/i915: Add MCR ranges for gen11 and gen12
` [Intel-gfx] ✓ Fi.CI.BAT: success for Steer multicast register workaround verification (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/display: Warn if the FBC is still writing to stolen on removal
2020-05-04 11:24 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v11 0/4] drm/i915/perf: Add support for multi context perf queries
2020-05-04 11:22 UTC (9+ messages)
` [Intel-gfx] [PATCH v11 1/4] drm/i915/perf: break OA config buffer object in 2
` [Intel-gfx] [PATCH v11 2/4] drm/i915/perf: stop using the kernel context
` [Intel-gfx] [PATCH v11 3/4] drm/i915/perf: prepare driver to receive multiple ctx handles
` [Intel-gfx] [PATCH v11 4/4] drm/i915/perf: enable filtering on multiple contexts
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/perf: Add support for multi context perf queries (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH] drm/i915/gem: Lazily acquire the device wakeref for freeing objects
2020-05-04 10:40 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Lazily acquire the device wakeref for freeing objects (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/tgl+: Fix interrupt handling for DP AUX transactions
2020-05-04 10:02 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_exec: Exploit resource contention to verify execbuf independence
2020-05-04 9:52 UTC
[Intel-gfx] [PATCH] drm/i915/display: Fix the encoder type check
2020-05-04 9:34 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
[Intel-gfx] [PATCH] drm/i915: Don't enable WaIncreaseLatencyIPCEnabled when IPC is disabled
2020-05-04 7:51 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH 01/14] drm/i915/gem: Specify address type for chained reloc batches
2020-05-04 1:15 UTC (18+ messages)
` [Intel-gfx] [PATCH 02/14] drm/i915/gem: Implement legacy MI_STORE_DATA_IMM
` [Intel-gfx] [PATCH] "
` [Intel-gfx] [PATCH 03/14] drm/i915/gt: Small tidy of gen8+ breadcrumb emission
` [Intel-gfx] [PATCH 04/14] drm/i915: Mark concurrent submissions with a weak-dependency
` [Intel-gfx] [PATCH 05/14] drm/i915/selftests: Repeat the rps clock frequency measurement
` [Intel-gfx] [PATCH 06/14] drm/i915/gt: Stop holding onto the pinned_default_state
` [Intel-gfx] [PATCH 07/14] dma-buf: Proxy fence, an unsignaled fence placeholder
` [Intel-gfx] [PATCH 08/14] drm/syncobj: Allow use of dma-fence-proxy
` [Intel-gfx] [PATCH 09/14] drm/i915/gem: Teach execbuf how to wait on future syncobj
` [Intel-gfx] [PATCH 10/14] drm/i915/gem: Allow combining submit-fences with syncobj
` [Intel-gfx] [PATCH 11/14] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] [PATCH 12/14] drm/i915: Replace the hardcoded I915_FENCE_TIMEOUT
` [Intel-gfx] [PATCH 13/14] drm/i915: Drop I915_RESET_TIMEOUT and friends
` [Intel-gfx] [PATCH 14/14] drm/i915: Drop I915_IDLE_ENGINES_TIMEOUT
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/14] drm/i915/gem: Specify address type for chained reloc batches (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/9] Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"
2020-05-03 21:36 UTC (19+ messages)
` [Intel-gfx] [PATCH 2/9] drm/i915/gen12: Fix HDC pipeline flush
` [Intel-gfx] [PATCH 3/9] drm/i915/gen12: Add L3 fabric flush
` [Intel-gfx] [PATCH 4/9] drm/i915/gen12: Flush L3
` [Intel-gfx] [PATCH 5/9] drm/i915/gen12: Flush AMFS
` [Intel-gfx] [PATCH 6/9] drm/i915/gen12: Invalidate indirect state pointers
` [Intel-gfx] [PATCH 7/9] drm/i915/gen12: Wait on previous flush on invalidate
` [Intel-gfx] [PATCH 8/9] drm/i915/gen12: Invalidate media state
` [Intel-gfx] [PATCH 9/9] drm/i915/gen12: Flush LLC
[Intel-gfx] [PATCH 1/3] drm/i915: Remove trace_i915_gem_object_fault
2020-05-03 20:47 UTC (4+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915: Remove eviction tracepoints
` [Intel-gfx] [PATCH 3/3] drm/i915: Drop pread/pwrite tracepoints
` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Remove trace_i915_gem_object_fault
[Intel-gfx] [PATCH] drm/i915: check to see if SIMD registers are available before using SIMD
2020-05-03 20:30 UTC (10+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/gem: Implement legacy MI_STORE_DATA_IMM
2020-05-03 1:39 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/gt: Sanitize RPS interrupts upon resume
2020-05-02 22:15 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI] perf/core: Only copy-to-user after completely unlocking all locks, v3
2020-05-02 21:14 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for perf/core: Only copy-to-user after completely unlocking all locks, v3. (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: Mark concurrent submissions with a weak-dependency
2020-05-02 18:59 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Mark concurrent submissions with a weak-dependency (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI] perf/core: Only copy-to-user after completely unlocking all locks, v3
2020-05-02 17:46 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for perf/core: Only copy-to-user after completely unlocking all locks, v3. (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH 00/23] Introduce Rocket Lake
2020-05-02 17:09 UTC (32+ messages)
` [Intel-gfx] [PATCH 01/23] drm/i915/rkl: Add RKL platform info and PCI ids
` [Intel-gfx] [PATCH 02/23] x86/gpu: add RKL stolen memory support
` [Intel-gfx] [PATCH 03/23] drm/i915/rkl: Re-use TGL GuC/HuC firmware
` [Intel-gfx] [PATCH 04/23] drm/i915/rkl: Load DMC firmware for Rocket Lake
` [Intel-gfx] [PATCH 05/23] drm/i915/rkl: Add PCH support
` [Intel-gfx] [PATCH 06/23] drm/i915/rkl: Update memory bandwidth parameters
` [Intel-gfx] [PATCH 07/23] drm/i915/rkl: Limit number of universal planes to 5
` [Intel-gfx] [PATCH 08/23] drm/i915/rkl: Add power well support
` [Intel-gfx] [PATCH 09/23] drm/i915/rkl: Program BW_BUDDY0 registers instead of BW_BUDDY1/2
` [Intel-gfx] [PATCH 10/23] drm/i915/rkl: RKL only uses PHY_MISC for PHY's A and B
` [Intel-gfx] [PATCH 11/23] drm/i915/rkl: Add cdclk support
` [Intel-gfx] [PATCH 12/23] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
` [Intel-gfx] [PATCH 13/23] drm/i915/rkl: Check proper SDEISR bits for TC1 and TC2 outputs
` [Intel-gfx] [PATCH 14/23] drm/i915/rkl: Setup ports/phys
` [Intel-gfx] [PATCH 15/23] drm/i915/rkl: provide port/phy mapping for vbt
` [Intel-gfx] [PATCH 16/23] drm/i915/rkl: Add DDC pin mapping
` [Intel-gfx] [PATCH 17/23] drm/i915/rkl: Don't try to access transcoder D
` [Intel-gfx] [PATCH 18/23] drm/i915/rkl: Don't try to read out DSI transcoders
` [Intel-gfx] [PATCH 19/23] drm/i915/rkl: Handle comp master/slave relationships for PHYs
` [Intel-gfx] [PATCH 20/23] drm/i915/rkl: Add DPLL4 support
` [Intel-gfx] [PATCH 21/23] drm/i915/rkl: Handle HTI
` [Intel-gfx] [PATCH 22/23] drm/i915/rkl: Disable PSR2
` [Intel-gfx] [PATCH 23/23] drm/i915/rkl: Add initial workarounds
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Rocket Lake
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce Rocket Lake (rev2)
[Intel-gfx] [PATCH i-g-t 1/3] intel-ci: Only skip the hanging gem_exec_fence tests
2020-05-02 13:40 UTC (3+ messages)
` [Intel-gfx] [PATCH i-g-t 2/3] lib/i915: Report scheduler caps for timeslicing
` [Intel-gfx] [PATCH i-g-t 3/3] i915/gem_exec_fence: Teach invalid-wait about invalid future fences
[Intel-gfx] [PATCH] drm/i915/selftests: Repeat the rps clock frequency measurement
2020-05-02 11:35 UTC (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 00/12] drm/i915: FBC fixes
2020-05-02 1:18 UTC (5+ messages)
` [Intel-gfx] [PATCH 03/12] drm/i915/fbc: Fix fence_y_offset handling
` [Intel-gfx] [PATCH 04/12] drm/i915/fbc: Fix nuke for pre-snb platforms
[Intel-gfx] [PATCH 02/12] drm/i915/fbc: Use the correct plane stride
2020-05-02 0:16 UTC (3+ messages)
` [Intel-gfx] [PATCH v2 "
[Intel-gfx] [PATCH] drm/i915/icp: Add Wa_14010685332
2020-05-01 23:32 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [CI 1/3] drm/i915/gem: Use chained reloc batches
2020-05-01 21:54 UTC (5+ messages)
` [Intel-gfx] [CI 2/3] drm/i915/gem: Use a single chained reloc batches for a single execbuf
` [Intel-gfx] [CI 3/3] drm/i915/gem: Try an alternate engine for relocations
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/gem: Use chained reloc batches
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [CI 1/3] drm/i915/gem: Use chained reloc batches
2020-05-01 18:51 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI] drm/i915: Implement vm_ops->access for gdb access into mmaps
2020-05-01 16:27 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Implement vm_ops->access for gdb access into mmaps (rev4)
[Intel-gfx] [PATCH 0/4] Steer multicast register workaround verification
2020-05-01 16:05 UTC (3+ messages)
[Intel-gfx] [PATCH 1/3] drm/i915/gem: Use chained reloc batches
2020-05-01 15:36 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] "
[Intel-gfx] [PATCH] drm/i915/gt: Make timeslicing an explicit engine property
2020-05-01 15:20 UTC (2+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
i915 HDCP 2.2 TX encryption on Teledyne test instrument
2020-05-01 15:00 UTC (4+ messages)
` [Intel-gfx] "
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