messages from 2021-01-23 21:47:50 to 2021-01-25 23:18:54 UTC [more...]
[Intel-gfx] [CI] Revert "x86/setup: don't remove E820_TYPE_RAM for pfn 0"
2021-01-25 23:18 UTC
[Intel-gfx] [PATCH 1/2] drm/dp/mst: Export drm_dp_get_vc_payload_bw()
2021-01-25 22:55 UTC (9+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: Fix the MST PBN divider calculation
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/dp/mst: Export drm_dp_get_vc_payload_bw()
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [CI] Revert "x86/setup: don't remove E820_TYPE_RAM for pfn 0"
2021-01-25 22:52 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
[Intel-gfx] [PATCH 01/41] drm/i915/selftests: Check for engine-reset errors in the middle of workarounds
2021-01-25 22:45 UTC (50+ messages)
` [Intel-gfx] [PATCH 02/41] drm/i915/gt: Move the defer_request waiter active assertion
` [Intel-gfx] [PATCH 03/41] drm/i915: Replace engine->schedule() with a known request operation
` [Intel-gfx] [PATCH 04/41] drm/i915: Teach the i915_dependency to use a double-lock
` [Intel-gfx] [PATCH 05/41] drm/i915: Restructure priority inheritance
` [Intel-gfx] [PATCH 06/41] drm/i915/selftests: Measure set-priority duration
` [Intel-gfx] [PATCH 07/41] drm/i915/selftests: Exercise priority inheritance around an engine loop
` [Intel-gfx] [PATCH 08/41] drm/i915: Improve DFS for priority inheritance
` [Intel-gfx] [PATCH 09/41] drm/i915/selftests: Exercise relative mmio paths to non-privileged registers
` [Intel-gfx] [PATCH 10/41] drm/i915/selftests: Exercise cross-process context isolation
` [Intel-gfx] [PATCH 11/41] drm/i915: Extract request submission from execlists
` [Intel-gfx] [PATCH 12/41] drm/i915: Extract request rewinding "
` [Intel-gfx] [PATCH 13/41] drm/i915: Extract request suspension from the execlists
` [Intel-gfx] [PATCH 14/41] drm/i915: Extract the ability to defer and rerun a request later
` [Intel-gfx] [PATCH 15/41] drm/i915: Fix the iterative dfs for defering requests
` [Intel-gfx] [PATCH 16/41] drm/i915: Move common active lists from engine to i915_scheduler
` [Intel-gfx] [PATCH 17/41] drm/i915: Move scheduler queue
` [Intel-gfx] [PATCH 18/41] drm/i915: Move tasklet from execlists to sched
` [Intel-gfx] [PATCH 19/41] drm/i915/gt: Show scheduler queues when dumping state
` [Intel-gfx] [PATCH 20/41] drm/i915: Replace priolist rbtree with a skiplist
` [Intel-gfx] [PATCH 21/41] drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper
` [Intel-gfx] [PATCH 22/41] drm/i915: Fair low-latency scheduling
` [Intel-gfx] [PATCH 23/41] drm/i915/gt: Specify a deadline for the heartbeat
` [Intel-gfx] [PATCH 24/41] drm/i915: Extend the priority boosting for the display with a deadline
` [Intel-gfx] [PATCH 25/41] drm/i915/gt: Support virtual engine queues
` [Intel-gfx] [PATCH 26/41] drm/i915: Move saturated workload detection back to the context
` [Intel-gfx] [PATCH 27/41] drm/i915: Bump default timeslicing quantum to 5ms
` [Intel-gfx] [PATCH 28/41] drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb
` [Intel-gfx] [PATCH 29/41] drm/i915/gt: Track timeline GGTT offset separately from subpage offset
` [Intel-gfx] [PATCH 30/41] drm/i915/gt: Add timeline "mode"
` [Intel-gfx] [PATCH 31/41] drm/i915/gt: Use indices for writing into relative timelines
` [Intel-gfx] [PATCH 32/41] drm/i915/selftests: Exercise relative timeline modes
` [Intel-gfx] [PATCH 33/41] drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines
` [Intel-gfx] [PATCH 34/41] Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"
` [Intel-gfx] [PATCH 35/41] drm/i915/gt: Couple tasklet scheduling for all CS interrupts
` [Intel-gfx] [PATCH 36/41] drm/i915/gt: Support creation of 'internal' rings
` [Intel-gfx] [PATCH 37/41] drm/i915/gt: Use client timeline address for seqno writes
` [Intel-gfx] [PATCH 38/41] drm/i915/gt: Infrastructure for ring scheduling
` [Intel-gfx] [PATCH 39/41] drm/i915/gt: Implement ring scheduler for gen4-7
` [Intel-gfx] [PATCH 40/41] drm/i915/gt: Enable ring scheduling for gen5-7
` [Intel-gfx] [PATCH 41/41] drm/i915: Support secure dispatch on gen6/gen7
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/41] drm/i915/selftests: Check for engine-reset errors in the middle of workarounds
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/uc: Use platform specific defaults for GuC/HuC enabling
2021-01-25 22:42 UTC
[Intel-gfx] [PATCH] drm/i915/gt: Flush before changing register state
2021-01-25 22:02 UTC
[Intel-gfx] [CI] drm/i915: Disable atomics in L3 for gen9
2021-01-25 22:01 UTC (2+ messages)
` [Intel-gfx] [PATCH] "
[Intel-gfx] [CI] Revert "mm: fix initialization of struct page for holes in memory layout"
2021-01-25 21:41 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH] drm/i915/gt: Program mocs:63 for cache eviction on gen9
2021-01-25 21:39 UTC (4+ messages)
[Intel-gfx] [PATCH] i915: Fix DRM_I915_WERROR dependencies
2021-01-25 21:20 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI v5 01/18] drm/i915/display/vrr: Create VRR file and add VRR capability check
2021-01-25 21:07 UTC (9+ messages)
` [Intel-gfx] [CI v5 06/18] drm/i915/display/dp: Compute VRR state in atomic_check
` [Intel-gfx] [CI v5 15/18] drm/i915/display: Helpers for VRR vblank min and max start
` [Intel-gfx] [CI v6] drm/i915/display/vrr: Create VRR file and add VRR capability check
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,v6] drm/i915/display/vrr: Create VRR file and add VRR capability check (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH v12 1/2] drm/i915/display: Support PSR Multiple Instances
2021-01-25 20:30 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [v12,1/2] drm/i915/display: Support PSR Multiple Instances (rev2)
[Intel-gfx] [PATCH 0/9] drm/i915/edp: enable MSO... maybe
2021-01-25 19:22 UTC (14+ messages)
` [Intel-gfx] [PATCH 1/9] drm/dp: add MSO related DPCD registers
` [Intel-gfx] [PATCH 2/9] drm/i915/edp: reject modes with dimensions other than fixed mode
` [Intel-gfx] [PATCH 3/9] drm/i915/edp: always add fixed mode to probed modes in ->get_modes()
` [Intel-gfx] [PATCH 4/9] drm/i915/edp: read sink MSO configuration for eDP 1.4+
` [Intel-gfx] [PATCH 5/9] drm/i915/reg: add stream splitter configuration definitions
` [Intel-gfx] [PATCH 6/9] drm/i915/mso: add state readout for platforms that support it
` [Intel-gfx] [PATCH 7/9] drm/i915/mso: add state check
` [Intel-gfx] [PATCH 8/9] drm/i915/edp: modify fixed and downclock modes for MSO
` [Intel-gfx] [PATCH 9/9] drm/i915/edp: enable eDP MSO during link training
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/edp: enable MSO... maybe
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH 00/10] Alderlake-S platform enabling patches
2021-01-25 18:54 UTC (20+ messages)
` [Intel-gfx] [PATCH 01/10] x86/gpu: Add Alderlake-S stolen memory support
` [Intel-gfx] [PATCH 02/10] drm/i915/adl_s: Add PCH support
` [Intel-gfx] [PATCH 03/10] drm/i915/adl_s: Add Interrupt Support
` [Intel-gfx] [PATCH 04/10] drm/i915/adl_s: Add PHYs for Alderlake S
` [Intel-gfx] [PATCH 05/10] drm/i915/adl_s: Configure DPLL for ADL-S
` [Intel-gfx] [PATCH 06/10] drm/i915/adl_s: Configure Port clock registers "
` [Intel-gfx] [PATCH 07/10] drm/i915/adl_s: Initialize display "
` [Intel-gfx] [PATCH 08/10] drm/i915/adl_s: Add adl-s ddc pin mapping
` [Intel-gfx] [PATCH 09/10] drm/i915/adl_s: Add vbt port and aux channel settings for adls
` [Intel-gfx] [PATCH 10/10] drm/i915/adl_s: Update combo PHY master/slave relationships
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Alderlake-S platform enabling patches
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH 1/8] drm/i915/selftests: Set cache status for huge_gem_object
2021-01-25 18:47 UTC (9+ messages)
` [Intel-gfx] [PATCH 2/8] drm/i915/selftests: Use a coherent map to setup scratch batch buffers
` [Intel-gfx] [PATCH 3/8] drm/i915/selftests: Replace the unbounded set-domain with an explicit wait
` [Intel-gfx] [PATCH 4/8] drm/i915/selftests: Remove redundant set-to-gtt-domain
` [Intel-gfx] [PATCH 5/8] drm/i915/selftests: Replace unbound set-domain waits with explicit timeouts
` [Intel-gfx] [PATCH 6/8] drm/i915/selftests: Replace an unbounded set-domain wait with a timeout
` [Intel-gfx] [PATCH 7/8] drm/i915/selftests: Remove redundant set-to-gtt-domain before batch submission
` [Intel-gfx] [PATCH 8/8] drm/i915/gem: Manage all set-domain waits explicitly
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/selftests: Set cache status for huge_gem_object
[Intel-gfx] [PATCH] drm/i915/gem: fix non-SMP build failure
2021-01-25 17:42 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 0/1] Add Alderlake-S stolen memory changes
2021-01-25 17:33 UTC (6+ messages)
` [Intel-gfx] [PATCH 1/1] x86/gpu: Add Alderlake-S stolen memory support
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add Alderlake-S stolen memory changes
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI] drm/i915/gt: Always try to reserve GGTT address 0x0
2021-01-25 17:14 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/hdcp: Disable the QSES check for HDCP 1.4 over MST
2021-01-25 17:10 UTC (6+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/hdcp: Disable the QSES check for HDCP 1.4 over MST (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH stable-5.10] drm/i915: Only enable DFP 4:4:4->4:2:0 conversion when outputting YCbCr 4:4:4
2021-01-25 17:00 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [PATCH] drm/i915/gem: Drop lru bumping on display unpinning
2021-01-25 16:59 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH] drm/i915/gt: use new tasklet API for execution list
2021-01-25 16:58 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for "
[Intel-gfx] [RFC-v23 00/13] Introduce Intel PXP component - Mesa single session
2021-01-25 16:22 UTC (5+ messages)
[Intel-gfx] [PATCH i-g-t] i915/sysfs_clients: Check that client ids are cyclic
2021-01-25 15:28 UTC
[Intel-gfx] [PATCH] drm/i915/gem: Fix oops in error handling code
2021-01-25 13:09 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH 1/2] drm/i915: Remove guard page insertion around unevictable nodes
2021-01-25 12:50 UTC (14+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/gt: Always try to reserve GGTT address 0x0
` [Intel-gfx] [PATCH] drm/i915: Remove guard page insertion around unevictable nodes
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with drm/i915: Remove guard page insertion around unevictable nodes (rev2)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH] drm/i915/gvt: fix uninitialized return in intel_gvt_update_reg_whitelist()
2021-01-25 12:33 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH i-g-t] i915: Exercise sysfs client properties
2021-01-25 10:29 UTC (4+ messages)
` [Intel-gfx] [igt-dev] "
[Intel-gfx] [PATCH][next] drm/i915/hdcp: Fix return of value in uninitialized variable ret
2021-01-25 10:20 UTC (3+ messages)
[Intel-gfx] [PATCH] drm/i915/gem: Move freeze/freeze_late next to suspend/suspend_late
2021-01-25 9:44 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915/buddy: document the unused header bits
2021-01-25 7:40 UTC (2+ messages)
[Intel-gfx] [PATCH 0/1] drm/i915: Start disabling pread/pwrite ioctl's for future platforms
2021-01-25 2:36 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for "
` [Intel-gfx] ✓ Fi.CI.IGT: success "
[Intel-gfx] linux-next: manual merge of the drm-intel tree with the drm tree
2021-01-25 0:46 UTC
[Intel-gfx] [PATCH v3 0/8] drm/i915: Remainder of dbuf state stuff
2021-01-25 0:32 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remainder of dbuf state stuff (rev4)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [CI 1/8] drm/i915/gt: Show the per-engine runtime in sysfs
2021-01-24 18:34 UTC (12+ messages)
` [Intel-gfx] [CI 2/8] drm/i915: Expose list of clients "
` [Intel-gfx] [CI 3/8] drm/i915: Update client name on context create
` [Intel-gfx] [CI 4/8] drm/i915: Make GEM contexts track DRM clients
` [Intel-gfx] [CI 5/8] drm/i915: Track runtime spent in closed and unreachable GEM contexts
` [Intel-gfx] [CI 6/8] drm/i915: Track all user contexts per client
` [Intel-gfx] [CI 7/8] drm/i915: Track context current active time
` [Intel-gfx] [CI 8/8] drm/i915: Expose per-engine client busyness
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/8] drm/i915/gt: Show the per-engine runtime in sysfs
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
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