From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [RFC v2] drm/i915: lpsp with hdmi/dp outputs
Date: Fri, 30 Apr 2021 20:40:12 +0300 [thread overview]
Message-ID: <YIxA/LDc5llqvRF+@intel.com> (raw)
In-Reply-To: <20210430115355.30611-1-anshuman.gupta@intel.com>
On Fri, Apr 30, 2021 at 05:23:55PM +0530, Anshuman Gupta wrote:
> DG1 and DISPLAY_VER=13 onwards Audio MMIO/VERBS lies in PG0 power
> well. So in order to detect audio capable DP/HDMI output it doesn't
> require to enable PG3 power well on DG1 and PG2 on DISPLAY_VER=13
> pltform. It will save the power when DP/HDMI outputs used as
> lpsp configuration.
>
> B.Spec: 49233
> B.Spec: 49231
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Kai Vehmanen <kai.vehmanen@linux.intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 6280ba7f4c17..16bfa7628970 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3536,8 +3536,13 @@ static u64 get_crtc_power_domains(struct intel_crtc_state *crtc_state)
> mask |= BIT_ULL(intel_encoder->power_domain);
> }
>
> - if (HAS_DDI(dev_priv) && crtc_state->has_audio)
> - mask |= BIT_ULL(POWER_DOMAIN_AUDIO);
> + if (HAS_DDI(dev_priv) && crtc_state->has_audio) {
> + /* if Audio mmio/verbs lies in PG0 */
> + if (IS_DG1(dev_priv) || DISPLAY_VER(dev_priv) >= 11)
> + mask |= BIT_ULL(POWER_DOMAIN_DISPLAY_CORE);
> + else
> + mask |= BIT_ULL(POWER_DOMAIN_AUDIO);
Power domains are supposed to be abstract. So if the audio stuff
is moving to a different power well then we just need to adjust
the domain for the relevant power wells.
> + }
>
> if (crtc_state->shared_dpll)
> mask |= BIT_ULL(POWER_DOMAIN_DISPLAY_CORE);
> --
> 2.26.2
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2021-04-30 17:40 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-01 10:15 [Intel-gfx] [RFC] drm/i915: lpsp with hdmi/dp outputs Anshuman Gupta
2020-06-01 11:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-06-01 12:49 ` [Intel-gfx] [RFC] " Shankar, Uma
2020-06-02 12:06 ` Anshuman Gupta
2020-06-02 13:02 ` Shankar, Uma
2020-06-01 14:11 ` Ville Syrjälä
2020-06-02 12:28 ` Anshuman Gupta
2020-06-03 10:05 ` Ville Syrjälä
2020-06-01 15:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
2021-04-30 11:53 ` [Intel-gfx] [RFC v2] " Anshuman Gupta
2021-04-30 17:40 ` Ville Syrjälä [this message]
2021-05-03 13:50 ` Gupta, Anshuman
2021-05-03 10:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: lpsp with hdmi/dp outputs (rev2) Patchwork
2021-05-03 12:35 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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