* [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups
@ 2022-06-22 15:54 Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Split g4x_compute_pipe_wm() into two Ville Syrjala
` (10 more replies)
0 siblings, 11 replies; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fix some remaining issues around plane updates vs. CxSR on
gmch platforms. Also throw in a few watermark fixes/cleanups,
and finally flip on atomic for g4x since everything is ready.
v2: Just rebase from a year ago
Ville Syrjälä (9):
drm/i915: Split g4x_compute_pipe_wm() into two
drm/i915: Split vlv_compute_pipe_wm() into two
drm/i915: Simplify up g4x watermark sanitation
drm/i915: Simplify up vlv watermark sanitation
drm/i915: Add missing invalidate to g4x wm readout
drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes
drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
drm/i915: Write watermarks for disabled pipes on gmch platforms
drm/i915: Enable atomic by default on ctg/elk
.../gpu/drm/i915/display/intel_atomic_plane.c | 53 ++++-
drivers/gpu/drm/i915/display/intel_color.c | 4 +
drivers/gpu/drm/i915/display/intel_display.c | 4 +-
drivers/gpu/drm/i915/i915_driver.c | 7 +-
drivers/gpu/drm/i915/intel_pm.c | 206 ++++++++++--------
5 files changed, 165 insertions(+), 109 deletions(-)
--
2.35.1
^ permalink raw reply [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 1/9] drm/i915: Split g4x_compute_pipe_wm() into two
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
@ 2022-06-22 15:54 ` Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Split vlv_compute_pipe_wm() " Ville Syrjala
` (9 subsequent siblings)
10 siblings, 0 replies; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Split g4x_compute_pipe_wm() into two halves. The first half computes
the new raw watermarks, and the second half munges those up into real
watermarks for the particular pipe.
We can reuse the second half for watermark sanitation as well.
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 54 +++++++++++++++++++--------------
1 file changed, 31 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9b7e93ca1ff9..395ed3c832d6 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1376,34 +1376,14 @@ static bool g4x_compute_fbc_en(const struct g4x_wm_state *wm_state,
return true;
}
-static int g4x_compute_pipe_wm(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+static int _g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
{
- struct intel_crtc_state *crtc_state =
- intel_atomic_get_new_crtc_state(state, crtc);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
const struct g4x_pipe_wm *raw;
- const struct intel_plane_state *old_plane_state;
- const struct intel_plane_state *new_plane_state;
- struct intel_plane *plane;
enum plane_id plane_id;
- int i, level;
- unsigned int dirty = 0;
-
- for_each_oldnew_intel_plane_in_state(state, plane,
- old_plane_state,
- new_plane_state, i) {
- if (new_plane_state->hw.crtc != &crtc->base &&
- old_plane_state->hw.crtc != &crtc->base)
- continue;
-
- if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
- dirty |= BIT(plane->id);
- }
-
- if (!dirty)
- return 0;
+ int level;
level = G4X_WM_LEVEL_NORMAL;
if (!g4x_raw_crtc_wm_is_valid(crtc_state, level))
@@ -1456,6 +1436,34 @@ static int g4x_compute_pipe_wm(struct intel_atomic_state *state,
return 0;
}
+static int g4x_compute_pipe_wm(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
+{
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+ const struct intel_plane_state *old_plane_state;
+ const struct intel_plane_state *new_plane_state;
+ struct intel_plane *plane;
+ unsigned int dirty = 0;
+ int i;
+
+ for_each_oldnew_intel_plane_in_state(state, plane,
+ old_plane_state,
+ new_plane_state, i) {
+ if (new_plane_state->hw.crtc != &crtc->base &&
+ old_plane_state->hw.crtc != &crtc->base)
+ continue;
+
+ if (g4x_raw_plane_wm_compute(crtc_state, new_plane_state))
+ dirty |= BIT(plane->id);
+ }
+
+ if (!dirty)
+ return 0;
+
+ return _g4x_compute_pipe_wm(crtc_state);
+}
+
static int g4x_compute_intermediate_wm(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 2/9] drm/i915: Split vlv_compute_pipe_wm() into two
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Split g4x_compute_pipe_wm() into two Ville Syrjala
@ 2022-06-22 15:54 ` Ville Syrjala
2022-09-21 15:07 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Simplify up g4x watermark sanitation Ville Syrjala
` (8 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Split vlv_compute_pipe_wm() into two halves. The first half computes
the new raw watermarks, and the second half munges those up into real
watermarks for the particular pipe.
We can reuse the second half for watermark sanitation as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 114 ++++++++++++++++++--------------
1 file changed, 64 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 395ed3c832d6..4ea43fa73075 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1904,64 +1904,17 @@ static bool vlv_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state,
vlv_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);
}
-static int vlv_compute_pipe_wm(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+static int _vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct intel_crtc_state *crtc_state =
- intel_atomic_get_new_crtc_state(state, crtc);
struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
const struct vlv_fifo_state *fifo_state =
&crtc_state->wm.vlv.fifo_state;
u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
int num_active_planes = hweight8(active_planes);
- bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi);
- const struct intel_plane_state *old_plane_state;
- const struct intel_plane_state *new_plane_state;
- struct intel_plane *plane;
enum plane_id plane_id;
- int level, ret, i;
- unsigned int dirty = 0;
-
- for_each_oldnew_intel_plane_in_state(state, plane,
- old_plane_state,
- new_plane_state, i) {
- if (new_plane_state->hw.crtc != &crtc->base &&
- old_plane_state->hw.crtc != &crtc->base)
- continue;
-
- if (vlv_raw_plane_wm_compute(crtc_state, new_plane_state))
- dirty |= BIT(plane->id);
- }
-
- /*
- * DSPARB registers may have been reset due to the
- * power well being turned off. Make sure we restore
- * them to a consistent state even if no primary/sprite
- * planes are initially active.
- */
- if (needs_modeset)
- crtc_state->fifo_changed = true;
-
- if (!dirty)
- return 0;
-
- /* cursor changes don't warrant a FIFO recompute */
- if (dirty & ~BIT(PLANE_CURSOR)) {
- const struct intel_crtc_state *old_crtc_state =
- intel_atomic_get_old_crtc_state(state, crtc);
- const struct vlv_fifo_state *old_fifo_state =
- &old_crtc_state->wm.vlv.fifo_state;
-
- ret = vlv_compute_fifo(crtc_state);
- if (ret)
- return ret;
-
- if (needs_modeset ||
- memcmp(old_fifo_state, fifo_state,
- sizeof(*fifo_state)) != 0)
- crtc_state->fifo_changed = true;
- }
+ int level;
/* initially allow all levels */
wm_state->num_levels = intel_wm_num_levels(dev_priv);
@@ -2008,6 +1961,67 @@ static int vlv_compute_pipe_wm(struct intel_atomic_state *state,
return 0;
}
+static int vlv_compute_pipe_wm(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
+{
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+ bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi);
+ const struct intel_plane_state *old_plane_state;
+ const struct intel_plane_state *new_plane_state;
+ struct intel_plane *plane;
+ unsigned int dirty = 0;
+ int i;
+
+ for_each_oldnew_intel_plane_in_state(state, plane,
+ old_plane_state,
+ new_plane_state, i) {
+ if (new_plane_state->hw.crtc != &crtc->base &&
+ old_plane_state->hw.crtc != &crtc->base)
+ continue;
+
+ if (vlv_raw_plane_wm_compute(crtc_state, new_plane_state))
+ dirty |= BIT(plane->id);
+ }
+
+ /*
+ * DSPARB registers may have been reset due to the
+ * power well being turned off. Make sure we restore
+ * them to a consistent state even if no primary/sprite
+ * planes are initially active. We also force a FIFO
+ * recomputation so that we are sure to sanitize the
+ * FIFO setting we took over from the BIOS even if there
+ * are no active planes on the crtc.
+ */
+ if (needs_modeset)
+ dirty = ~0;
+
+ if (!dirty)
+ return 0;
+
+ /* cursor changes don't warrant a FIFO recompute */
+ if (dirty & ~BIT(PLANE_CURSOR)) {
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+ const struct vlv_fifo_state *old_fifo_state =
+ &old_crtc_state->wm.vlv.fifo_state;
+ const struct vlv_fifo_state *new_fifo_state =
+ &crtc_state->wm.vlv.fifo_state;
+ int ret;
+
+ ret = vlv_compute_fifo(crtc_state);
+ if (ret)
+ return ret;
+
+ if (needs_modeset ||
+ memcmp(old_fifo_state, new_fifo_state,
+ sizeof(*new_fifo_state)) != 0)
+ crtc_state->fifo_changed = true;
+ }
+
+ return _vlv_compute_pipe_wm(crtc_state);
+}
+
#define VLV_FIFO(plane, value) \
(((value) << DSPARB_ ## plane ## _SHIFT_VLV) & DSPARB_ ## plane ## _MASK_VLV)
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 3/9] drm/i915: Simplify up g4x watermark sanitation
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Split g4x_compute_pipe_wm() into two Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Split vlv_compute_pipe_wm() " Ville Syrjala
@ 2022-06-22 15:54 ` Ville Syrjala
2022-09-21 15:10 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv " Ville Syrjala
` (7 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We can simplify the g4x watermark sanitation by reusing the
second half of g4x_compute_pipe_wm() to convert the sanitized
raw watermarks into the proper form to be used as the
optimal/intermediate watermarks.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 21 +++++++--------------
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4ea43fa73075..556fcdfb75f1 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6951,37 +6951,30 @@ void g4x_wm_sanitize(struct drm_i915_private *dev_priv)
to_intel_crtc_state(crtc->base.state);
struct intel_plane_state *plane_state =
to_intel_plane_state(plane->base.state);
- struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
enum plane_id plane_id = plane->id;
- int level;
+ int level, num_levels = intel_wm_num_levels(dev_priv);
if (plane_state->uapi.visible)
continue;
- for (level = 0; level < 3; level++) {
+ for (level = 0; level < num_levels; level++) {
struct g4x_pipe_wm *raw =
&crtc_state->wm.g4x.raw[level];
raw->plane[plane_id] = 0;
- wm_state->wm.plane[plane_id] = 0;
- }
- if (plane_id == PLANE_PRIMARY) {
- for (level = 0; level < 3; level++) {
- struct g4x_pipe_wm *raw =
- &crtc_state->wm.g4x.raw[level];
+ if (plane_id == PLANE_PRIMARY)
raw->fbc = 0;
- }
-
- wm_state->sr.fbc = 0;
- wm_state->hpll.fbc = 0;
- wm_state->fbc_en = false;
}
}
for_each_intel_crtc(&dev_priv->drm, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
+ int ret;
+
+ ret = _g4x_compute_pipe_wm(crtc_state);
+ drm_WARN_ON(&dev_priv->drm, ret);
crtc_state->wm.g4x.intermediate =
crtc_state->wm.g4x.optimal;
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv watermark sanitation
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
` (2 preceding siblings ...)
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Simplify up g4x watermark sanitation Ville Syrjala
@ 2022-06-22 15:54 ` Ville Syrjala
2022-09-21 15:13 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing invalidate to g4x wm readout Ville Syrjala
` (6 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We can simplify the vlv watermark sanitation by reusing the
second half of vlv_compute_pipe_wm() to convert the sanitized
raw watermarks into the proper form to be used as the
optimal/intermediate watermarks.
Also to be consistent with normal watermark computation the sanitized
watermarks should be all 0 for any disabled plane. Previously we
zeroed out the watermarks only up to the level (ie. PM2/5/DVDFS)
that was enabled.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 556fcdfb75f1..45ec00e2e3c4 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7100,30 +7100,27 @@ void vlv_wm_sanitize(struct drm_i915_private *dev_priv)
to_intel_crtc_state(crtc->base.state);
struct intel_plane_state *plane_state =
to_intel_plane_state(plane->base.state);
- struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
- const struct vlv_fifo_state *fifo_state =
- &crtc_state->wm.vlv.fifo_state;
enum plane_id plane_id = plane->id;
- int level;
+ int level, num_levels = intel_wm_num_levels(dev_priv);
if (plane_state->uapi.visible)
continue;
- for (level = 0; level < wm_state->num_levels; level++) {
+ for (level = 0; level < num_levels; level++) {
struct g4x_pipe_wm *raw =
&crtc_state->wm.vlv.raw[level];
raw->plane[plane_id] = 0;
-
- wm_state->wm[level].plane[plane_id] =
- vlv_invert_wm_value(raw->plane[plane_id],
- fifo_state->plane[plane_id]);
}
}
for_each_intel_crtc(&dev_priv->drm, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
+ int ret;
+
+ ret = _vlv_compute_pipe_wm(crtc_state);
+ drm_WARN_ON(&dev_priv->drm, ret);
crtc_state->wm.vlv.intermediate =
crtc_state->wm.vlv.optimal;
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing invalidate to g4x wm readout
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
` (3 preceding siblings ...)
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv " Ville Syrjala
@ 2022-06-22 15:54 ` Ville Syrjala
2022-09-21 15:14 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes Ville Syrjala
` (5 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Let's not forget to mark the unused watermark levels as invalid
after the readout. The vlv/chv codepath has this but the g4x
didn't for some reason.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 45ec00e2e3c4..734deb0bd867 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6915,6 +6915,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
plane_id, USHRT_MAX);
g4x_raw_fbc_wm_set(crtc_state, level, USHRT_MAX);
+ g4x_invalidate_wms(crtc, active, level);
+
crtc_state->wm.g4x.optimal = *active;
crtc_state->wm.g4x.intermediate = *active;
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 6/9] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
` (4 preceding siblings ...)
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing invalidate to g4x wm readout Ville Syrjala
@ 2022-06-22 15:54 ` Ville Syrjala
2022-10-07 5:57 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms Ville Syrjala
` (4 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
On g4x/vlv/chv the hardware seems incapable of changing the pixel
format, rotation, or YUV->RGB CSC matrix while in CxSR.
Additionally on VLV/CHV the sprites seem incapable of tiling
changes while in CxSR. On g4x CxSR is not even possible with
the sprite enabled. Curiously the primary plane seems perfectly
happy when changing tiling during CxSR.
Pimp up the code to account for these when determining whether
CxSR needs to be disabled. Since it looks like most of the plane
control register bits are affected let's just compare that.
But in the name of efficiency we'll make an exception for the
primary plane tiling changes (avoids some extra vblank waits).
v2: Just use the pre-computed plane control register values
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 53 ++++++++++++++++---
1 file changed, 45 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index efe8591619e3..e5ad6a437a97 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -426,6 +426,47 @@ static bool intel_plane_do_async_flip(struct intel_plane *plane,
return DISPLAY_VER(i915) < 13 || old_crtc_state->uapi.async_flip;
}
+static bool i9xx_must_disable_cxsr(const struct intel_crtc_state *new_crtc_state,
+ const struct intel_plane_state *old_plane_state,
+ const struct intel_plane_state *new_plane_state)
+{
+ struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
+ bool old_visible = old_plane_state->uapi.visible;
+ bool new_visible = new_plane_state->uapi.visible;
+ u32 old_ctl = old_plane_state->ctl;
+ u32 new_ctl = new_plane_state->ctl;
+ bool modeset, turn_on, turn_off;
+
+ if (plane->id == PLANE_CURSOR)
+ return false;
+
+ modeset = intel_crtc_needs_modeset(new_crtc_state);
+ turn_off = old_visible && (!new_visible || modeset);
+ turn_on = new_visible && (!old_visible || modeset);
+
+ /* Must disable CxSR around plane enable/disable */
+ if (turn_on || turn_off)
+ return true;
+
+ if (!old_visible || !new_visible)
+ return false;
+
+ /*
+ * Most plane control register updates are blocked while in CxSR.
+ *
+ * Tiling mode is one exception where the primary plane can
+ * apparently handle it, whereas the sprites can not (the
+ * sprite issue being only relevant on VLV/CHV where CxSR
+ * is actually possible with a sprite enabled).
+ */
+ if (plane->id == PLANE_PRIMARY) {
+ old_ctl &= ~DISP_TILED;
+ new_ctl &= ~DISP_TILED;
+ }
+
+ return old_ctl != new_ctl;
+}
+
static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_state,
struct intel_crtc_state *new_crtc_state,
const struct intel_plane_state *old_plane_state,
@@ -483,17 +524,9 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr
if (turn_on) {
if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
new_crtc_state->update_wm_pre = true;
-
- /* must disable cxsr around plane enable/disable */
- if (plane->id != PLANE_CURSOR)
- new_crtc_state->disable_cxsr = true;
} else if (turn_off) {
if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
new_crtc_state->update_wm_post = true;
-
- /* must disable cxsr around plane enable/disable */
- if (plane->id != PLANE_CURSOR)
- new_crtc_state->disable_cxsr = true;
} else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
/* FIXME bollocks */
@@ -505,6 +538,10 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr
if (visible || was_visible)
new_crtc_state->fb_bits |= plane->frontbuffer_bit;
+ if (HAS_GMCH(dev_priv) &&
+ i9xx_must_disable_cxsr(new_crtc_state, old_plane_state, new_plane_state))
+ new_crtc_state->disable_cxsr = true;
+
/*
* ILK/SNB DVSACNTR/Sprite Enable
* IVB SPR_CTL/Sprite Enable
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
` (5 preceding siblings ...)
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes Ville Syrjala
@ 2022-06-22 15:54 ` Ville Syrjala
2022-10-07 6:01 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes " Ville Syrjala
` (3 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Like most other plane control register bits, the pipe gamma
enable bit is also blocked by CxSR. So make sure we kick the
machine out of CxSR before trying to change that bit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index a27ce874a9e8..bc01a7d3b0d3 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1305,6 +1305,10 @@ intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state)
return PTR_ERR(plane_state);
new_crtc_state->update_planes |= BIT(plane->id);
+
+ /* plane control register changes blocked by CxSR */
+ if (HAS_GMCH(dev_priv))
+ new_crtc_state->disable_cxsr = true;
}
return 0;
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes on gmch platforms
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
` (6 preceding siblings ...)
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms Ville Syrjala
@ 2022-06-22 15:54 ` Ville Syrjala
2022-10-07 6:03 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk Ville Syrjala
` (2 subsequent siblings)
10 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We've excluded gmch platforms from writing the final watermarks
for any disabled pipe. IIRC the reason was perhaps some lingering
issue with the watermark merging across the pipes. But I can't
really see any reason for this anymore, so let's unify this behaviour.
The main benefit being more consistency in register dumps when
we don't have stale watermarks hanging around in the registers.
Functionally there should be no difference as the hardware just
ignore all of it when the pipe is disabled.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 903226e2a626..2c5dadc62c55 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7192,9 +7192,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
intel_fbc_disable(crtc);
intel_disable_shared_dpll(old_crtc_state);
- /* FIXME unify this for all platforms */
- if (!new_crtc_state->hw.active &&
- !HAS_GMCH(dev_priv))
+ if (!new_crtc_state->hw.active)
intel_initial_watermarks(state, crtc);
}
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
` (7 preceding siblings ...)
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes " Ville Syrjala
@ 2022-06-22 15:54 ` Ville Syrjala
2022-06-23 18:34 ` Jani Nikula
2022-06-22 23:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3) Patchwork
2022-06-27 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 1 reply; 21+ messages in thread
From: Ville Syrjala @ 2022-06-22 15:54 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The watermark code for ctg/elk has been atomic ready for a long time
so let's just flip the switch now that some of the last CxSR issues
have been sorted out (which granted was a problem for vlv/chv as well
despite them already having atomic enabled by default).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_driver.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 0e224761d0ed..d4e544d6b28f 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -841,8 +841,11 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (IS_ERR(i915))
return PTR_ERR(i915);
- /* Disable nuclear pageflip by default on pre-ILK */
- if (!i915->params.nuclear_pageflip && match_info->graphics.ver < 5)
+ /* Disable nuclear pageflip by default on pre-CTG/ELK */
+ if (!i915->params.nuclear_pageflip &&
+ match_info->display.ver < 5 &&
+ match_info->platform != INTEL_G45 &&
+ match_info->platform != INTEL_GM45)
i915->drm.driver_features &= ~DRIVER_ATOMIC;
ret = pci_enable_device(pdev);
--
2.35.1
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3)
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
` (8 preceding siblings ...)
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk Ville Syrjala
@ 2022-06-22 23:02 ` Patchwork
2022-06-27 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2022-06-22 23:02 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7155 bytes --]
== Series Details ==
Series: drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/90164/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11794 -> Patchwork_90164v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/index.html
Participating hosts (42 -> 40)
------------------------------
Missing (2): fi-cml-u2 fi-bdw-samus
Known issues
------------
Here are the changes found in Patchwork_90164v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@gem:
- fi-blb-e6850: NOTRUN -> [DMESG-FAIL][1] ([i915#4528])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/fi-blb-e6850/igt@i915_selftest@live@gem.html
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [PASS][2] -> [INCOMPLETE][3] ([i915#3921])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
- bat-dg1-6: NOTRUN -> [DMESG-FAIL][4] ([i915#4494] / [i915#4957])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@basic-s2idle-without-i915:
- bat-dg1-6: NOTRUN -> [INCOMPLETE][5] ([i915#6011])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/bat-dg1-6/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@kms_flip@basic-flip-vs-modeset@a-edp1:
- fi-tgl-u2: [PASS][6] -> [DMESG-WARN][7] ([i915#402])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/fi-tgl-u2/igt@kms_flip@basic-flip-vs-modeset@a-edp1.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/fi-tgl-u2/igt@kms_flip@basic-flip-vs-modeset@a-edp1.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0@smem:
- {fi-ehl-2}: [DMESG-WARN][8] ([i915#5122]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_selftest@live@gt_engines:
- bat-dg1-6: [INCOMPLETE][10] ([i915#4418]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/bat-dg1-6/igt@i915_selftest@live@gt_engines.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/bat-dg1-6/igt@i915_selftest@live@gt_engines.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [DMESG-FAIL][12] ([i915#4528]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/fi-blb-e6850/igt@i915_selftest@live@requests.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
- fi-kbl-soraka: [INCOMPLETE][14] -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/fi-kbl-soraka/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/fi-kbl-soraka/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
* {igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size}:
- fi-bsw-kefka: [FAIL][16] -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@basic-flip-before-cursor@atomic-transitions-varying-size:
- fi-elk-e7500: [SKIP][18] ([fdo#109271]) -> [PASS][19] +9 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/fi-elk-e7500/igt@kms_cursor_legacy@basic-flip-before-cursor@atomic-transitions-varying-size.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/fi-elk-e7500/igt@kms_cursor_legacy@basic-flip-before-cursor@atomic-transitions-varying-size.html
#### Warnings ####
* igt@kms_chamelium@hdmi-edid-read:
- fi-elk-e7500: [SKIP][20] ([fdo#109271]) -> [SKIP][21] ([fdo#109271] / [fdo#111827]) +8 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/fi-elk-e7500/igt@kms_chamelium@hdmi-edid-read.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/fi-elk-e7500/igt@kms_chamelium@hdmi-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#4418]: https://gitlab.freedesktop.org/drm/intel/issues/4418
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#5270]: https://gitlab.freedesktop.org/drm/intel/issues/5270
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5763]: https://gitlab.freedesktop.org/drm/intel/issues/5763
[i915#5903]: https://gitlab.freedesktop.org/drm/intel/issues/5903
[i915#6011]: https://gitlab.freedesktop.org/drm/intel/issues/6011
Build changes
-------------
* Linux: CI_DRM_11794 -> Patchwork_90164v3
CI-20190529: 20190529
CI_DRM_11794: 529f44f159dbe70ba69b6f730280d5db9b7338bc @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6539: c39caed3b207e058409f5e2b548a4f940b6283c6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_90164v3: 529f44f159dbe70ba69b6f730280d5db9b7338bc @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
8f7f02399c9d drm/i915: Enable atomic by default on ctg/elk
84fe2ce3064e drm/i915: Write watermarks for disabled pipes on gmch platforms
bd7f9de81266 drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
824c7f66b3ba drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes
e9d301f3116e drm/i915: Add missing invalidate to g4x wm readout
ffe69336e071 drm/i915: Simplify up vlv watermark sanitation
ca57b7bb38ec drm/i915: Simplify up g4x watermark sanitation
7dbe6e1f890c drm/i915: Split vlv_compute_pipe_wm() into two
dabb663fa815 drm/i915: Split g4x_compute_pipe_wm() into two
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/index.html
[-- Attachment #2: Type: text/html, Size: 7962 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk Ville Syrjala
@ 2022-06-23 18:34 ` Jani Nikula
0 siblings, 0 replies; 21+ messages in thread
From: Jani Nikula @ 2022-06-23 18:34 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
On Wed, 22 Jun 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The watermark code for ctg/elk has been atomic ready for a long time
> so let's just flip the switch now that some of the last CxSR issues
> have been sorted out (which granted was a problem for vlv/chv as well
> despite them already having atomic enabled by default).
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_driver.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 0e224761d0ed..d4e544d6b28f 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -841,8 +841,11 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
> if (IS_ERR(i915))
> return PTR_ERR(i915);
>
> - /* Disable nuclear pageflip by default on pre-ILK */
> - if (!i915->params.nuclear_pageflip && match_info->graphics.ver < 5)
> + /* Disable nuclear pageflip by default on pre-CTG/ELK */
> + if (!i915->params.nuclear_pageflip &&
> + match_info->display.ver < 5 &&
> + match_info->platform != INTEL_G45 &&
> + match_info->platform != INTEL_GM45)
There's no reason to use match_info here, at all. See [1]. So this could
just be IS_G4X(i915).
BR,
Jani.
[1] https://lore.kernel.org/r/473e9c4d9c5a21d742b72dad27cca87402796abb.1655712106.git.jani.nikula@intel.com
> i915->drm.driver_features &= ~DRIVER_ATOMIC;
>
> ret = pci_enable_device(pdev);
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 21+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3)
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
` (9 preceding siblings ...)
2022-06-22 23:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3) Patchwork
@ 2022-06-27 11:01 ` Patchwork
10 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2022-06-27 11:01 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 59707 bytes --]
== Series Details ==
Series: drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3)
URL : https://patchwork.freedesktop.org/series/90164/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11794_full -> Patchwork_90164v3_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_90164v3_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_90164v3_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 13)
------------------------------
Additional (3): shard-rkl shard-dg1 shard-tglu
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_90164v3_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-32x32:
- {shard-tglu}: NOTRUN -> [SKIP][3] +23 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglu-1/igt@kms_cursor_crc@cursor-offscreen@pipe-c-hdmi-a-1-32x32.html
* igt@kms_cursor_crc@cursor-onscreen@pipe-a-hdmi-a-1-32x10:
- {shard-dg1}: NOTRUN -> [SKIP][4] +31 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-dg1-13/igt@kms_cursor_crc@cursor-onscreen@pipe-a-hdmi-a-1-32x10.html
New tests
---------
New tests have been introduced between CI_DRM_11794_full and Patchwork_90164v3_full:
### New IGT tests (3) ###
* igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-128x128:
- Statuses : 1 pass(s)
- Exec time: [3.21] s
* igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-256x256:
- Statuses : 1 pass(s)
- Exec time: [3.23] s
* igt@kms_cursor_edge_walk@top-bottom@pipe-a-hdmi-a-3-64x64:
- Statuses : 1 pass(s)
- Exec time: [3.29] s
Known issues
------------
Here are the changes found in Patchwork_90164v3_full that come from known issues:
### CI changes ###
#### Issues hit ####
* boot:
- shard-skl: ([PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26]) -> ([PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [FAIL][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47]) ([i915#5032])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl9/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl9/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl9/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl7/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl7/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl6/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl6/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl6/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl4/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl4/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl4/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl3/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl3/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl3/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl2/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl2/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl1/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl1/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl1/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl10/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl10/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl10/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl9/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl9/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl9/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl7/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl7/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl7/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl6/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl4/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl4/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl3/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl3/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl3/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl2/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl2/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl1/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl1/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl1/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl1/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl10/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl10/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl10/boot.html
#### Possible fixes ####
* boot:
- shard-apl: ([PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [FAIL][71], [PASS][72]) ([i915#4386]) -> ([PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/boot.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl7/boot.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/boot.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl3/boot.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/boot.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/boot.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/boot.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/boot.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/boot.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl1/boot.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl1/boot.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl1/boot.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl1/boot.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl3/boot.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl3/boot.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl3/boot.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/boot.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/boot.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/boot.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/boot.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl7/boot.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl7/boot.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl7/boot.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl7/boot.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl7/boot.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl8/boot.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl8/boot.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl8/boot.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl8/boot.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl2/boot.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl2/boot.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl2/boot.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl3/boot.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl3/boot.html
### IGT changes ###
#### Issues hit ####
* igt@drm_read@short-buffer-block:
- shard-snb: [PASS][98] -> [SKIP][99] ([fdo#109271]) +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-snb2/igt@drm_read@short-buffer-block.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-snb5/igt@drm_read@short-buffer-block.html
* igt@gem_ccs@block-copy-inplace:
- shard-tglb: NOTRUN -> [SKIP][100] ([i915#3555] / [i915#5325])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@gem_ccs@block-copy-inplace.html
* igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-apl: [PASS][101] -> [DMESG-WARN][102] ([i915#180]) +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/igt@gem_ctx_isolation@preservation-s3@rcs0.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl8/igt@gem_ctx_isolation@preservation-s3@rcs0.html
* igt@gem_ctx_persistence@idempotent:
- shard-snb: NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#1099])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-snb4/igt@gem_ctx_persistence@idempotent.html
* igt@gem_eio@kms:
- shard-tglb: [PASS][104] -> [FAIL][105] ([i915#5784])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-tglb6/igt@gem_eio@kms.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb3/igt@gem_eio@kms.html
* igt@gem_exec_balancer@parallel-out-fence:
- shard-iclb: [PASS][106] -> [SKIP][107] ([i915#4525])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb4/igt@gem_exec_balancer@parallel-out-fence.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb5/igt@gem_exec_balancer@parallel-out-fence.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-tglb: NOTRUN -> [FAIL][108] ([i915#2842])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@gem_exec_fair@basic-none-solo@rcs0.html
- shard-kbl: NOTRUN -> [FAIL][109] ([i915#2842])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-apl: [PASS][110] -> [FAIL][111] ([i915#2842])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/igt@gem_exec_fair@basic-none@vcs0.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl8/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-iclb: [PASS][112] -> [FAIL][113] ([i915#2842])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb1/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-tglb: [PASS][114] -> [FAIL][115] ([i915#2842]) +2 similar issues
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-tglb5/igt@gem_exec_fair@basic-pace@vcs1.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb5/igt@gem_exec_fair@basic-pace@vcs1.html
- shard-kbl: [PASS][116] -> [SKIP][117] ([fdo#109271])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs1.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [PASS][118] -> [FAIL][119] ([i915#2842]) +2 similar issues
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl4/igt@gem_exec_fair@basic-pace@vecs0.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-apl: NOTRUN -> [SKIP][120] ([fdo#109271] / [i915#4613])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
* igt@gem_lmem_swapping@random:
- shard-tglb: NOTRUN -> [SKIP][121] ([i915#4613]) +2 similar issues
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@gem_lmem_swapping@random.html
- shard-kbl: NOTRUN -> [SKIP][122] ([fdo#109271] / [i915#4613]) +2 similar issues
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl1/igt@gem_lmem_swapping@random.html
* igt@gem_lmem_swapping@smem-oom:
- shard-skl: NOTRUN -> [SKIP][123] ([fdo#109271] / [i915#4613]) +2 similar issues
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl7/igt@gem_lmem_swapping@smem-oom.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [PASS][124] -> [FAIL][125] ([i915#644])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-glk9/igt@gem_ppgtt@flink-and-close-vma-leak.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-glk5/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_pwrite@basic-exhaustion:
- shard-tglb: NOTRUN -> [WARN][126] ([i915#2658])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_spin_batch@user-each:
- shard-skl: [PASS][127] -> [FAIL][128] ([i915#2898])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl4/igt@gem_spin_batch@user-each.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl3/igt@gem_spin_batch@user-each.html
* igt@gem_userptr_blits@input-checking:
- shard-skl: NOTRUN -> [DMESG-WARN][129] ([i915#4991])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl1/igt@gem_userptr_blits@input-checking.html
* igt@gem_userptr_blits@vma-merge:
- shard-apl: NOTRUN -> [FAIL][130] ([i915#3318])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/igt@gem_userptr_blits@vma-merge.html
* igt@gen3_render_tiledx_blits:
- shard-tglb: NOTRUN -> [SKIP][131] ([fdo#109289])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@gen3_render_tiledx_blits.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][132] -> [DMESG-WARN][133] ([i915#5566] / [i915#716])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl4/igt@gen9_exec_parse@allowed-single.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl3/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@bb-start-cmd:
- shard-tglb: NOTRUN -> [SKIP][134] ([i915#2527] / [i915#2856]) +1 similar issue
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@gen9_exec_parse@bb-start-cmd.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-apl: NOTRUN -> [SKIP][135] ([fdo#109271] / [i915#658]) +1 similar issue
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl1/igt@i915_pm_dc@dc3co-vpb-simulation.html
- shard-kbl: NOTRUN -> [SKIP][136] ([fdo#109271] / [i915#658])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl3/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_dc@dc9-dpms:
- shard-iclb: [PASS][137] -> [SKIP][138] ([i915#4281])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb4/igt@i915_pm_dc@dc9-dpms.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_rpm@pc8-residency:
- shard-tglb: NOTRUN -> [SKIP][139] ([fdo#109506] / [i915#2411])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@i915_pm_rpm@pc8-residency.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180:
- shard-tglb: NOTRUN -> [SKIP][140] ([i915#5286]) +2 similar issues
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [SKIP][141] ([fdo#109271]) +212 similar issues
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-tglb: NOTRUN -> [SKIP][142] ([fdo#111614]) +2 similar issues
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][143] ([fdo#109271] / [i915#3886]) +5 similar issues
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl2/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-a-bad-aux-stride-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][144] ([fdo#111615] / [i915#3689])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_ccs@pipe-a-bad-aux-stride-yf_tiled_ccs.html
* igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
- shard-kbl: NOTRUN -> [SKIP][145] ([fdo#109271] / [i915#3886]) +2 similar issues
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl3/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs:
- shard-tglb: NOTRUN -> [SKIP][146] ([i915#6095]) +2 similar issues
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][147] ([fdo#109271] / [i915#3886]) +6 similar issues
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl2/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-crc-primary-rotation-180-4_tiled_dg2_rc_ccs:
- shard-tglb: NOTRUN -> [SKIP][148] ([i915#3689] / [i915#6095])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_ccs@pipe-c-crc-primary-rotation-180-4_tiled_dg2_rc_ccs.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][149] ([i915#3689] / [i915#3886]) +1 similar issue
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][150] ([i915#3689]) +4 similar issues
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html
* igt@kms_chamelium@dp-crc-single:
- shard-tglb: NOTRUN -> [SKIP][151] ([fdo#109284] / [fdo#111827]) +6 similar issues
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_chamelium@dp-crc-single.html
* igt@kms_chamelium@hdmi-hpd-with-enabled-mode:
- shard-snb: NOTRUN -> [SKIP][152] ([fdo#109271] / [fdo#111827]) +1 similar issue
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-snb4/igt@kms_chamelium@hdmi-hpd-with-enabled-mode.html
* igt@kms_color_chamelium@pipe-a-ctm-max:
- shard-kbl: NOTRUN -> [SKIP][153] ([fdo#109271] / [fdo#111827]) +4 similar issues
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl3/igt@kms_color_chamelium@pipe-a-ctm-max.html
* igt@kms_color_chamelium@pipe-b-ctm-0-25:
- shard-skl: NOTRUN -> [SKIP][154] ([fdo#109271] / [fdo#111827]) +10 similar issues
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl2/igt@kms_color_chamelium@pipe-b-ctm-0-25.html
* igt@kms_color_chamelium@pipe-d-ctm-max:
- shard-apl: NOTRUN -> [SKIP][155] ([fdo#109271] / [fdo#111827]) +7 similar issues
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl2/igt@kms_color_chamelium@pipe-d-ctm-max.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-tglb: NOTRUN -> [SKIP][156] ([i915#3116] / [i915#3299])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-4tiled:
- shard-tglb: NOTRUN -> [SKIP][157] ([i915#5287])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-4tiled.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-tglb: [PASS][158] -> [INCOMPLETE][159] ([i915#2411] / [i915#6021])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-tglb2/igt@kms_fbcon_fbt@fbc-suspend.html
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb8/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
- shard-tglb: NOTRUN -> [SKIP][160] ([fdo#109274] / [fdo#111825]) +2 similar issues
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][161] -> [FAIL][162] ([i915#79])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-apl: NOTRUN -> [SKIP][163] ([fdo#109271]) +117 similar issues
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-skl: [PASS][164] -> [FAIL][165] ([i915#2122]) +1 similar issue
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-kbl: [PASS][166] -> [DMESG-WARN][167] ([i915#180]) +2 similar issues
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl3/igt@kms_flip@flip-vs-suspend@a-dp1.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl7/igt@kms_flip@flip-vs-suspend@a-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-skl: NOTRUN -> [SKIP][168] ([fdo#109271] / [i915#3701]) +1 similar issue
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-iclb: [PASS][169] -> [SKIP][170] ([i915#3701])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
- shard-tglb: NOTRUN -> [SKIP][171] ([fdo#109280] / [fdo#111825]) +6 similar issues
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_hdr@bpc-switch@pipe-a-dp-1:
- shard-kbl: [PASS][172] -> [FAIL][173] ([i915#1188])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl3/igt@kms_hdr@bpc-switch@pipe-a-dp-1.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl4/igt@kms_hdr@bpc-switch@pipe-a-dp-1.html
* igt@kms_hdr@static-toggle:
- shard-tglb: NOTRUN -> [SKIP][174] ([i915#3555])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_hdr@static-toggle.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
- shard-kbl: NOTRUN -> [FAIL][175] ([i915#265])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl3/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-kbl: NOTRUN -> [FAIL][176] ([fdo#108145] / [i915#265])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl1/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
- shard-skl: NOTRUN -> [FAIL][177] ([i915#265])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
* igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
- shard-tglb: NOTRUN -> [SKIP][178] ([fdo#111615]) +1 similar issue
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_plane_multiple@atomic-pipe-a-tiling-yf.html
* igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-a-edp-1:
- shard-iclb: [PASS][179] -> [SKIP][180] ([i915#5176]) +2 similar issues
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb6/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-a-edp-1.html
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb2/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-a-edp-1.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
- shard-skl: NOTRUN -> [SKIP][181] ([fdo#109271] / [i915#658]) +2 similar issues
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl6/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@psr2_no_drrs:
- shard-tglb: NOTRUN -> [FAIL][182] ([i915#132] / [i915#3467])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@kms_psr@psr2_no_drrs.html
* igt@kms_writeback@writeback-check-output:
- shard-skl: NOTRUN -> [SKIP][183] ([fdo#109271] / [i915#2437])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl6/igt@kms_writeback@writeback-check-output.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-kbl: NOTRUN -> [SKIP][184] ([fdo#109271] / [i915#2437])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl3/igt@kms_writeback@writeback-invalid-parameters.html
* igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame:
- shard-tglb: NOTRUN -> [SKIP][185] ([i915#2530]) +1 similar issue
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame.html
* igt@perf_pmu@module-unload:
- shard-snb: NOTRUN -> [DMESG-WARN][186] ([i915#4528] / [i915#5296])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-snb4/igt@perf_pmu@module-unload.html
* igt@prime_nv_pcopy@test2:
- shard-kbl: NOTRUN -> [SKIP][187] ([fdo#109271]) +110 similar issues
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl1/igt@prime_nv_pcopy@test2.html
* igt@prime_nv_pcopy@test3_1:
- shard-tglb: NOTRUN -> [SKIP][188] ([fdo#109291]) +1 similar issue
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb2/igt@prime_nv_pcopy@test3_1.html
* igt@sysfs_clients@fair-3:
- shard-apl: NOTRUN -> [SKIP][189] ([fdo#109271] / [i915#2994]) +1 similar issue
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/igt@sysfs_clients@fair-3.html
* igt@sysfs_clients@sema-50:
- shard-skl: NOTRUN -> [SKIP][190] ([fdo#109271] / [i915#2994])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl6/igt@sysfs_clients@sema-50.html
* igt@sysfs_timeslice_duration@idempotent@vcs0:
- shard-snb: NOTRUN -> [SKIP][191] ([fdo#109271]) +48 similar issues
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-snb4/igt@sysfs_timeslice_duration@idempotent@vcs0.html
#### Possible fixes ####
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: [SKIP][192] ([i915#4525]) -> [PASS][193] +2 similar issues
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb3/igt@gem_exec_balancer@parallel-keep-submit-fence.html
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb4/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][194] ([i915#2842]) -> [PASS][195]
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][196] ([i915#2842]) -> [PASS][197] +1 similar issue
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-kbl: [FAIL][198] ([i915#2842]) -> [PASS][199]
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs0.html
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [FAIL][200] ([i915#2849]) -> [PASS][201]
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb1/igt@gem_exec_fair@basic-throttle@rcs0.html
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gen9_exec_parse@allowed-single:
- shard-kbl: [DMESG-WARN][202] ([i915#5566] / [i915#716]) -> [PASS][203]
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl1/igt@gen9_exec_parse@allowed-single.html
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl3/igt@gen9_exec_parse@allowed-single.html
- shard-apl: [DMESG-WARN][204] ([i915#5566] / [i915#716]) -> [PASS][205]
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/igt@gen9_exec_parse@allowed-single.html
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl1/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [FAIL][206] ([i915#454]) -> [PASS][207]
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb4/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rpm@system-suspend-execbuf:
- shard-skl: [TIMEOUT][208] -> [PASS][209]
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl3/igt@i915_pm_rpm@system-suspend-execbuf.html
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl7/igt@i915_pm_rpm@system-suspend-execbuf.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [INCOMPLETE][210] ([i915#3921]) -> [PASS][211]
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-snb5/igt@i915_selftest@live@hangcheck.html
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-snb4/igt@i915_selftest@live@hangcheck.html
- shard-tglb: [DMESG-WARN][212] ([i915#5591]) -> [PASS][213]
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-tglb1/igt@i915_selftest@live@hangcheck.html
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb5/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-skl: [INCOMPLETE][214] ([i915#4817]) -> [PASS][215]
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl1/igt@i915_suspend@basic-s3-without-i915.html
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl1/igt@i915_suspend@basic-s3-without-i915.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][216] ([i915#180]) -> [PASS][217]
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/igt@i915_suspend@sysfs-reader.html
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-glk: [FAIL][218] -> [PASS][219]
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
- shard-skl: [FAIL][220] ([i915#2122]) -> [PASS][221] +1 similar issue
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
* igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-1:
- shard-kbl: [FAIL][222] ([i915#1188]) -> [PASS][223]
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl1/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-1.html
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl6/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-1.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][224] ([fdo#109441]) -> [PASS][225] +1 similar issue
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [DMESG-WARN][226] ([i915#180]) -> [PASS][227] +2 similar issues
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
#### Warnings ####
* igt@gem_eio@unwedge-stress:
- shard-tglb: [TIMEOUT][228] ([i915#3063]) -> [FAIL][229] ([i915#5784])
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-tglb7/igt@gem_eio@unwedge-stress.html
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-tglb3/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-iclb: [FAIL][230] ([i915#6117]) -> [SKIP][231] ([i915#4525])
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb4/igt@gem_exec_balancer@parallel-ordering.html
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb5/igt@gem_exec_balancer@parallel-ordering.html
* igt@i915_pm_rpm@pc8-residency:
- shard-skl: [SKIP][232] ([fdo#109271]) -> [SKIP][233] ([fdo#109271] / [i915#1888]) +1 similar issue
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl1/igt@i915_pm_rpm@pc8-residency.html
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl10/igt@i915_pm_rpm@pc8-residency.html
* igt@kms_ccs@pipe-b-crc-primary-basic-4_tiled_dg2_mc_ccs:
- shard-skl: [SKIP][234] ([fdo#109271] / [i915#1888]) -> [SKIP][235] ([fdo#109271])
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl1/igt@kms_ccs@pipe-b-crc-primary-basic-4_tiled_dg2_mc_ccs.html
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl10/igt@kms_ccs@pipe-b-crc-primary-basic-4_tiled_dg2_mc_ccs.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-iclb: [SKIP][236] ([i915#2920]) -> [SKIP][237] ([fdo#111068] / [i915#658]) +1 similar issue
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb2/igt@kms_psr2_sf@cursor-plane-update-sf.html
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb6/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
- shard-iclb: [SKIP][238] ([i915#658]) -> [SKIP][239] ([i915#2920])
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-iclb1/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
* igt@runner@aborted:
- shard-skl: ([FAIL][240], [FAIL][241]) ([i915#2029] / [i915#3002] / [i915#4312] / [i915#5257]) -> ([FAIL][242], [FAIL][243], [FAIL][244]) ([i915#3002] / [i915#4312] / [i915#5257])
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl9/igt@runner@aborted.html
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-skl3/igt@runner@aborted.html
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl1/igt@runner@aborted.html
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl3/igt@runner@aborted.html
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-skl1/igt@runner@aborted.html
- shard-apl: ([FAIL][245], [FAIL][246], [FAIL][247], [FAIL][248]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257]) -> ([FAIL][249], [FAIL][250], [FAIL][251]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl1/igt@runner@aborted.html
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl4/igt@runner@aborted.html
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl8/igt@runner@aborted.html
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-apl2/igt@runner@aborted.html
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl3/igt@runner@aborted.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl8/igt@runner@aborted.html
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-apl4/igt@runner@aborted.html
- shard-kbl: ([FAIL][252], [FAIL][253], [FAIL][254], [FAIL][255], [FAIL][256], [FAIL][257]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#716]) -> ([FAIL][258], [FAIL][259], [FAIL][260], [FAIL][261]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257])
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl4/igt@runner@aborted.html
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl1/igt@runner@aborted.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl6/igt@runner@aborted.html
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl1/igt@runner@aborted.html
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl1/igt@runner@aborted.html
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11794/shard-kbl7/igt@runner@aborted.html
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl1/igt@runner@aborted.html
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl1/igt@runner@aborted.html
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl7/igt@runner@aborted.html
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/shard-kbl7/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111314]: https://bugs.freedesktop.org/show_bug.cgi?id=111314
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#1911]: https://gitlab.freedesktop.org/drm/intel/issues/1911
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2849]: https://gitlab.freedesktop.org/drm/intel/issues/2849
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2898]: https://gitlab.freedesktop.org/drm/intel/issues/2898
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3376]: https://gitlab.freedesktop.org/drm/intel/issues/3376
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3464]: https://gitlab.freedesktop.org/drm/intel/issues/3464
[i915#3467]: https://gitlab.freedesktop.org/drm/intel/issues/3467
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3701]: https://gitlab.freedesktop.org/drm/intel/issues/3701
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
[i915#4032]: https://gitlab.freedesktop.org/drm/intel/issues/4032
[i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4278]: https://gitlab.freedesktop.org/drm/intel/issues/4278
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4369]: https://gitlab.freedesktop.org/drm/intel/issues/4369
[i915#4386]: https://gitlab.freedesktop.org/drm/intel/issues/4386
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4842]: https://gitlab.freedesktop.org/drm/intel/issues/4842
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4853]: https://gitlab.freedesktop.org/drm/intel/issues/4853
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#4874]: https://gitlab.freedesktop.org/drm/intel/issues/4874
[i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4883]: https://gitlab.freedesktop.org/drm/intel/issues/4883
[i915#4884]: https://gitlab.freedesktop.org/drm/intel/issues/4884
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#4893]: https://gitlab.freedesktop.org/drm/intel/issues/4893
[i915#4941]: https://gitlab.freedesktop.org/drm/intel/issues/4941
[i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5032]: https://gitlab.freedesktop.org/drm/intel/issues/5032
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5182]: https://gitlab.freedesktop.org/drm/intel/issues/5182
[i915#5234]: https://gitlab.freedesktop.org/drm/intel/issues/5234
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#5264]: https://gitlab.freedesktop.org/drm/intel/issues/5264
[i915#5266]: https://gitlab.freedesktop.org/drm/intel/issues/5266
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5287]: https://gitlab.freedesktop.org/drm/intel/issues/5287
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5296]: https://gitlab.freedesktop.org/drm/intel/issues/5296
[i915#5303]: https://gitlab.freedesktop.org/drm/intel/issues/5303
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#5903]: https://gitlab.freedesktop.org/drm/intel/issues/5903
[i915#6011]: https://gitlab.freedesktop.org/drm/intel/issues/6011
[i915#6021]: https://gitlab.freedesktop.org/drm/intel/issues/6021
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6140]: https://gitlab.freedesktop.org/drm/intel/issues/6140
[i915#6141]: https://gitlab.freedesktop.org/drm/intel/issues/6141
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6251]: https://gitlab.freedesktop.org/drm/intel/issues/6251
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* Linux: CI_DRM_11794 -> Patchwork_90164v3
CI-20190529: 20190529
CI_DRM_11794: 529f44f159dbe70ba69b6f730280d5db9b7338bc @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6539: c39caed3b207e058409f5e2b548a4f940b6283c6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_90164v3: 529f44f159dbe70ba69b6f730280d5db9b7338bc @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_90164v3/index.html
[-- Attachment #2: Type: text/html, Size: 60686 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 2/9] drm/i915: Split vlv_compute_pipe_wm() into two
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Split vlv_compute_pipe_wm() " Ville Syrjala
@ 2022-09-21 15:07 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 21+ messages in thread
From: Lisovskiy, Stanislav @ 2022-09-21 15:07 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Jun 22, 2022 at 06:54:45PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Split vlv_compute_pipe_wm() into two halves. The first half computes
> the new raw watermarks, and the second half munges those up into real
> watermarks for the particular pipe.
>
> We can reuse the second half for watermark sanitation as well.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanslav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 114 ++++++++++++++++++--------------
> 1 file changed, 64 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 395ed3c832d6..4ea43fa73075 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1904,64 +1904,17 @@ static bool vlv_raw_crtc_wm_is_valid(const struct intel_crtc_state *crtc_state,
> vlv_raw_plane_wm_is_valid(crtc_state, PLANE_CURSOR, level);
> }
>
> -static int vlv_compute_pipe_wm(struct intel_atomic_state *state,
> - struct intel_crtc *crtc)
> +static int _vlv_compute_pipe_wm(struct intel_crtc_state *crtc_state)
> {
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - struct intel_crtc_state *crtc_state =
> - intel_atomic_get_new_crtc_state(state, crtc);
> struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
> const struct vlv_fifo_state *fifo_state =
> &crtc_state->wm.vlv.fifo_state;
> u8 active_planes = crtc_state->active_planes & ~BIT(PLANE_CURSOR);
> int num_active_planes = hweight8(active_planes);
> - bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi);
> - const struct intel_plane_state *old_plane_state;
> - const struct intel_plane_state *new_plane_state;
> - struct intel_plane *plane;
> enum plane_id plane_id;
> - int level, ret, i;
> - unsigned int dirty = 0;
> -
> - for_each_oldnew_intel_plane_in_state(state, plane,
> - old_plane_state,
> - new_plane_state, i) {
> - if (new_plane_state->hw.crtc != &crtc->base &&
> - old_plane_state->hw.crtc != &crtc->base)
> - continue;
> -
> - if (vlv_raw_plane_wm_compute(crtc_state, new_plane_state))
> - dirty |= BIT(plane->id);
> - }
> -
> - /*
> - * DSPARB registers may have been reset due to the
> - * power well being turned off. Make sure we restore
> - * them to a consistent state even if no primary/sprite
> - * planes are initially active.
> - */
> - if (needs_modeset)
> - crtc_state->fifo_changed = true;
> -
> - if (!dirty)
> - return 0;
> -
> - /* cursor changes don't warrant a FIFO recompute */
> - if (dirty & ~BIT(PLANE_CURSOR)) {
> - const struct intel_crtc_state *old_crtc_state =
> - intel_atomic_get_old_crtc_state(state, crtc);
> - const struct vlv_fifo_state *old_fifo_state =
> - &old_crtc_state->wm.vlv.fifo_state;
> -
> - ret = vlv_compute_fifo(crtc_state);
> - if (ret)
> - return ret;
> -
> - if (needs_modeset ||
> - memcmp(old_fifo_state, fifo_state,
> - sizeof(*fifo_state)) != 0)
> - crtc_state->fifo_changed = true;
> - }
> + int level;
>
> /* initially allow all levels */
> wm_state->num_levels = intel_wm_num_levels(dev_priv);
> @@ -2008,6 +1961,67 @@ static int vlv_compute_pipe_wm(struct intel_atomic_state *state,
> return 0;
> }
>
> +static int vlv_compute_pipe_wm(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> +{
> + struct intel_crtc_state *crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> + bool needs_modeset = drm_atomic_crtc_needs_modeset(&crtc_state->uapi);
> + const struct intel_plane_state *old_plane_state;
> + const struct intel_plane_state *new_plane_state;
> + struct intel_plane *plane;
> + unsigned int dirty = 0;
> + int i;
> +
> + for_each_oldnew_intel_plane_in_state(state, plane,
> + old_plane_state,
> + new_plane_state, i) {
> + if (new_plane_state->hw.crtc != &crtc->base &&
> + old_plane_state->hw.crtc != &crtc->base)
> + continue;
> +
> + if (vlv_raw_plane_wm_compute(crtc_state, new_plane_state))
> + dirty |= BIT(plane->id);
> + }
> +
> + /*
> + * DSPARB registers may have been reset due to the
> + * power well being turned off. Make sure we restore
> + * them to a consistent state even if no primary/sprite
> + * planes are initially active. We also force a FIFO
> + * recomputation so that we are sure to sanitize the
> + * FIFO setting we took over from the BIOS even if there
> + * are no active planes on the crtc.
> + */
> + if (needs_modeset)
> + dirty = ~0;
> +
> + if (!dirty)
> + return 0;
> +
> + /* cursor changes don't warrant a FIFO recompute */
> + if (dirty & ~BIT(PLANE_CURSOR)) {
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> + const struct vlv_fifo_state *old_fifo_state =
> + &old_crtc_state->wm.vlv.fifo_state;
> + const struct vlv_fifo_state *new_fifo_state =
> + &crtc_state->wm.vlv.fifo_state;
> + int ret;
> +
> + ret = vlv_compute_fifo(crtc_state);
> + if (ret)
> + return ret;
> +
> + if (needs_modeset ||
> + memcmp(old_fifo_state, new_fifo_state,
> + sizeof(*new_fifo_state)) != 0)
> + crtc_state->fifo_changed = true;
> + }
> +
> + return _vlv_compute_pipe_wm(crtc_state);
> +}
> +
> #define VLV_FIFO(plane, value) \
> (((value) << DSPARB_ ## plane ## _SHIFT_VLV) & DSPARB_ ## plane ## _MASK_VLV)
>
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 3/9] drm/i915: Simplify up g4x watermark sanitation
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Simplify up g4x watermark sanitation Ville Syrjala
@ 2022-09-21 15:10 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 21+ messages in thread
From: Lisovskiy, Stanislav @ 2022-09-21 15:10 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Jun 22, 2022 at 06:54:46PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We can simplify the g4x watermark sanitation by reusing the
> second half of g4x_compute_pipe_wm() to convert the sanitized
> raw watermarks into the proper form to be used as the
> optimal/intermediate watermarks.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 21 +++++++--------------
> 1 file changed, 7 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 4ea43fa73075..556fcdfb75f1 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6951,37 +6951,30 @@ void g4x_wm_sanitize(struct drm_i915_private *dev_priv)
> to_intel_crtc_state(crtc->base.state);
> struct intel_plane_state *plane_state =
> to_intel_plane_state(plane->base.state);
> - struct g4x_wm_state *wm_state = &crtc_state->wm.g4x.optimal;
> enum plane_id plane_id = plane->id;
> - int level;
> + int level, num_levels = intel_wm_num_levels(dev_priv);
>
> if (plane_state->uapi.visible)
> continue;
>
> - for (level = 0; level < 3; level++) {
> + for (level = 0; level < num_levels; level++) {
> struct g4x_pipe_wm *raw =
> &crtc_state->wm.g4x.raw[level];
>
> raw->plane[plane_id] = 0;
> - wm_state->wm.plane[plane_id] = 0;
> - }
>
> - if (plane_id == PLANE_PRIMARY) {
> - for (level = 0; level < 3; level++) {
> - struct g4x_pipe_wm *raw =
> - &crtc_state->wm.g4x.raw[level];
> + if (plane_id == PLANE_PRIMARY)
> raw->fbc = 0;
> - }
> -
> - wm_state->sr.fbc = 0;
> - wm_state->hpll.fbc = 0;
> - wm_state->fbc_en = false;
> }
> }
>
> for_each_intel_crtc(&dev_priv->drm, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> + int ret;
> +
> + ret = _g4x_compute_pipe_wm(crtc_state);
> + drm_WARN_ON(&dev_priv->drm, ret);
>
> crtc_state->wm.g4x.intermediate =
> crtc_state->wm.g4x.optimal;
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv watermark sanitation
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv " Ville Syrjala
@ 2022-09-21 15:13 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 21+ messages in thread
From: Lisovskiy, Stanislav @ 2022-09-21 15:13 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Jun 22, 2022 at 06:54:47PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We can simplify the vlv watermark sanitation by reusing the
> second half of vlv_compute_pipe_wm() to convert the sanitized
> raw watermarks into the proper form to be used as the
> optimal/intermediate watermarks.
>
> Also to be consistent with normal watermark computation the sanitized
> watermarks should be all 0 for any disabled plane. Previously we
> zeroed out the watermarks only up to the level (ie. PM2/5/DVDFS)
> that was enabled.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 15 ++++++---------
> 1 file changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 556fcdfb75f1..45ec00e2e3c4 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7100,30 +7100,27 @@ void vlv_wm_sanitize(struct drm_i915_private *dev_priv)
> to_intel_crtc_state(crtc->base.state);
> struct intel_plane_state *plane_state =
> to_intel_plane_state(plane->base.state);
> - struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
> - const struct vlv_fifo_state *fifo_state =
> - &crtc_state->wm.vlv.fifo_state;
> enum plane_id plane_id = plane->id;
> - int level;
> + int level, num_levels = intel_wm_num_levels(dev_priv);
>
> if (plane_state->uapi.visible)
> continue;
>
> - for (level = 0; level < wm_state->num_levels; level++) {
> + for (level = 0; level < num_levels; level++) {
> struct g4x_pipe_wm *raw =
> &crtc_state->wm.vlv.raw[level];
>
> raw->plane[plane_id] = 0;
> -
> - wm_state->wm[level].plane[plane_id] =
> - vlv_invert_wm_value(raw->plane[plane_id],
> - fifo_state->plane[plane_id]);
> }
> }
>
> for_each_intel_crtc(&dev_priv->drm, crtc) {
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> + int ret;
> +
> + ret = _vlv_compute_pipe_wm(crtc_state);
> + drm_WARN_ON(&dev_priv->drm, ret);
>
> crtc_state->wm.vlv.intermediate =
> crtc_state->wm.vlv.optimal;
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing invalidate to g4x wm readout
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing invalidate to g4x wm readout Ville Syrjala
@ 2022-09-21 15:14 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 21+ messages in thread
From: Lisovskiy, Stanislav @ 2022-09-21 15:14 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Jun 22, 2022 at 06:54:48PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Let's not forget to mark the unused watermark levels as invalid
> after the readout. The vlv/chv codepath has this but the g4x
> didn't for some reason.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 45ec00e2e3c4..734deb0bd867 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6915,6 +6915,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
> plane_id, USHRT_MAX);
> g4x_raw_fbc_wm_set(crtc_state, level, USHRT_MAX);
>
> + g4x_invalidate_wms(crtc, active, level);
> +
> crtc_state->wm.g4x.optimal = *active;
> crtc_state->wm.g4x.intermediate = *active;
>
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 6/9] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes Ville Syrjala
@ 2022-10-07 5:57 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 21+ messages in thread
From: Lisovskiy, Stanislav @ 2022-10-07 5:57 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Jun 22, 2022 at 06:54:49PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On g4x/vlv/chv the hardware seems incapable of changing the pixel
> format, rotation, or YUV->RGB CSC matrix while in CxSR.
>
> Additionally on VLV/CHV the sprites seem incapable of tiling
> changes while in CxSR. On g4x CxSR is not even possible with
> the sprite enabled. Curiously the primary plane seems perfectly
> happy when changing tiling during CxSR.
>
> Pimp up the code to account for these when determining whether
> CxSR needs to be disabled. Since it looks like most of the plane
> control register bits are affected let's just compare that.
> But in the name of efficiency we'll make an exception for the
> primary plane tiling changes (avoids some extra vblank waits).
>
> v2: Just use the pre-computed plane control register values
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 53 ++++++++++++++++---
> 1 file changed, 45 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index efe8591619e3..e5ad6a437a97 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -426,6 +426,47 @@ static bool intel_plane_do_async_flip(struct intel_plane *plane,
> return DISPLAY_VER(i915) < 13 || old_crtc_state->uapi.async_flip;
> }
>
> +static bool i9xx_must_disable_cxsr(const struct intel_crtc_state *new_crtc_state,
> + const struct intel_plane_state *old_plane_state,
> + const struct intel_plane_state *new_plane_state)
> +{
> + struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
> + bool old_visible = old_plane_state->uapi.visible;
> + bool new_visible = new_plane_state->uapi.visible;
> + u32 old_ctl = old_plane_state->ctl;
> + u32 new_ctl = new_plane_state->ctl;
> + bool modeset, turn_on, turn_off;
> +
> + if (plane->id == PLANE_CURSOR)
> + return false;
> +
> + modeset = intel_crtc_needs_modeset(new_crtc_state);
> + turn_off = old_visible && (!new_visible || modeset);
> + turn_on = new_visible && (!old_visible || modeset);
> +
> + /* Must disable CxSR around plane enable/disable */
> + if (turn_on || turn_off)
> + return true;
> +
> + if (!old_visible || !new_visible)
> + return false;
> +
> + /*
> + * Most plane control register updates are blocked while in CxSR.
> + *
> + * Tiling mode is one exception where the primary plane can
> + * apparently handle it, whereas the sprites can not (the
> + * sprite issue being only relevant on VLV/CHV where CxSR
> + * is actually possible with a sprite enabled).
> + */
> + if (plane->id == PLANE_PRIMARY) {
> + old_ctl &= ~DISP_TILED;
> + new_ctl &= ~DISP_TILED;
> + }
> +
> + return old_ctl != new_ctl;
> +}
> +
> static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_crtc_state,
> struct intel_crtc_state *new_crtc_state,
> const struct intel_plane_state *old_plane_state,
> @@ -483,17 +524,9 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr
> if (turn_on) {
> if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> new_crtc_state->update_wm_pre = true;
> -
> - /* must disable cxsr around plane enable/disable */
> - if (plane->id != PLANE_CURSOR)
> - new_crtc_state->disable_cxsr = true;
> } else if (turn_off) {
> if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
> new_crtc_state->update_wm_post = true;
> -
> - /* must disable cxsr around plane enable/disable */
> - if (plane->id != PLANE_CURSOR)
> - new_crtc_state->disable_cxsr = true;
> } else if (intel_wm_need_update(old_plane_state, new_plane_state)) {
> if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv)) {
> /* FIXME bollocks */
> @@ -505,6 +538,10 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr
> if (visible || was_visible)
> new_crtc_state->fb_bits |= plane->frontbuffer_bit;
>
> + if (HAS_GMCH(dev_priv) &&
> + i9xx_must_disable_cxsr(new_crtc_state, old_plane_state, new_plane_state))
> + new_crtc_state->disable_cxsr = true;
> +
> /*
> * ILK/SNB DVSACNTR/Sprite Enable
> * IVB SPR_CTL/Sprite Enable
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms Ville Syrjala
@ 2022-10-07 6:01 ` Lisovskiy, Stanislav
2022-10-07 6:21 ` Ville Syrjälä
0 siblings, 1 reply; 21+ messages in thread
From: Lisovskiy, Stanislav @ 2022-10-07 6:01 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Jun 22, 2022 at 06:54:50PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Like most other plane control register bits, the pipe gamma
> enable bit is also blocked by CxSR. So make sure we kick the
> machine out of CxSR before trying to change that bit.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Should that new i9xx_must_disable_cxsr function be extended
to be used here as well?
Besides that
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index a27ce874a9e8..bc01a7d3b0d3 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1305,6 +1305,10 @@ intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state)
> return PTR_ERR(plane_state);
>
> new_crtc_state->update_planes |= BIT(plane->id);
> +
> + /* plane control register changes blocked by CxSR */
> + if (HAS_GMCH(dev_priv))
> + new_crtc_state->disable_cxsr = true;
> }
>
> return 0;
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes on gmch platforms
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes " Ville Syrjala
@ 2022-10-07 6:03 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 21+ messages in thread
From: Lisovskiy, Stanislav @ 2022-10-07 6:03 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Wed, Jun 22, 2022 at 06:54:51PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We've excluded gmch platforms from writing the final watermarks
> for any disabled pipe. IIRC the reason was perhaps some lingering
> issue with the watermark merging across the pipes. But I can't
> really see any reason for this anymore, so let's unify this behaviour.
> The main benefit being more consistency in register dumps when
> we don't have stale watermarks hanging around in the registers.
> Functionally there should be no difference as the hardware just
> ignore all of it when the pipe is disabled.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 903226e2a626..2c5dadc62c55 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7192,9 +7192,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
> intel_fbc_disable(crtc);
> intel_disable_shared_dpll(old_crtc_state);
>
> - /* FIXME unify this for all platforms */
> - if (!new_crtc_state->hw.active &&
> - !HAS_GMCH(dev_priv))
> + if (!new_crtc_state->hw.active)
> intel_initial_watermarks(state, crtc);
> }
>
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
2022-10-07 6:01 ` Lisovskiy, Stanislav
@ 2022-10-07 6:21 ` Ville Syrjälä
0 siblings, 0 replies; 21+ messages in thread
From: Ville Syrjälä @ 2022-10-07 6:21 UTC (permalink / raw)
To: Lisovskiy, Stanislav; +Cc: intel-gfx
On Fri, Oct 07, 2022 at 09:01:34AM +0300, Lisovskiy, Stanislav wrote:
> On Wed, Jun 22, 2022 at 06:54:50PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Like most other plane control register bits, the pipe gamma
> > enable bit is also blocked by CxSR. So make sure we kick the
> > machine out of CxSR before trying to change that bit.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Should that new i9xx_must_disable_cxsr function be extended
> to be used here as well?
That stuff happens far too early.
>
> Besides that
>
> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Thanks.
>
> > ---
> > drivers/gpu/drm/i915/display/intel_color.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> > index a27ce874a9e8..bc01a7d3b0d3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_color.c
> > +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > @@ -1305,6 +1305,10 @@ intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state)
> > return PTR_ERR(plane_state);
> >
> > new_crtc_state->update_planes |= BIT(plane->id);
> > +
> > + /* plane control register changes blocked by CxSR */
> > + if (HAS_GMCH(dev_priv))
> > + new_crtc_state->disable_cxsr = true;
> > }
> >
> > return 0;
> > --
> > 2.35.1
> >
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2022-10-07 6:21 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-06-22 15:54 [Intel-gfx] [PATCH v2 0/9] drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 1/9] drm/i915: Split g4x_compute_pipe_wm() into two Ville Syrjala
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 2/9] drm/i915: Split vlv_compute_pipe_wm() " Ville Syrjala
2022-09-21 15:07 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 3/9] drm/i915: Simplify up g4x watermark sanitation Ville Syrjala
2022-09-21 15:10 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 4/9] drm/i915: Simplify up vlv " Ville Syrjala
2022-09-21 15:13 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 5/9] drm/i915: Add missing invalidate to g4x wm readout Ville Syrjala
2022-09-21 15:14 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 6/9] drm/i915: Fix g4x/vlv/chv CxSR vs. format/tiling/rotation changes Ville Syrjala
2022-10-07 5:57 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 7/9] drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms Ville Syrjala
2022-10-07 6:01 ` Lisovskiy, Stanislav
2022-10-07 6:21 ` Ville Syrjälä
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 8/9] drm/i915: Write watermarks for disabled pipes " Ville Syrjala
2022-10-07 6:03 ` Lisovskiy, Stanislav
2022-06-22 15:54 ` [Intel-gfx] [PATCH v2 9/9] drm/i915: Enable atomic by default on ctg/elk Ville Syrjala
2022-06-23 18:34 ` Jani Nikula
2022-06-22 23:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups (rev3) Patchwork
2022-06-27 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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