intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
* [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL
@ 2022-10-21 17:39 Alan Previn
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 1/6] drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT Alan Previn
                   ` (7 more replies)
  0 siblings, 8 replies; 19+ messages in thread
From: Alan Previn @ 2022-10-21 17:39 UTC (permalink / raw)
  To: intel-gfx

MTL has two tiles that  is represented by the intel_gt structure in the i915
code. The PXP feature has a control-structure that contains the PXP context
and this hangs of the intel_gt structure. In MTL, the standalone media tile
(i.e. not the root tile) contains the VDBOX and KCR engine which is what
PXP relies on for establishing and tearing down the PXP session. However
PXP is a global feature as other engines on other tiles can reference the
PXP session in object info within batch buffer instructions.That coherrency
is handled implicitly by the HW. However current intel_pxp functions such
as intel_pxp_enabled, intel_pxp_start and others take in the intel_gt
structure pointer as its input thus creation the perception that PXP is
a GT-tile specific domain that is independant from other GT tiles.

This series updates all of the intel_pxp_foo functions that are accessed
from outside the PXP subsystem so that the callers only need to pass in the
i915 structure as the input param (being a global handle). Internally,
these functions will loop through all available GT structures on the GPU
and find the one GT structure that contains the one PXP+TEE control
structure before proceeding with the rest of its operation.

Changes from prior revs:
   v2: - Avoid introduction of new device info or gt variables and use
         existing checks / macros to differentiate the correct GT->PXP
         control ownership (Daniele Ceraolo Spurio)
       - Don't reuse the updated global-checkers for per-GT callers (such
         as other files within PXP) to avoid unnecessary GT-reparsing,
         expose a replacement helper like the prior ones. (Daniele).
   v1: Add one more patch to the series for the intel_pxp suspend/resume
       for similiar refactoring

Alan Previn (6):
  drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT
  drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT
  drm/i915/pxp: Make intel_pxp_is_active implicitly sort PXP-owning-GT
  drm/i915/pxp: Make PXP tee component bind/unbind aware of
    PXP-owning-GT
  drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT
  drm/i915/pxp: Make intel_pxp_key_check implicitly sort PXP-owning-GT

 .../drm/i915/display/skl_universal_plane.c    |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_context.c   |  6 +-
 drivers/gpu/drm/i915/gem/i915_gem_create.c    |  2 +-
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    |  2 +-
 drivers/gpu/drm/i915/i915_drv.h               |  4 -
 drivers/gpu/drm/i915/pxp/intel_pxp.c          | 96 ++++++++++++++++---
 drivers/gpu/drm/i915/pxp/intel_pxp.h          | 15 ++-
 drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c      |  2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c  |  8 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c      |  4 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_pm.c       |  8 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c      | 18 +++-
 12 files changed, 126 insertions(+), 41 deletions(-)


base-commit: 2d478d9598e835d952e7383b91ecc6fad6c624c2
prerequisite-patch-id: 81ce49bc04baa5bb11c05a74c756b13172e20bf3
prerequisite-patch-id: 541e7cb9133f684b52dfd9766adf927b3c8020c7
prerequisite-patch-id: 12e1fca75d27bd709dab9e9ca9ffb0126c6dc20d
prerequisite-patch-id: 6ac8d22df34db9e7d467b1ab95ad30f94841d5db
prerequisite-patch-id: f3fa135a3d73937cd923d642d2ad8c0760ac3175
prerequisite-patch-id: 61e40b88ca38aefdc6c17c0e6b83b875a832bc63
prerequisite-patch-id: 6f3232e12fbcf0e0cb312a040a2002de75e70842
prerequisite-patch-id: 46bc9cefd8b30b05c67a5b716d4ed045a62cac14
prerequisite-patch-id: fc2cb39b246060e635341a1afe4b2405ea615948
prerequisite-patch-id: b0e8d2c244bfa0b3235757b4304d8a0e30ad8263
prerequisite-patch-id: 0286c05f8ab431bd64925b533b75554d23403368
prerequisite-patch-id: 0449925cca36664b566f614bfb7d573a11f0575f
prerequisite-patch-id: 589984288c63b80b977c2207c206d5ee7fee95fa
prerequisite-patch-id: 92fdfb264c5c3e5260ac3694fe81861990bcaea0
prerequisite-patch-id: 78927aa21ee5861e6b52bef9955747836aeae671
prerequisite-patch-id: 65035537c403786c441b4923de1b2d8fecd2e1c9
prerequisite-patch-id: c4e8795fca364a616bd8fb45f9ee494b8562c2b8
prerequisite-patch-id: 8422c8394afa49ad81b6181431eecd2bc58a795c
prerequisite-patch-id: 1773517e679e5d6edf5930ce88e07576272ef055
prerequisite-patch-id: 541ce19060961f8fa097b946a306c0e0a4149eaf
prerequisite-patch-id: a803b51482f6e2d9cbda4b483f8520cee51dd337
prerequisite-patch-id: 8594d5dd0e743715dc1ffe3059dd3396e468d19f
prerequisite-patch-id: 2ab92d13ef03489b1a8f5f1103077ce02622a045
prerequisite-patch-id: c86ea938209873803eca30a1221d900f9c496f43
prerequisite-patch-id: f5e9703c738b05df12b50ed4421cca17b888908f
prerequisite-patch-id: 5cf07b65e26273b35723f9443d0f37d2f067df5e
prerequisite-patch-id: e25314fa6eddcf872897afd7c2eea38c2d79f2fb
prerequisite-patch-id: 1a218d6b5bb1284811c520c64e1a7ad34569a56a
prerequisite-patch-id: 3db039e977b397dd45dd676226fc4ab704f480b5
-- 
2.34.1


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [Intel-gfx] [PATCH v3 1/6] drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT
  2022-10-21 17:39 [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL Alan Previn
@ 2022-10-21 17:39 ` Alan Previn
  2022-11-15  4:00   ` Ceraolo Spurio, Daniele
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 2/6] drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT Alan Previn
                   ` (6 subsequent siblings)
  7 siblings, 1 reply; 19+ messages in thread
From: Alan Previn @ 2022-10-21 17:39 UTC (permalink / raw)
  To: intel-gfx

In preparation for future MTL-PXP feature support, PXP control
context should only valid on the correct gt tile. Depending on the
device-info this depends on which tile owns the VEBOX and KCR.
PXP is still a global feature though (despite its control-context
located in the owning GT structure). Additionally, we find
that the HAS_PXP macro is only used within the pxp module,

That said, lets drop that HAS_PXP macro altogether and replace it
with a more fitting named intel_gtpxp_is_supported and helpers
so that PXP init/fini can use to verify if the referenced gt supports
PXP or teelink.

Add TODO for Meteorlake that will come in future series.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h              |  4 ---
 drivers/gpu/drm/i915/pxp/intel_pxp.c         | 35 ++++++++++++++++----
 drivers/gpu/drm/i915/pxp/intel_pxp.h         |  2 ++
 drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c |  2 +-
 4 files changed, 32 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7c64f8a17493..0921d1107825 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -923,10 +923,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)	(INTEL_INFO(dev_priv)->has_global_mocs)
 
-#define HAS_PXP(dev_priv)  ((IS_ENABLED(CONFIG_DRM_I915_PXP) && \
-			    INTEL_INFO(dev_priv)->has_pxp) && \
-			    VDBOX_MASK(to_gt(dev_priv)))
-
 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
 
 #define HAS_GMD_ID(i915)	(INTEL_INFO(i915)->has_gmd_id)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 5efe61f67546..545c075bf1aa 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -44,6 +44,30 @@ struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp)
 	return container_of(pxp, struct intel_gt, pxp);
 }
 
+static bool _gt_needs_teelink(struct intel_gt *gt)
+{
+	/* TODO: MTL won't rely on CONFIG_INTEL_MEI_PXP but on GSC engine */
+	return (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && intel_huc_is_loaded_by_gsc(&gt->uc.huc) &&
+		intel_uc_uses_huc(&gt->uc));
+}
+
+static bool _gt_supports_pxp(struct intel_gt *gt)
+{
+	/* TODO: MTL won't rely on CONFIG_INTEL_MEI_PXP but on GSC engine */
+	return (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && IS_ENABLED(CONFIG_DRM_I915_PXP) &&
+		INTEL_INFO((gt)->i915)->has_pxp && VDBOX_MASK(gt));
+}
+
+bool intel_gtpxp_is_supported(struct intel_pxp *pxp)
+{
+	struct intel_gt *gt = pxp_to_gt(pxp);
+
+	if (_gt_needs_teelink(gt) || _gt_supports_pxp(gt))
+		return true;
+
+	return false;
+}
+
 bool intel_pxp_is_enabled(const struct intel_pxp *pxp)
 {
 	return pxp->ce;
@@ -142,22 +166,21 @@ void intel_pxp_init(struct intel_pxp *pxp)
 {
 	struct intel_gt *gt = pxp_to_gt(pxp);
 
-	/* we rely on the mei PXP module */
-	if (!IS_ENABLED(CONFIG_INTEL_MEI_PXP))
-		return;
-
 	/*
 	 * If HuC is loaded by GSC but PXP is disabled, we can skip the init of
 	 * the full PXP session/object management and just init the tee channel.
 	 */
-	if (HAS_PXP(gt->i915))
+	if (_gt_supports_pxp(gt))
 		pxp_init_full(pxp);
-	else if (intel_huc_is_loaded_by_gsc(&gt->uc.huc) && intel_uc_uses_huc(&gt->uc))
+	else if (_gt_needs_teelink(gt))
 		intel_pxp_tee_component_init(pxp);
 }
 
 void intel_pxp_fini(struct intel_pxp *pxp)
 {
+	if (!intel_gtpxp_is_supported(pxp))
+		return;
+
 	pxp->arb_is_valid = false;
 
 	intel_pxp_tee_component_fini(pxp);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 2da309088c6d..c12e4d419c78 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -13,6 +13,8 @@ struct intel_pxp;
 struct drm_i915_gem_object;
 
 struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
+bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
+
 bool intel_pxp_is_enabled(const struct intel_pxp *pxp);
 bool intel_pxp_is_active(const struct intel_pxp *pxp);
 
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
index 4359e8be4101..124663cf0047 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
@@ -70,7 +70,7 @@ void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
 	if (!gt_root)
 		return;
 
-	if (!HAS_PXP((pxp_to_gt(pxp)->i915)))
+	if (!intel_gtpxp_is_supported(pxp))
 		return;
 
 	root = debugfs_create_dir("pxp", gt_root);
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [Intel-gfx] [PATCH v3 2/6] drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT
  2022-10-21 17:39 [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL Alan Previn
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 1/6] drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT Alan Previn
@ 2022-10-21 17:39 ` Alan Previn
  2022-11-15  4:11   ` Ceraolo Spurio, Daniele
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 3/6] drm/i915/pxp: Make intel_pxp_is_active " Alan Previn
                   ` (5 subsequent siblings)
  7 siblings, 1 reply; 19+ messages in thread
From: Alan Previn @ 2022-10-21 17:39 UTC (permalink / raw)
  To: intel-gfx

Make intel_pxp_is_enabled a global check and implicitly find the
PXP-owning-GT.

PXP feature support is a device-config flag. In preparation for MTL
PXP control-context shall reside on of the two GT's. That said,
update intel_pxp_is_enabled to take in i915 as its input and internally
find the right gt to check if PXP is enabled so its transparent to
callers of this functions.

However we also need to expose the per-gt variation of this internal
pxp files to use (like what intel_pxp_enabled was prior) so also expose
a new intel_gtpxp_is_enabled function for replacement.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c  |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_create.c   |  2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp.c         | 28 ++++++++++++++++++--
 drivers/gpu/drm/i915/pxp/intel_pxp.h         |  4 ++-
 drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c     |  2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c |  2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c     |  2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp_pm.c      |  8 +++---
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c     |  4 +--
 9 files changed, 40 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 1e29b1e6d186..72f47ebda75f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -257,7 +257,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
 
 	if (!protected) {
 		pc->uses_protected_content = false;
-	} else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) {
+	} else if (!intel_pxp_is_enabled(i915)) {
 		ret = -ENODEV;
 	} else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) ||
 		   !(pc->user_flags & BIT(UCONTEXT_BANNABLE))) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index 33673fe7ee0a..e44803f9bec4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -384,7 +384,7 @@ static int ext_set_protected(struct i915_user_extension __user *base, void *data
 	if (ext.flags)
 		return -EINVAL;
 
-	if (!intel_pxp_is_enabled(&to_gt(ext_data->i915)->pxp))
+	if (!intel_pxp_is_enabled(ext_data->i915))
 		return -ENODEV;
 
 	ext_data->flags |= I915_BO_PROTECTED;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 545c075bf1aa..f7c909fce97c 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -9,6 +9,7 @@
 #include "intel_pxp_tee.h"
 #include "gem/i915_gem_context.h"
 #include "gt/intel_context.h"
+#include "gt/intel_gt.h"
 #include "i915_drv.h"
 
 /**
@@ -68,11 +69,34 @@ bool intel_gtpxp_is_supported(struct intel_pxp *pxp)
 	return false;
 }
 
-bool intel_pxp_is_enabled(const struct intel_pxp *pxp)
+bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp)
 {
 	return pxp->ce;
 }
 
+static struct intel_gt *_i915_to_pxp_gt(struct drm_i915_private *i915)
+{
+	struct intel_gt *gt = NULL;
+	int i = 0;
+
+	for_each_gt(gt, i915, i) {
+		/* There can be only one GT that supports PXP */
+		if (gt && intel_gtpxp_is_supported(&gt->pxp))
+			return gt;
+	}
+	return NULL;
+}
+
+bool intel_pxp_is_enabled(struct drm_i915_private *i915)
+{
+	struct intel_gt *gt = _i915_to_pxp_gt(i915);
+
+	if (!gt)
+		return false;
+
+	return intel_gtpxp_is_enabled(&gt->pxp);
+}
+
 bool intel_pxp_is_active(const struct intel_pxp *pxp)
 {
 	return pxp->arb_is_valid;
@@ -229,7 +253,7 @@ int intel_pxp_start(struct intel_pxp *pxp)
 {
 	int ret = 0;
 
-	if (!intel_pxp_is_enabled(pxp))
+	if (!intel_gtpxp_is_enabled(pxp))
 		return -ENODEV;
 
 	if (wait_for(pxp_component_bound(pxp), 250))
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index c12e4d419c78..61472018bc45 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -11,11 +11,13 @@
 
 struct intel_pxp;
 struct drm_i915_gem_object;
+struct drm_i915_private;
 
 struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
 bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
+bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp);
 
-bool intel_pxp_is_enabled(const struct intel_pxp *pxp);
+bool intel_pxp_is_enabled(struct drm_i915_private *i915);
 bool intel_pxp_is_active(const struct intel_pxp *pxp);
 
 void intel_pxp_init(struct intel_pxp *pxp);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c
index f41e45763d0d..0987bb552eaa 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c
@@ -99,7 +99,7 @@ int intel_pxp_terminate_session(struct intel_pxp *pxp, u32 id)
 	u32 *cs;
 	int err = 0;
 
-	if (!intel_pxp_is_enabled(pxp))
+	if (!intel_gtpxp_is_enabled(pxp))
 		return 0;
 
 	rq = i915_request_create(ce);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
index 124663cf0047..13f517f94bae 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
@@ -18,7 +18,7 @@ static int pxp_info_show(struct seq_file *m, void *data)
 {
 	struct intel_pxp *pxp = m->private;
 	struct drm_printer p = drm_seq_file_printer(m);
-	bool enabled = intel_pxp_is_enabled(pxp);
+	bool enabled = intel_gtpxp_is_enabled(pxp);
 
 	if (!enabled) {
 		drm_printf(&p, "pxp disabled\n");
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
index c28be430718a..8e8e5645e4fc 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
@@ -22,7 +22,7 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
 {
 	struct intel_gt *gt = pxp_to_gt(pxp);
 
-	if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp)))
+	if (GEM_WARN_ON(!intel_gtpxp_is_enabled(pxp)))
 		return;
 
 	lockdep_assert_held(gt->irq_lock);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
index 6a7d4e2ee138..c095a9e0a01f 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
@@ -11,7 +11,7 @@
 
 void intel_pxp_suspend_prepare(struct intel_pxp *pxp)
 {
-	if (!intel_pxp_is_enabled(pxp))
+	if (!intel_gtpxp_is_enabled(pxp))
 		return;
 
 	pxp->arb_is_valid = false;
@@ -23,7 +23,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp)
 {
 	intel_wakeref_t wakeref;
 
-	if (!intel_pxp_is_enabled(pxp))
+	if (!intel_gtpxp_is_enabled(pxp))
 		return;
 
 	with_intel_runtime_pm(&pxp_to_gt(pxp)->i915->runtime_pm, wakeref) {
@@ -34,7 +34,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp)
 
 void intel_pxp_resume(struct intel_pxp *pxp)
 {
-	if (!intel_pxp_is_enabled(pxp))
+	if (!intel_gtpxp_is_enabled(pxp))
 		return;
 
 	/*
@@ -50,7 +50,7 @@ void intel_pxp_resume(struct intel_pxp *pxp)
 
 void intel_pxp_runtime_suspend(struct intel_pxp *pxp)
 {
-	if (!intel_pxp_is_enabled(pxp))
+	if (!intel_gtpxp_is_enabled(pxp))
 		return;
 
 	pxp->arb_is_valid = false;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index 052fd2f9a583..1c6bc56391b7 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -152,7 +152,7 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev,
 		return 0;
 
 	/* the component is required to fully start the PXP HW */
-	if (intel_pxp_is_enabled(pxp))
+	if (intel_gtpxp_is_enabled(pxp))
 		intel_pxp_init_hw(pxp);
 
 	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
@@ -167,7 +167,7 @@ static void i915_pxp_tee_component_unbind(struct device *i915_kdev,
 	struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
 	intel_wakeref_t wakeref;
 
-	if (intel_pxp_is_enabled(pxp))
+	if (intel_gtpxp_is_enabled(pxp))
 		with_intel_runtime_pm_if_in_use(&i915->runtime_pm, wakeref)
 			intel_pxp_fini_hw(pxp);
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [Intel-gfx] [PATCH v3 3/6] drm/i915/pxp: Make intel_pxp_is_active implicitly sort PXP-owning-GT
  2022-10-21 17:39 [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL Alan Previn
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 1/6] drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT Alan Previn
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 2/6] drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT Alan Previn
@ 2022-10-21 17:39 ` Alan Previn
  2022-11-15  4:17   ` Ceraolo Spurio, Daniele
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 4/6] drm/i915/pxp: Make PXP tee component bind/unbind aware of PXP-owning-GT Alan Previn
                   ` (4 subsequent siblings)
  7 siblings, 1 reply; 19+ messages in thread
From: Alan Previn @ 2022-10-21 17:39 UTC (permalink / raw)
  To: intel-gfx

Make intel_pxp_is_active a global check and implicitly find
the PXP-owning-GT.

As per prior two patches, callers of this function shall now
pass in i915 since PXP is a global GPU feature. Make
intel_pxp_is_active implicitly find the right gt so it's transparent
for global view callers (like display or gem-exec).

However we also need to expose the per-gt variation of this for internal
pxp files to use (like what intel_pxp_is_active was prior) so also expose
a new intel_gtpxp_is_active function for replacement.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c  |  2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp.c         | 14 ++++++++++++--
 drivers/gpu/drm/i915/pxp/intel_pxp.h         |  3 ++-
 drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c |  4 ++--
 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c     |  2 +-
 5 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 72f47ebda75f..798e77398acc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -271,7 +271,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
 		 */
 		pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
 
-		if (!intel_pxp_is_active(&to_gt(i915)->pxp))
+		if (!intel_pxp_is_active(i915))
 			ret = intel_pxp_start(&to_gt(i915)->pxp);
 	}
 
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index f7c909fce97c..15f7983f6da8 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -97,11 +97,21 @@ bool intel_pxp_is_enabled(struct drm_i915_private *i915)
 	return intel_gtpxp_is_enabled(&gt->pxp);
 }
 
-bool intel_pxp_is_active(const struct intel_pxp *pxp)
+bool intel_gtpxp_is_active(const struct intel_pxp *pxp)
 {
 	return pxp->arb_is_valid;
 }
 
+bool intel_pxp_is_active(struct drm_i915_private *i915)
+{
+	struct intel_gt *gt = _i915_to_pxp_gt(i915);
+
+	if (!gt)
+		return false;
+
+	return intel_gtpxp_is_active(&gt->pxp);
+}
+
 /* KCR register definitions */
 #define KCR_INIT _MMIO(0x320f0)
 /* Setting KCR Init bit is required after system boot */
@@ -300,7 +310,7 @@ int intel_pxp_key_check(struct intel_pxp *pxp,
 			struct drm_i915_gem_object *obj,
 			bool assign)
 {
-	if (!intel_pxp_is_active(pxp))
+	if (!intel_gtpxp_is_active(pxp))
 		return -ENODEV;
 
 	if (!i915_gem_object_is_protected(obj))
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 61472018bc45..70383394adb4 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -16,9 +16,10 @@ struct drm_i915_private;
 struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
 bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
 bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp);
+bool intel_gtpxp_is_active(const struct intel_pxp *pxp);
 
 bool intel_pxp_is_enabled(struct drm_i915_private *i915);
-bool intel_pxp_is_active(const struct intel_pxp *pxp);
+bool intel_pxp_is_active(struct drm_i915_private *i915);
 
 void intel_pxp_init(struct intel_pxp *pxp);
 void intel_pxp_fini(struct intel_pxp *pxp);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
index 13f517f94bae..7f304b421633 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
@@ -25,7 +25,7 @@ static int pxp_info_show(struct seq_file *m, void *data)
 		return 0;
 	}
 
-	drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active(pxp)));
+	drm_printf(&p, "active: %s\n", str_yes_no(intel_gtpxp_is_active(pxp)));
 	drm_printf(&p, "instance counter: %u\n", pxp->key_instance);
 
 	return 0;
@@ -43,7 +43,7 @@ static int pxp_terminate_set(void *data, u64 val)
 	struct intel_pxp *pxp = data;
 	struct intel_gt *gt = pxp_to_gt(pxp);
 
-	if (!intel_pxp_is_active(pxp))
+	if (!intel_gtpxp_is_active(pxp))
 		return -ENODEV;
 
 	/* simulate a termination interrupt */
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
index 8e8e5645e4fc..cd97f8d8cc10 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
@@ -86,7 +86,7 @@ void intel_pxp_irq_disable(struct intel_pxp *pxp)
 	 * called in a path were the driver consider the session as valid and
 	 * doesn't call a termination on restart.
 	 */
-	GEM_WARN_ON(intel_pxp_is_active(pxp));
+	GEM_WARN_ON(intel_gtpxp_is_active(pxp));
 
 	spin_lock_irq(gt->irq_lock);
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [Intel-gfx] [PATCH v3 4/6] drm/i915/pxp: Make PXP tee component bind/unbind aware of PXP-owning-GT
  2022-10-21 17:39 [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL Alan Previn
                   ` (2 preceding siblings ...)
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 3/6] drm/i915/pxp: Make intel_pxp_is_active " Alan Previn
@ 2022-10-21 17:39 ` Alan Previn
  2022-11-15  4:19   ` Ceraolo Spurio, Daniele
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 5/6] drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT Alan Previn
                   ` (3 subsequent siblings)
  7 siblings, 1 reply; 19+ messages in thread
From: Alan Previn @ 2022-10-21 17:39 UTC (permalink / raw)
  To: intel-gfx

Ensure i915_pxp_tee_component_bind / unbind implicitly sorts out
getting the correct per-GT PXP control-context from the PXP-owning-GT
when establishing or ending connection. Thus, replace _i915_to_pxp_gt
with intel_pxp_get_owning_gt (also takes in i915).

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 drivers/gpu/drm/i915/pxp/intel_pxp.c     |  6 +++---
 drivers/gpu/drm/i915/pxp/intel_pxp.h     |  2 ++
 drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 14 ++++++++++++--
 3 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 15f7983f6da8..2c835c38c527 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -74,7 +74,7 @@ bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp)
 	return pxp->ce;
 }
 
-static struct intel_gt *_i915_to_pxp_gt(struct drm_i915_private *i915)
+struct intel_gt *intel_pxp_get_owning_gt(struct drm_i915_private *i915)
 {
 	struct intel_gt *gt = NULL;
 	int i = 0;
@@ -89,7 +89,7 @@ static struct intel_gt *_i915_to_pxp_gt(struct drm_i915_private *i915)
 
 bool intel_pxp_is_enabled(struct drm_i915_private *i915)
 {
-	struct intel_gt *gt = _i915_to_pxp_gt(i915);
+	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
 
 	if (!gt)
 		return false;
@@ -104,7 +104,7 @@ bool intel_gtpxp_is_active(const struct intel_pxp *pxp)
 
 bool intel_pxp_is_active(struct drm_i915_private *i915)
 {
-	struct intel_gt *gt = _i915_to_pxp_gt(i915);
+	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
 
 	if (!gt)
 		return false;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 70383394adb4..7d93055cdd6b 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -13,6 +13,8 @@ struct intel_pxp;
 struct drm_i915_gem_object;
 struct drm_i915_private;
 
+struct intel_gt *intel_pxp_get_owning_gt(struct drm_i915_private *i915);
+
 struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
 bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
 bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index 1c6bc56391b7..eb7adb972610 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -20,8 +20,12 @@
 static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
 {
 	struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
+	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
 
-	return &to_gt(i915)->pxp;
+	if (!gt)
+		return NULL;
+
+	return &gt->pxp;
 }
 
 static int intel_pxp_tee_io_message(struct intel_pxp *pxp,
@@ -128,10 +132,16 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev,
 {
 	struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
 	struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
-	struct intel_uc *uc = &pxp_to_gt(pxp)->uc;
+	struct intel_uc *uc;
 	intel_wakeref_t wakeref;
 	int ret = 0;
 
+	if (!pxp) {
+		drm_warn(&i915->drm, "tee comp binding without a PXP-owner GT\n");
+		return -ENODEV;
+	}
+	uc = &pxp_to_gt(pxp)->uc;
+
 	mutex_lock(&pxp->tee_mutex);
 	pxp->pxp_component = data;
 	pxp->pxp_component->tee_dev = tee_kdev;
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [Intel-gfx] [PATCH v3 5/6] drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT
  2022-10-21 17:39 [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL Alan Previn
                   ` (3 preceding siblings ...)
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 4/6] drm/i915/pxp: Make PXP tee component bind/unbind aware of PXP-owning-GT Alan Previn
@ 2022-10-21 17:39 ` Alan Previn
  2022-11-15  4:20   ` Ceraolo Spurio, Daniele
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 6/6] drm/i915/pxp: Make intel_pxp_key_check " Alan Previn
                   ` (2 subsequent siblings)
  7 siblings, 1 reply; 19+ messages in thread
From: Alan Previn @ 2022-10-21 17:39 UTC (permalink / raw)
  To: intel-gfx

Make intel_pxp_is_start implicitly find the PXP-owning-GT.
Callers of this function shall now pass in i915 since PXP
is a global GPU feature. Make intel_pxp_start implicitly
find the right gt to start PXP arb session so
it's transparent to the callers.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp.c        | 9 ++++++++-
 drivers/gpu/drm/i915/pxp/intel_pxp.h        | 2 +-
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 798e77398acc..af60f6494947 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -272,7 +272,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
 		pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
 
 		if (!intel_pxp_is_active(i915))
-			ret = intel_pxp_start(&to_gt(i915)->pxp);
+			ret = intel_pxp_start(i915);
 	}
 
 	return ret;
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index 2c835c38c527..c87f812ba13a 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -259,10 +259,17 @@ static bool pxp_component_bound(struct intel_pxp *pxp)
  * the arb session is restarted from the irq work when we receive the
  * termination completion interrupt
  */
-int intel_pxp_start(struct intel_pxp *pxp)
+int intel_pxp_start(struct drm_i915_private *i915)
 {
+	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
+	struct intel_pxp *pxp;
 	int ret = 0;
 
+	if (!gt)
+		return -ENODEV;
+
+	pxp = &gt->pxp;
+
 	if (!intel_gtpxp_is_enabled(pxp))
 		return -ENODEV;
 
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index 7d93055cdd6b..c45949bb1f7b 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -31,7 +31,7 @@ void intel_pxp_fini_hw(struct intel_pxp *pxp);
 
 void intel_pxp_mark_termination_in_progress(struct intel_pxp *pxp);
 
-int intel_pxp_start(struct intel_pxp *pxp);
+int intel_pxp_start(struct drm_i915_private *i915);
 
 int intel_pxp_key_check(struct intel_pxp *pxp,
 			struct drm_i915_gem_object *obj,
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [Intel-gfx] [PATCH v3 6/6] drm/i915/pxp: Make intel_pxp_key_check implicitly sort PXP-owning-GT
  2022-10-21 17:39 [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL Alan Previn
                   ` (4 preceding siblings ...)
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 5/6] drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT Alan Previn
@ 2022-10-21 17:39 ` Alan Previn
  2022-11-15  4:21   ` Ceraolo Spurio, Daniele
  2022-10-21 18:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pxp: Prepare intel_pxp entry points for MTL (rev3) Patchwork
  2022-10-22 11:44 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  7 siblings, 1 reply; 19+ messages in thread
From: Alan Previn @ 2022-10-21 17:39 UTC (permalink / raw)
  To: intel-gfx

Make intel_pxp_key_check implicitly find the PXP-owning-GT.
Callers of this function shall now pass in i915 since PXP
is a global GPU feature. Make intel_pxp_key_check implicitly
find the right gt to verify pxp session key establishment count
so it's transparent to the callers.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 drivers/gpu/drm/i915/display/skl_universal_plane.c |  2 +-
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c     |  2 +-
 drivers/gpu/drm/i915/pxp/intel_pxp.c               | 10 +++++++++-
 drivers/gpu/drm/i915/pxp/intel_pxp.h               |  2 +-
 4 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 7cb713043408..04e78acbaf5f 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1841,7 +1841,7 @@ static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj)
 {
 	struct drm_i915_private *i915 = to_i915(obj->base.dev);
 
-	return intel_pxp_key_check(&to_gt(i915)->pxp, obj, false) == 0;
+	return intel_pxp_key_check(i915, obj, false) == 0;
 }
 
 static bool pxp_is_borked(struct drm_i915_gem_object *obj)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 1160723c9d2d..23224977e003 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -868,7 +868,7 @@ static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle)
 		 */
 		if (i915_gem_context_uses_protected_content(eb->gem_context) &&
 		    i915_gem_object_is_protected(obj)) {
-			err = intel_pxp_key_check(&vm->gt->pxp, obj, true);
+			err = intel_pxp_key_check(vm->gt->i915, obj, true);
 			if (err) {
 				i915_gem_object_put(obj);
 				return ERR_PTR(err);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
index c87f812ba13a..5c9a4b2c9a75 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
@@ -313,10 +313,18 @@ void intel_pxp_fini_hw(struct intel_pxp *pxp)
 	intel_pxp_irq_disable(pxp);
 }
 
-int intel_pxp_key_check(struct intel_pxp *pxp,
+int intel_pxp_key_check(struct drm_i915_private *i915,
 			struct drm_i915_gem_object *obj,
 			bool assign)
 {
+	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
+	struct intel_pxp *pxp;
+
+	if (!gt)
+		return -ENODEV;
+
+	pxp = &gt->pxp;
+
 	if (!intel_gtpxp_is_active(pxp))
 		return -ENODEV;
 
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
index c45949bb1f7b..85c5499daba5 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
@@ -33,7 +33,7 @@ void intel_pxp_mark_termination_in_progress(struct intel_pxp *pxp);
 
 int intel_pxp_start(struct drm_i915_private *i915);
 
-int intel_pxp_key_check(struct intel_pxp *pxp,
+int intel_pxp_key_check(struct drm_i915_private *i915,
 			struct drm_i915_gem_object *obj,
 			bool assign);
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pxp: Prepare intel_pxp entry points for MTL (rev3)
  2022-10-21 17:39 [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL Alan Previn
                   ` (5 preceding siblings ...)
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 6/6] drm/i915/pxp: Make intel_pxp_key_check " Alan Previn
@ 2022-10-21 18:34 ` Patchwork
  2022-10-22 11:44 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  7 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-10-21 18:34 UTC (permalink / raw)
  To: Alan Previn; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 6556 bytes --]

== Series Details ==

Series: drm/i915/pxp: Prepare intel_pxp entry points for MTL (rev3)
URL   : https://patchwork.freedesktop.org/series/109429/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12275 -> Patchwork_109429v3
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/index.html

Participating hosts (42 -> 42)
------------------------------

  Additional (2): fi-tgl-dsi fi-pnv-d510 
  Missing    (2): fi-ctg-p8600 fi-bdw-samus 

Known issues
------------

  Here are the changes found in Patchwork_109429v3 that come from known issues:

### CI changes ###

#### Possible fixes ####

  * boot:
    - fi-bxt-dsi:         [FAIL][1] -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/fi-bxt-dsi/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-bxt-dsi/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-bxt-dsi/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-bxt-dsi/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_tiled_blits@basic:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][5] ([fdo#109271]) +12 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-bxt-dsi/igt@gem_tiled_blits@basic.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-glk-j4005:       [PASS][6] -> [DMESG-FAIL][7] ([i915#5334])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-bsw-nick:        NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-bsw-nick/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-bxt-dsi/igt@kms_chamelium@hdmi-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
    - fi-bsw-kefka:       [PASS][10] -> [FAIL][11] ([i915#6298])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - fi-bsw-nick:        NOTRUN -> [SKIP][12] ([fdo#109271])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-bsw-nick/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@kms_psr@primary_page_flip:
    - fi-pnv-d510:        NOTRUN -> [SKIP][13] ([fdo#109271]) +43 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-pnv-d510/igt@kms_psr@primary_page_flip.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-bsw-nick:        [INCOMPLETE][14] -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/fi-bsw-nick/igt@i915_selftest@live@gt_heartbeat.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/fi-bsw-nick/igt@i915_selftest@live@gt_heartbeat.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1759]: https://gitlab.freedesktop.org/drm/intel/issues/1759
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
  [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7029]: https://gitlab.freedesktop.org/drm/intel/issues/7029


Build changes
-------------

  * Linux: CI_DRM_12275 -> Patchwork_109429v3

  CI-20190529: 20190529
  CI_DRM_12275: d4a671f9794a18817af8df5bce34ad18a10372ee @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7022: d73b21e653555d2e0370789071799aa0037049c1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_109429v3: d4a671f9794a18817af8df5bce34ad18a10372ee @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

b5675b2a8bd5 drm/i915/pxp: Make intel_pxp_key_check implicitly sort PXP-owning-GT
a8db5f65dd04 drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT
03c88d883eb6 drm/i915/pxp: Make PXP tee component bind/unbind aware of PXP-owning-GT
da33145ee2c4 drm/i915/pxp: Make intel_pxp_is_active implicitly sort PXP-owning-GT
a0d171177700 drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT
ba6eaad2313f drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/index.html

[-- Attachment #2: Type: text/html, Size: 6843 bytes --]

^ permalink raw reply	[flat|nested] 19+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pxp: Prepare intel_pxp entry points for MTL (rev3)
  2022-10-21 17:39 [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL Alan Previn
                   ` (6 preceding siblings ...)
  2022-10-21 18:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pxp: Prepare intel_pxp entry points for MTL (rev3) Patchwork
@ 2022-10-22 11:44 ` Patchwork
  7 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-10-22 11:44 UTC (permalink / raw)
  To: Alan Previn; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 37240 bytes --]

== Series Details ==

Series: drm/i915/pxp: Prepare intel_pxp entry points for MTL (rev3)
URL   : https://patchwork.freedesktop.org/series/109429/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12275_full -> Patchwork_109429v3_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_109429v3_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_109429v3_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (9 -> 11)
------------------------------

  Additional (2): shard-rkl shard-dg1 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_109429v3_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_ctx_isolation@preservation-s3@vecs0:
    - shard-skl:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl6/igt@gem_ctx_isolation@preservation-s3@vecs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl10/igt@gem_ctx_isolation@preservation-s3@vecs0.html

  * igt@i915_pm_rpm@cursor-dpms:
    - shard-iclb:         [PASS][3] -> [INCOMPLETE][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb4/igt@i915_pm_rpm@cursor-dpms.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb7/igt@i915_pm_rpm@cursor-dpms.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
    - {shard-rkl}:        NOTRUN -> [WARN][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html

  * igt@perf@non-zero-reason:
    - {shard-rkl}:        NOTRUN -> [INCOMPLETE][6] +1 similar issue
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-rkl-2/igt@perf@non-zero-reason.html

  
Known issues
------------

  Here are the changes found in Patchwork_109429v3_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@read_all_entries_display_on:
    - shard-glk:          [PASS][7] -> [DMESG-WARN][8] ([i915#118]) +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-glk5/igt@debugfs_test@read_all_entries_display_on.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-glk7/igt@debugfs_test@read_all_entries_display_on.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([i915#4525]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb4/igt@gem_exec_balancer@parallel-keep-in-fence.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb7/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-apl:          [PASS][11] -> [SKIP][12] ([fdo#109271])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl2/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][13] ([i915#2842])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb2/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_huc_copy@huc-copy:
    - shard-skl:          NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#2190])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl6/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
    - shard-skl:          NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#4613])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl6/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-skl:          NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3323])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl6/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [PASS][17] -> [FAIL][18] ([i915#3989] / [i915#454])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb6/igt@i915_pm_dc@dc6-dpms.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html

  * igt@kms_chamelium@dp-hpd-for-each-pipe:
    - shard-apl:          NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl8/igt@kms_chamelium@dp-hpd-for-each-pipe.html

  * igt@kms_color@degamma:
    - shard-skl:          NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#3546])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl6/igt@kms_color@degamma.html

  * igt@kms_cursor_edge_walk@right-edge@pipe-a-edp-1-64x64:
    - shard-tglb:         [PASS][21] -> [INCOMPLETE][22] ([i915#6954])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-tglb7/igt@kms_cursor_edge_walk@right-edge@pipe-a-edp-1-64x64.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-tglb8/igt@kms_cursor_edge_walk@right-edge@pipe-a-edp-1-64x64.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
    - shard-glk:          [PASS][23] -> [FAIL][24] ([i915#2346])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-skl:          [PASS][25] -> [FAIL][26] ([i915#79])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
    - shard-skl:          [PASS][27] -> [FAIL][28] ([i915#2122])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl6/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl10/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
    - shard-iclb:         NOTRUN -> [SKIP][29] ([i915#2587] / [i915#2672]) +2 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][30] ([i915#3555])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][31] ([i915#2672]) +2 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-upscaling@pipe-a-default-mode:
    - shard-skl:          NOTRUN -> [SKIP][32] ([fdo#109271]) +9 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl9/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
    - shard-iclb:         NOTRUN -> [SKIP][33] ([i915#2672] / [i915#3555]) +1 similar issue
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][34] -> [SKIP][35] ([fdo#109441]) +3 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb7/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-apl:          NOTRUN -> [SKIP][36] ([fdo#109271]) +19 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl8/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-apl:          [PASS][37] -> [DMESG-WARN][38] ([i915#180]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl1/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl2/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

  * igt@perf@short-reads:
    - shard-skl:          [PASS][39] -> [FAIL][40] ([i915#51])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl7/igt@perf@short-reads.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl7/igt@perf@short-reads.html

  * igt@perf_pmu@module-unload:
    - shard-skl:          [PASS][41] -> [DMESG-WARN][42] ([i915#1982]) +1 similar issue
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl4/igt@perf_pmu@module-unload.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl9/igt@perf_pmu@module-unload.html

  * igt@sysfs_heartbeat_interval@mixed@bcs0:
    - shard-apl:          [PASS][43] -> [FAIL][44] ([i915#1731])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl2/igt@sysfs_heartbeat_interval@mixed@bcs0.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl1/igt@sysfs_heartbeat_interval@mixed@bcs0.html

  
#### Possible fixes ####

  * igt@gem_eio@reset-stress:
    - shard-tglb:         [FAIL][45] ([i915#5784]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-tglb2/igt@gem_eio@reset-stress.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-tglb7/igt@gem_eio@reset-stress.html

  * igt@gem_exec_balancer@parallel-out-fence:
    - shard-iclb:         [SKIP][47] ([i915#4525]) -> [PASS][48] +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb3/igt@gem_exec_balancer@parallel-out-fence.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb1/igt@gem_exec_balancer@parallel-out-fence.html

  * igt@gem_softpin@evict-single-offset:
    - shard-tglb:         [FAIL][49] ([i915#4171]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-tglb6/igt@gem_softpin@evict-single-offset.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-tglb7/igt@gem_softpin@evict-single-offset.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-apl:          [DMESG-WARN][51] ([i915#180]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl8/igt@gem_workarounds@suspend-resume-fd.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl8/igt@gem_workarounds@suspend-resume-fd.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-apl:          [DMESG-WARN][53] ([i915#5566] / [i915#716]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl8/igt@gen9_exec_parse@allowed-single.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl8/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-iclb:         [SKIP][55] ([i915#4281]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb5/igt@i915_pm_dc@dc9-dpms.html

  * igt@i915_pm_sseu@full-enable:
    - shard-skl:          [FAIL][57] ([i915#6991]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl9/igt@i915_pm_sseu@full-enable.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl6/igt@i915_pm_sseu@full-enable.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-edp-1:
    - shard-skl:          [FAIL][59] ([i915#2521]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl7/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-edp-1.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl4/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-edp-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
    - shard-glk:          [FAIL][61] ([i915#2346]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html

  * igt@kms_flip@flip-vs-expired-vblank@b-dp1:
    - shard-apl:          [FAIL][63] ([i915#79]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl1/igt@kms_flip@flip-vs-expired-vblank@b-dp1.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl8/igt@kms_flip@flip-vs-expired-vblank@b-dp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
    - shard-glk:          [FAIL][65] ([i915#2546]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-glk5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-glk7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-blt:
    - shard-skl:          [DMESG-WARN][67] ([i915#1982]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-blt.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1:
    - shard-iclb:         [SKIP][69] ([i915#5176]) -> [PASS][70] +2 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb2/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb4/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1:
    - shard-iclb:         [SKIP][71] ([i915#5235]) -> [PASS][72] +2 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb2/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb7/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a-edp-1.html

  * igt@kms_psr@psr2_dpms:
    - shard-iclb:         [SKIP][73] ([fdo#109441]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb7/igt@kms_psr@psr2_dpms.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb2/igt@kms_psr@psr2_dpms.html

  * igt@perf@polling:
    - shard-skl:          [FAIL][75] ([i915#1542]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl9/igt@perf@polling.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl10/igt@perf@polling.html

  * igt@perf@polling-parameterized:
    - shard-skl:          [FAIL][77] ([i915#5639]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl7/igt@perf@polling-parameterized.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl4/igt@perf@polling-parameterized.html

  * igt@perf_pmu@interrupts:
    - shard-skl:          [FAIL][79] -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl9/igt@perf_pmu@interrupts.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl10/igt@perf_pmu@interrupts.html

  
#### Warnings ####

  * igt@dmabuf@all@dma_fence_chain:
    - shard-skl:          [INCOMPLETE][81] ([i915#6949] / [i915#7165]) -> [INCOMPLETE][82] ([i915#7065])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl4/igt@dmabuf@all@dma_fence_chain.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl6/igt@dmabuf@all@dma_fence_chain.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-iclb:         [SKIP][83] ([i915#4525]) -> [FAIL][84] ([i915#6117])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb7/igt@gem_exec_balancer@parallel-ordering.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb2/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_pread@exhaustion:
    - shard-glk:          [INCOMPLETE][85] ([i915#7248]) -> [WARN][86] ([i915#2658])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-glk7/igt@gem_pread@exhaustion.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-glk6/igt@gem_pread@exhaustion.html

  * igt@i915_pm_rc6_residency@rc6-idle@rcs0:
    - shard-iclb:         [FAIL][87] ([i915#2684]) -> [WARN][88] ([i915#2684])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb3/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb6/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
    - shard-iclb:         [SKIP][89] ([i915#658]) -> [SKIP][90] ([i915#2920])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb7/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
    - shard-iclb:         [SKIP][91] ([fdo#111068] / [i915#658]) -> [SKIP][92] ([i915#2920]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html

  * igt@runner@aborted:
    - shard-apl:          ([FAIL][93], [FAIL][94], [FAIL][95], [FAIL][96], [FAIL][97], [FAIL][98], [FAIL][99]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312]) -> ([FAIL][100], [FAIL][101], [FAIL][102], [FAIL][103], [FAIL][104], [FAIL][105]) ([i915#180] / [i915#3002] / [i915#4312])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl3/igt@runner@aborted.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl8/igt@runner@aborted.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl8/igt@runner@aborted.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl8/igt@runner@aborted.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl6/igt@runner@aborted.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl2/igt@runner@aborted.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-apl1/igt@runner@aborted.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl6/igt@runner@aborted.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl2/igt@runner@aborted.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl7/igt@runner@aborted.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl1/igt@runner@aborted.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl3/igt@runner@aborted.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-apl3/igt@runner@aborted.html
    - shard-skl:          ([FAIL][106], [FAIL][107], [FAIL][108], [FAIL][109], [FAIL][110]) ([i915#3002] / [i915#4312] / [i915#6949]) -> ([FAIL][111], [FAIL][112], [FAIL][113], [FAIL][114]) ([i915#3002] / [i915#4312])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl4/igt@runner@aborted.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl4/igt@runner@aborted.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl6/igt@runner@aborted.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl9/igt@runner@aborted.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-skl9/igt@runner@aborted.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl6/igt@runner@aborted.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl10/igt@runner@aborted.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl9/igt@runner@aborted.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-skl10/igt@runner@aborted.html
    - shard-iclb:         ([FAIL][115], [FAIL][116], [FAIL][117], [FAIL][118], [FAIL][119], [FAIL][120]) ([i915#3002] / [i915#4312] / [i915#7300]) -> ([FAIL][121], [FAIL][122], [FAIL][123], [FAIL][124], [FAIL][125], [FAIL][126]) ([i915#3002] / [i915#4312])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb1/igt@runner@aborted.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb5/igt@runner@aborted.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb3/igt@runner@aborted.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb6/igt@runner@aborted.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb8/igt@runner@aborted.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12275/shard-iclb8/igt@runner@aborted.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb7/igt@runner@aborted.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb8/igt@runner@aborted.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb8/igt@runner@aborted.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb1/igt@runner@aborted.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb3/igt@runner@aborted.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/shard-iclb3/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
  [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
  [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
  [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
  [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
  [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#1731]: https://gitlab.freedesktop.org/drm/intel/issues/1731
  [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
  [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
  [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
  [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
  [i915#2435]: https://gitlab.freedesktop.org/drm/intel/issues/2435
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2546]: https://gitlab.freedesktop.org/drm/intel/issues/2546
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
  [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
  [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3810]: https://gitlab.freedesktop.org/drm/intel/issues/3810
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3938]: https://gitlab.freedesktop.org/drm/intel/issues/3938
  [i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
  [i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036
  [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4171]: https://gitlab.freedesktop.org/drm/intel/issues/4171
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4855]: https://gitlab.freedesktop.org/drm/intel/issues/4855
  [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4874]: https://gitlab.freedesktop.org/drm/intel/issues/4874
  [i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877
  [i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
  [i915#4883]: https://gitlab.freedesktop.org/drm/intel/issues/4883
  [i915#4884]: https://gitlab.freedesktop.org/drm/intel/issues/4884
  [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
  [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
  [i915#51]: https://gitlab.freedesktop.org/drm/intel/issues/51
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
  [i915#5639]: https://gitlab.freedesktop.org/drm/intel/issues/5639
  [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6032]: https://gitlab.freedesktop.org/drm/intel/issues/6032
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
  [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
  [i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
  [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
  [i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
  [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
  [i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#6463]: https://gitlab.freedesktop.org/drm/intel/issues/6463
  [i915#6493]: https://gitlab.freedesktop.org/drm/intel/issues/6493
  [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
  [i915#6949]: https://gitlab.freedesktop.org/drm/intel/issues/6949
  [i915#6954]: https://gitlab.freedesktop.org/drm/intel/issues/6954
  [i915#6991]: https://gitlab.freedesktop.org/drm/intel/issues/6991
  [i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
  [i915#7065]: https://gitlab.freedesktop.org/drm/intel/issues/7065
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
  [i915#7165]: https://gitlab.freedesktop.org/drm/intel/issues/7165
  [i915#7178]: https://gitlab.freedesktop.org/drm/intel/issues/7178
  [i915#7248]: https://gitlab.freedesktop.org/drm/intel/issues/7248
  [i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276
  [i915#7300]: https://gitlab.freedesktop.org/drm/intel/issues/7300
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79


Build changes
-------------

  * Linux: CI_DRM_12275 -> Patchwork_109429v3

  CI-20190529: 20190529
  CI_DRM_12275: d4a671f9794a18817af8df5bce34ad18a10372ee @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7022: d73b21e653555d2e0370789071799aa0037049c1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_109429v3: d4a671f9794a18817af8df5bce34ad18a10372ee @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109429v3/index.html

[-- Attachment #2: Type: text/html, Size: 32374 bytes --]

^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 1/6] drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 1/6] drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT Alan Previn
@ 2022-11-15  4:00   ` Ceraolo Spurio, Daniele
  2022-11-15  5:10     ` Teres Alexis, Alan Previn
  0 siblings, 1 reply; 19+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-11-15  4:00 UTC (permalink / raw)
  To: Alan Previn, intel-gfx



On 10/21/2022 10:39 AM, Alan Previn wrote:
> In preparation for future MTL-PXP feature support, PXP control
> context should only valid on the correct gt tile. Depending on the
> device-info this depends on which tile owns the VEBOX and KCR.
> PXP is still a global feature though (despite its control-context
> located in the owning GT structure). Additionally, we find
> that the HAS_PXP macro is only used within the pxp module,
>
> That said, lets drop that HAS_PXP macro altogether and replace it
> with a more fitting named intel_gtpxp_is_supported and helpers
> so that PXP init/fini can use to verify if the referenced gt supports
> PXP or teelink.
>
> Add TODO for Meteorlake that will come in future series.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.h              |  4 ---
>   drivers/gpu/drm/i915/pxp/intel_pxp.c         | 35 ++++++++++++++++----
>   drivers/gpu/drm/i915/pxp/intel_pxp.h         |  2 ++
>   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c |  2 +-
>   4 files changed, 32 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7c64f8a17493..0921d1107825 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -923,10 +923,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>   
>   #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)	(INTEL_INFO(dev_priv)->has_global_mocs)
>   
> -#define HAS_PXP(dev_priv)  ((IS_ENABLED(CONFIG_DRM_I915_PXP) && \
> -			    INTEL_INFO(dev_priv)->has_pxp) && \
> -			    VDBOX_MASK(to_gt(dev_priv)))
> -
>   #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
>   
>   #define HAS_GMD_ID(i915)	(INTEL_INFO(i915)->has_gmd_id)
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 5efe61f67546..545c075bf1aa 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -44,6 +44,30 @@ struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp)
>   	return container_of(pxp, struct intel_gt, pxp);
>   }
>   
> +static bool _gt_needs_teelink(struct intel_gt *gt)
> +{
> +	/* TODO: MTL won't rely on CONFIG_INTEL_MEI_PXP but on GSC engine */
> +	return (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && intel_huc_is_loaded_by_gsc(&gt->uc.huc) &&
> +		intel_uc_uses_huc(&gt->uc));
> +}
> +
> +static bool _gt_supports_pxp(struct intel_gt *gt)
> +{
> +	/* TODO: MTL won't rely on CONFIG_INTEL_MEI_PXP but on GSC engine */
> +	return (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && IS_ENABLED(CONFIG_DRM_I915_PXP) &&
> +		INTEL_INFO((gt)->i915)->has_pxp && VDBOX_MASK(gt));
> +}
> +
> +bool intel_gtpxp_is_supported(struct intel_pxp *pxp)
> +{
> +	struct intel_gt *gt = pxp_to_gt(pxp);
> +
> +	if (_gt_needs_teelink(gt) || _gt_supports_pxp(gt))
> +		return true;
> +
> +	return false;
> +}
> +
>   bool intel_pxp_is_enabled(const struct intel_pxp *pxp)
>   {
>   	return pxp->ce;
> @@ -142,22 +166,21 @@ void intel_pxp_init(struct intel_pxp *pxp)
>   {
>   	struct intel_gt *gt = pxp_to_gt(pxp);
>   
> -	/* we rely on the mei PXP module */
> -	if (!IS_ENABLED(CONFIG_INTEL_MEI_PXP))
> -		return;
> -
>   	/*
>   	 * If HuC is loaded by GSC but PXP is disabled, we can skip the init of
>   	 * the full PXP session/object management and just init the tee channel.
>   	 */
> -	if (HAS_PXP(gt->i915))
> +	if (_gt_supports_pxp(gt))
>   		pxp_init_full(pxp);
> -	else if (intel_huc_is_loaded_by_gsc(&gt->uc.huc) && intel_uc_uses_huc(&gt->uc))
> +	else if (_gt_needs_teelink(gt))
>   		intel_pxp_tee_component_init(pxp);
>   }
>   
>   void intel_pxp_fini(struct intel_pxp *pxp)
>   {
> +	if (!intel_gtpxp_is_supported(pxp))
> +		return;

Why do you need this? the fini below should already be smart enough to 
only cleanup when needed.

> +
>   	pxp->arb_is_valid = false;
>   
>   	intel_pxp_tee_component_fini(pxp);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> index 2da309088c6d..c12e4d419c78 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> @@ -13,6 +13,8 @@ struct intel_pxp;
>   struct drm_i915_gem_object;
>   
>   struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
> +bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
> +
>   bool intel_pxp_is_enabled(const struct intel_pxp *pxp);
>   bool intel_pxp_is_active(const struct intel_pxp *pxp);
>   
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> index 4359e8be4101..124663cf0047 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> @@ -70,7 +70,7 @@ void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
>   	if (!gt_root)
>   		return;
>   
> -	if (!HAS_PXP((pxp_to_gt(pxp)->i915)))
> +	if (!intel_gtpxp_is_supported(pxp))
>   		return;
>   

This now returns true for DG2, but  we don't want to register the PXP 
debugfs there as we don't support PXP aside from HuC loading. IMO a 
better approach would be to have intel_gtpxp_is_supported be what you 
currently have as _gt_supports_pxp().

Also, intel_gtpxp_is_supported is a bit confusing because of the new 
"gtpxp" prefix. Why not use just intel_pxp_is_supported? We already have 
per-gt checkers that refer only to the subcomponent, like 
intel_huc_is_supported(), which for MTL is false on the primary GT and 
true on the media one. I don't see why we can't do the same for PXP.

Daniele

>   	root = debugfs_create_dir("pxp", gt_root);


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 2/6] drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 2/6] drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT Alan Previn
@ 2022-11-15  4:11   ` Ceraolo Spurio, Daniele
  2022-11-15  5:23     ` Teres Alexis, Alan Previn
  0 siblings, 1 reply; 19+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-11-15  4:11 UTC (permalink / raw)
  To: Alan Previn, intel-gfx



On 10/21/2022 10:39 AM, Alan Previn wrote:
> Make intel_pxp_is_enabled a global check and implicitly find the
> PXP-owning-GT.
>
> PXP feature support is a device-config flag. In preparation for MTL
> PXP control-context shall reside on of the two GT's. That said,
> update intel_pxp_is_enabled to take in i915 as its input and internally
> find the right gt to check if PXP is enabled so its transparent to
> callers of this functions.
>
> However we also need to expose the per-gt variation of this internal
> pxp files to use (like what intel_pxp_enabled was prior) so also expose
> a new intel_gtpxp_is_enabled function for replacement.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
>   drivers/gpu/drm/i915/gem/i915_gem_context.c  |  2 +-
>   drivers/gpu/drm/i915/gem/i915_gem_create.c   |  2 +-
>   drivers/gpu/drm/i915/pxp/intel_pxp.c         | 28 ++++++++++++++++++--
>   drivers/gpu/drm/i915/pxp/intel_pxp.h         |  4 ++-
>   drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c     |  2 +-
>   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c |  2 +-
>   drivers/gpu/drm/i915/pxp/intel_pxp_irq.c     |  2 +-
>   drivers/gpu/drm/i915/pxp/intel_pxp_pm.c      |  8 +++---
>   drivers/gpu/drm/i915/pxp/intel_pxp_tee.c     |  4 +--
>   9 files changed, 40 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 1e29b1e6d186..72f47ebda75f 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -257,7 +257,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
>   
>   	if (!protected) {
>   		pc->uses_protected_content = false;
> -	} else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) {
> +	} else if (!intel_pxp_is_enabled(i915)) {
>   		ret = -ENODEV;
>   	} else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) ||
>   		   !(pc->user_flags & BIT(UCONTEXT_BANNABLE))) {
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c
> index 33673fe7ee0a..e44803f9bec4 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
> @@ -384,7 +384,7 @@ static int ext_set_protected(struct i915_user_extension __user *base, void *data
>   	if (ext.flags)
>   		return -EINVAL;
>   
> -	if (!intel_pxp_is_enabled(&to_gt(ext_data->i915)->pxp))
> +	if (!intel_pxp_is_enabled(ext_data->i915))
>   		return -ENODEV;
>   
>   	ext_data->flags |= I915_BO_PROTECTED;
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 545c075bf1aa..f7c909fce97c 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -9,6 +9,7 @@
>   #include "intel_pxp_tee.h"
>   #include "gem/i915_gem_context.h"
>   #include "gt/intel_context.h"
> +#include "gt/intel_gt.h"
>   #include "i915_drv.h"
>   
>   /**
> @@ -68,11 +69,34 @@ bool intel_gtpxp_is_supported(struct intel_pxp *pxp)
>   	return false;
>   }
>   
> -bool intel_pxp_is_enabled(const struct intel_pxp *pxp)
> +bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp)

I'd rename this to intel_pxp_is_initialized, that way we don't have 2 
almost identically named checkers that mean different things (and also 
avoid the gtpxp prefix).

>   {
>   	return pxp->ce;
>   }
>   
> +static struct intel_gt *_i915_to_pxp_gt(struct drm_i915_private *i915)

nit: why the "_" prefix? we usually don't use it for x_to_y functions. 
Not a blocker.

> +{
> +	struct intel_gt *gt = NULL;
> +	int i = 0;
> +
> +	for_each_gt(gt, i915, i) {
> +		/* There can be only one GT that supports PXP */



> +		if (gt && intel_gtpxp_is_supported(&gt->pxp))

for_each_gt already checks for gt not being NULL, no need to check again.

Daniele

> +			return gt;
> +	}
> +	return NULL;
> +}
> +
> +bool intel_pxp_is_enabled(struct drm_i915_private *i915)
> +{
> +	struct intel_gt *gt = _i915_to_pxp_gt(i915);
> +
> +	if (!gt)
> +		return false;
> +
> +	return intel_gtpxp_is_enabled(&gt->pxp);
> +}
> +
>   bool intel_pxp_is_active(const struct intel_pxp *pxp)
>   {
>   	return pxp->arb_is_valid;
> @@ -229,7 +253,7 @@ int intel_pxp_start(struct intel_pxp *pxp)
>   {
>   	int ret = 0;
>   
> -	if (!intel_pxp_is_enabled(pxp))
> +	if (!intel_gtpxp_is_enabled(pxp))
>   		return -ENODEV;
>   
>   	if (wait_for(pxp_component_bound(pxp), 250))
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> index c12e4d419c78..61472018bc45 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> @@ -11,11 +11,13 @@
>   
>   struct intel_pxp;
>   struct drm_i915_gem_object;
> +struct drm_i915_private;
>   
>   struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
>   bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
> +bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp);
>   
> -bool intel_pxp_is_enabled(const struct intel_pxp *pxp);
> +bool intel_pxp_is_enabled(struct drm_i915_private *i915);
>   bool intel_pxp_is_active(const struct intel_pxp *pxp);
>   
>   void intel_pxp_init(struct intel_pxp *pxp);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c
> index f41e45763d0d..0987bb552eaa 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c
> @@ -99,7 +99,7 @@ int intel_pxp_terminate_session(struct intel_pxp *pxp, u32 id)
>   	u32 *cs;
>   	int err = 0;
>   
> -	if (!intel_pxp_is_enabled(pxp))
> +	if (!intel_gtpxp_is_enabled(pxp))
>   		return 0;
>   
>   	rq = i915_request_create(ce);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> index 124663cf0047..13f517f94bae 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> @@ -18,7 +18,7 @@ static int pxp_info_show(struct seq_file *m, void *data)
>   {
>   	struct intel_pxp *pxp = m->private;
>   	struct drm_printer p = drm_seq_file_printer(m);
> -	bool enabled = intel_pxp_is_enabled(pxp);
> +	bool enabled = intel_gtpxp_is_enabled(pxp);
>   
>   	if (!enabled) {
>   		drm_printf(&p, "pxp disabled\n");
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
> index c28be430718a..8e8e5645e4fc 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
> @@ -22,7 +22,7 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
>   {
>   	struct intel_gt *gt = pxp_to_gt(pxp);
>   
> -	if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp)))
> +	if (GEM_WARN_ON(!intel_gtpxp_is_enabled(pxp)))
>   		return;
>   
>   	lockdep_assert_held(gt->irq_lock);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
> index 6a7d4e2ee138..c095a9e0a01f 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
> @@ -11,7 +11,7 @@
>   
>   void intel_pxp_suspend_prepare(struct intel_pxp *pxp)
>   {
> -	if (!intel_pxp_is_enabled(pxp))
> +	if (!intel_gtpxp_is_enabled(pxp))
>   		return;
>   
>   	pxp->arb_is_valid = false;
> @@ -23,7 +23,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp)
>   {
>   	intel_wakeref_t wakeref;
>   
> -	if (!intel_pxp_is_enabled(pxp))
> +	if (!intel_gtpxp_is_enabled(pxp))
>   		return;
>   
>   	with_intel_runtime_pm(&pxp_to_gt(pxp)->i915->runtime_pm, wakeref) {
> @@ -34,7 +34,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp)
>   
>   void intel_pxp_resume(struct intel_pxp *pxp)
>   {
> -	if (!intel_pxp_is_enabled(pxp))
> +	if (!intel_gtpxp_is_enabled(pxp))
>   		return;
>   
>   	/*
> @@ -50,7 +50,7 @@ void intel_pxp_resume(struct intel_pxp *pxp)
>   
>   void intel_pxp_runtime_suspend(struct intel_pxp *pxp)
>   {
> -	if (!intel_pxp_is_enabled(pxp))
> +	if (!intel_gtpxp_is_enabled(pxp))
>   		return;
>   
>   	pxp->arb_is_valid = false;
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> index 052fd2f9a583..1c6bc56391b7 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> @@ -152,7 +152,7 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev,
>   		return 0;
>   
>   	/* the component is required to fully start the PXP HW */
> -	if (intel_pxp_is_enabled(pxp))
> +	if (intel_gtpxp_is_enabled(pxp))
>   		intel_pxp_init_hw(pxp);
>   
>   	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> @@ -167,7 +167,7 @@ static void i915_pxp_tee_component_unbind(struct device *i915_kdev,
>   	struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
>   	intel_wakeref_t wakeref;
>   
> -	if (intel_pxp_is_enabled(pxp))
> +	if (intel_gtpxp_is_enabled(pxp))
>   		with_intel_runtime_pm_if_in_use(&i915->runtime_pm, wakeref)
>   			intel_pxp_fini_hw(pxp);
>   


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/pxp: Make intel_pxp_is_active implicitly sort PXP-owning-GT
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 3/6] drm/i915/pxp: Make intel_pxp_is_active " Alan Previn
@ 2022-11-15  4:17   ` Ceraolo Spurio, Daniele
  2022-11-15  5:26     ` Teres Alexis, Alan Previn
  0 siblings, 1 reply; 19+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-11-15  4:17 UTC (permalink / raw)
  To: Alan Previn, intel-gfx



On 10/21/2022 10:39 AM, Alan Previn wrote:
> Make intel_pxp_is_active a global check and implicitly find
> the PXP-owning-GT.
>
> As per prior two patches, callers of this function shall now
> pass in i915 since PXP is a global GPU feature. Make
> intel_pxp_is_active implicitly find the right gt so it's transparent
> for global view callers (like display or gem-exec).
>
> However we also need to expose the per-gt variation of this for internal
> pxp files to use (like what intel_pxp_is_active was prior) so also expose
> a new intel_gtpxp_is_active function for replacement.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
>   drivers/gpu/drm/i915/gem/i915_gem_context.c  |  2 +-
>   drivers/gpu/drm/i915/pxp/intel_pxp.c         | 14 ++++++++++++--
>   drivers/gpu/drm/i915/pxp/intel_pxp.h         |  3 ++-
>   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c |  4 ++--
>   drivers/gpu/drm/i915/pxp/intel_pxp_irq.c     |  2 +-
>   5 files changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 72f47ebda75f..798e77398acc 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -271,7 +271,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
>   		 */
>   		pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>   
> -		if (!intel_pxp_is_active(&to_gt(i915)->pxp))
> +		if (!intel_pxp_is_active(i915))
>   			ret = intel_pxp_start(&to_gt(i915)->pxp);
>   	}
>   
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index f7c909fce97c..15f7983f6da8 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -97,11 +97,21 @@ bool intel_pxp_is_enabled(struct drm_i915_private *i915)
>   	return intel_gtpxp_is_enabled(&gt->pxp);
>   }
>   
> -bool intel_pxp_is_active(const struct intel_pxp *pxp)
> +bool intel_gtpxp_is_active(const struct intel_pxp *pxp)
>   {
>   	return pxp->arb_is_valid;
>   }
>   
> +bool intel_pxp_is_active(struct drm_i915_private *i915)

again I'd suggest a different name to differentiate the 2 checkers. 
Considering the only calling of this is from outside the PXP code is to 
decide whether to start the arb session or not, maybe rename this to 
intel_pxp_has_started or intel_pxp_is_running and leave the old 
intel_pxp_is_active as-is?

Daniele

> +{
> +	struct intel_gt *gt = _i915_to_pxp_gt(i915);
> +
> +	if (!gt)
> +		return false;
> +
> +	return intel_gtpxp_is_active(&gt->pxp);
> +}
> +
>   /* KCR register definitions */
>   #define KCR_INIT _MMIO(0x320f0)
>   /* Setting KCR Init bit is required after system boot */
> @@ -300,7 +310,7 @@ int intel_pxp_key_check(struct intel_pxp *pxp,
>   			struct drm_i915_gem_object *obj,
>   			bool assign)
>   {
> -	if (!intel_pxp_is_active(pxp))
> +	if (!intel_gtpxp_is_active(pxp))
>   		return -ENODEV;
>   
>   	if (!i915_gem_object_is_protected(obj))
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> index 61472018bc45..70383394adb4 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> @@ -16,9 +16,10 @@ struct drm_i915_private;
>   struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
>   bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
>   bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp);
> +bool intel_gtpxp_is_active(const struct intel_pxp *pxp);
>   
>   bool intel_pxp_is_enabled(struct drm_i915_private *i915);
> -bool intel_pxp_is_active(const struct intel_pxp *pxp);
> +bool intel_pxp_is_active(struct drm_i915_private *i915);
>   
>   void intel_pxp_init(struct intel_pxp *pxp);
>   void intel_pxp_fini(struct intel_pxp *pxp);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> index 13f517f94bae..7f304b421633 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> @@ -25,7 +25,7 @@ static int pxp_info_show(struct seq_file *m, void *data)
>   		return 0;
>   	}
>   
> -	drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active(pxp)));
> +	drm_printf(&p, "active: %s\n", str_yes_no(intel_gtpxp_is_active(pxp)));
>   	drm_printf(&p, "instance counter: %u\n", pxp->key_instance);
>   
>   	return 0;
> @@ -43,7 +43,7 @@ static int pxp_terminate_set(void *data, u64 val)
>   	struct intel_pxp *pxp = data;
>   	struct intel_gt *gt = pxp_to_gt(pxp);
>   
> -	if (!intel_pxp_is_active(pxp))
> +	if (!intel_gtpxp_is_active(pxp))
>   		return -ENODEV;
>   
>   	/* simulate a termination interrupt */
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
> index 8e8e5645e4fc..cd97f8d8cc10 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
> @@ -86,7 +86,7 @@ void intel_pxp_irq_disable(struct intel_pxp *pxp)
>   	 * called in a path were the driver consider the session as valid and
>   	 * doesn't call a termination on restart.
>   	 */
> -	GEM_WARN_ON(intel_pxp_is_active(pxp));
> +	GEM_WARN_ON(intel_gtpxp_is_active(pxp));
>   
>   	spin_lock_irq(gt->irq_lock);
>   


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 4/6] drm/i915/pxp: Make PXP tee component bind/unbind aware of PXP-owning-GT
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 4/6] drm/i915/pxp: Make PXP tee component bind/unbind aware of PXP-owning-GT Alan Previn
@ 2022-11-15  4:19   ` Ceraolo Spurio, Daniele
  0 siblings, 0 replies; 19+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-11-15  4:19 UTC (permalink / raw)
  To: Alan Previn, intel-gfx



On 10/21/2022 10:39 AM, Alan Previn wrote:
> Ensure i915_pxp_tee_component_bind / unbind implicitly sorts out
> getting the correct per-GT PXP control-context from the PXP-owning-GT
> when establishing or ending connection. Thus, replace _i915_to_pxp_gt
> with intel_pxp_get_owning_gt (also takes in i915).
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/pxp/intel_pxp.c     |  6 +++---
>   drivers/gpu/drm/i915/pxp/intel_pxp.h     |  2 ++
>   drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 14 ++++++++++++--
>   3 files changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 15f7983f6da8..2c835c38c527 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -74,7 +74,7 @@ bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp)
>   	return pxp->ce;
>   }
>   
> -static struct intel_gt *_i915_to_pxp_gt(struct drm_i915_private *i915)
> +struct intel_gt *intel_pxp_get_owning_gt(struct drm_i915_private *i915)
>   {
>   	struct intel_gt *gt = NULL;
>   	int i = 0;
> @@ -89,7 +89,7 @@ static struct intel_gt *_i915_to_pxp_gt(struct drm_i915_private *i915)
>   
>   bool intel_pxp_is_enabled(struct drm_i915_private *i915)
>   {
> -	struct intel_gt *gt = _i915_to_pxp_gt(i915);
> +	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
>   
>   	if (!gt)
>   		return false;
> @@ -104,7 +104,7 @@ bool intel_gtpxp_is_active(const struct intel_pxp *pxp)
>   
>   bool intel_pxp_is_active(struct drm_i915_private *i915)
>   {
> -	struct intel_gt *gt = _i915_to_pxp_gt(i915);
> +	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
>   
>   	if (!gt)
>   		return false;
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> index 70383394adb4..7d93055cdd6b 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> @@ -13,6 +13,8 @@ struct intel_pxp;
>   struct drm_i915_gem_object;
>   struct drm_i915_private;
>   
> +struct intel_gt *intel_pxp_get_owning_gt(struct drm_i915_private *i915);
> +
>   struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
>   bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
>   bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> index 1c6bc56391b7..eb7adb972610 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> @@ -20,8 +20,12 @@
>   static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
>   {
>   	struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
> +	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
>   
> -	return &to_gt(i915)->pxp;
> +	if (!gt)
> +		return NULL;
> +
> +	return &gt->pxp;
>   }
>   
>   static int intel_pxp_tee_io_message(struct intel_pxp *pxp,
> @@ -128,10 +132,16 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev,
>   {
>   	struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
>   	struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
> -	struct intel_uc *uc = &pxp_to_gt(pxp)->uc;
> +	struct intel_uc *uc;
>   	intel_wakeref_t wakeref;
>   	int ret = 0;
>   
> +	if (!pxp) {
> +		drm_warn(&i915->drm, "tee comp binding without a PXP-owner GT\n");
> +		return -ENODEV;
> +	}
> +	uc = &pxp_to_gt(pxp)->uc;
> +
>   	mutex_lock(&pxp->tee_mutex);
>   	pxp->pxp_component = data;
>   	pxp->pxp_component->tee_dev = tee_kdev;


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 5/6] drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 5/6] drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT Alan Previn
@ 2022-11-15  4:20   ` Ceraolo Spurio, Daniele
  0 siblings, 0 replies; 19+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-11-15  4:20 UTC (permalink / raw)
  To: Alan Previn, intel-gfx



On 10/21/2022 10:39 AM, Alan Previn wrote:
> Make intel_pxp_is_start implicitly find the PXP-owning-GT.
> Callers of this function shall now pass in i915 since PXP
> is a global GPU feature. Make intel_pxp_start implicitly
> find the right gt to start PXP arb session so
> it's transparent to the callers.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
>   drivers/gpu/drm/i915/pxp/intel_pxp.c        | 9 ++++++++-
>   drivers/gpu/drm/i915/pxp/intel_pxp.h        | 2 +-
>   3 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 798e77398acc..af60f6494947 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -272,7 +272,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
>   		pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>   
>   		if (!intel_pxp_is_active(i915))
> -			ret = intel_pxp_start(&to_gt(i915)->pxp);
> +			ret = intel_pxp_start(i915);
>   	}
>   
>   	return ret;
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index 2c835c38c527..c87f812ba13a 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -259,10 +259,17 @@ static bool pxp_component_bound(struct intel_pxp *pxp)
>    * the arb session is restarted from the irq work when we receive the
>    * termination completion interrupt
>    */
> -int intel_pxp_start(struct intel_pxp *pxp)
> +int intel_pxp_start(struct drm_i915_private *i915)
>   {
> +	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
> +	struct intel_pxp *pxp;
>   	int ret = 0;
>   
> +	if (!gt)
> +		return -ENODEV;
> +
> +	pxp = &gt->pxp;
> +
>   	if (!intel_gtpxp_is_enabled(pxp))
>   		return -ENODEV;
>   
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> index 7d93055cdd6b..c45949bb1f7b 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> @@ -31,7 +31,7 @@ void intel_pxp_fini_hw(struct intel_pxp *pxp);
>   
>   void intel_pxp_mark_termination_in_progress(struct intel_pxp *pxp);
>   
> -int intel_pxp_start(struct intel_pxp *pxp);
> +int intel_pxp_start(struct drm_i915_private *i915);
>   
>   int intel_pxp_key_check(struct intel_pxp *pxp,
>   			struct drm_i915_gem_object *obj,


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 6/6] drm/i915/pxp: Make intel_pxp_key_check implicitly sort PXP-owning-GT
  2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 6/6] drm/i915/pxp: Make intel_pxp_key_check " Alan Previn
@ 2022-11-15  4:21   ` Ceraolo Spurio, Daniele
  0 siblings, 0 replies; 19+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-11-15  4:21 UTC (permalink / raw)
  To: Alan Previn, intel-gfx



On 10/21/2022 10:39 AM, Alan Previn wrote:
> Make intel_pxp_key_check implicitly find the PXP-owning-GT.
> Callers of this function shall now pass in i915 since PXP
> is a global GPU feature. Make intel_pxp_key_check implicitly
> find the right gt to verify pxp session key establishment count
> so it's transparent to the callers.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/display/skl_universal_plane.c |  2 +-
>   drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c     |  2 +-
>   drivers/gpu/drm/i915/pxp/intel_pxp.c               | 10 +++++++++-
>   drivers/gpu/drm/i915/pxp/intel_pxp.h               |  2 +-
>   4 files changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 7cb713043408..04e78acbaf5f 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1841,7 +1841,7 @@ static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj)
>   {
>   	struct drm_i915_private *i915 = to_i915(obj->base.dev);
>   
> -	return intel_pxp_key_check(&to_gt(i915)->pxp, obj, false) == 0;
> +	return intel_pxp_key_check(i915, obj, false) == 0;
>   }
>   
>   static bool pxp_is_borked(struct drm_i915_gem_object *obj)
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 1160723c9d2d..23224977e003 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -868,7 +868,7 @@ static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle)
>   		 */
>   		if (i915_gem_context_uses_protected_content(eb->gem_context) &&
>   		    i915_gem_object_is_protected(obj)) {
> -			err = intel_pxp_key_check(&vm->gt->pxp, obj, true);
> +			err = intel_pxp_key_check(vm->gt->i915, obj, true);
>   			if (err) {
>   				i915_gem_object_put(obj);
>   				return ERR_PTR(err);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> index c87f812ba13a..5c9a4b2c9a75 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> @@ -313,10 +313,18 @@ void intel_pxp_fini_hw(struct intel_pxp *pxp)
>   	intel_pxp_irq_disable(pxp);
>   }
>   
> -int intel_pxp_key_check(struct intel_pxp *pxp,
> +int intel_pxp_key_check(struct drm_i915_private *i915,
>   			struct drm_i915_gem_object *obj,
>   			bool assign)
>   {
> +	struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
> +	struct intel_pxp *pxp;
> +
> +	if (!gt)
> +		return -ENODEV;
> +
> +	pxp = &gt->pxp;
> +
>   	if (!intel_gtpxp_is_active(pxp))
>   		return -ENODEV;
>   
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> index c45949bb1f7b..85c5499daba5 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> @@ -33,7 +33,7 @@ void intel_pxp_mark_termination_in_progress(struct intel_pxp *pxp);
>   
>   int intel_pxp_start(struct drm_i915_private *i915);
>   
> -int intel_pxp_key_check(struct intel_pxp *pxp,
> +int intel_pxp_key_check(struct drm_i915_private *i915,
>   			struct drm_i915_gem_object *obj,
>   			bool assign);
>   


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 1/6] drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT
  2022-11-15  4:00   ` Ceraolo Spurio, Daniele
@ 2022-11-15  5:10     ` Teres Alexis, Alan Previn
  2022-11-16 21:41       ` Teres Alexis, Alan Previn
  0 siblings, 1 reply; 19+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-11-15  5:10 UTC (permalink / raw)
  To: Ceraolo Spurio, Daniele, intel-gfx



On Mon, 2022-11-14 at 20:00 -0800, Ceraolo Spurio, Daniele wrote:
> 
> On 10/21/2022 10:39 AM, Alan Previn wrote:
> > In preparation for future MTL-PXP feature support, PXP control
> > @@ -142,22 +166,21 @@ void intel_pxp_init(struct intel_pxp *pxp)
> >   {
> >   	struct intel_gt *gt = pxp_to_gt(pxp);
> >   
> > -	/* we rely on the mei PXP module */
> > -	if (!IS_ENABLED(CONFIG_INTEL_MEI_PXP))
> > -		return;
> > -
> >   	/*
> >   	 * If HuC is loaded by GSC but PXP is disabled, we can skip the init of
> >   	 * the full PXP session/object management and just init the tee channel.
> >   	 */
> > -	if (HAS_PXP(gt->i915))
> > +	if (_gt_supports_pxp(gt))
> >   		pxp_init_full(pxp);
> > -	else if (intel_huc_is_loaded_by_gsc(&gt->uc.huc) && intel_uc_uses_huc(&gt->uc))
> > +	else if (_gt_needs_teelink(gt))
> >   		intel_pxp_tee_component_init(pxp);
> >   }
> >   
> >   void intel_pxp_fini(struct intel_pxp *pxp)
> >   {
> > +	if (!intel_gtpxp_is_supported(pxp))
> > +		return;
> 
> Why do you need this? the fini below should already be smart enough to 
> only cleanup when needed.
Eventually i plan to create a backend abstraction for tee based vs mtl's gscccs based and rather keep as much of the
checking on the front end to keep it cleaner.
> 
> > +
> >   	pxp->arb_is_valid = false;
> >   
> >   	intel_pxp_tee_component_fini(pxp);
> > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > index 2da309088c6d..c12e4d419c78 100644
> > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > @@ -13,6 +13,8 @@ struct intel_pxp;
> >   struct drm_i915_gem_object;
> >   
> >   struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
> > +bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
> > +
> >   bool intel_pxp_is_enabled(const struct intel_pxp *pxp);
> >   bool intel_pxp_is_active(const struct intel_pxp *pxp);
> >   
> > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> > index 4359e8be4101..124663cf0047 100644
> > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> > @@ -70,7 +70,7 @@ void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
> >   	if (!gt_root)
> >   		return;
> >   
> > -	if (!HAS_PXP((pxp_to_gt(pxp)->i915)))
> > +	if (!intel_gtpxp_is_supported(pxp))
> >   		return;
> >   
> 
> This now returns true for DG2, but  we don't want to register the PXP 
> debugfs there as we don't support PXP aside from HuC loading.
> 

yeah - ok.

>  IMO a 
> better approach would be to have intel_gtpxp_is_supported be what you 
> currently have as _gt_supports_pxp().
> 
Okay, let me take a look at that since i recall that future patches would rely on intel_gtpxp_is_supported for the case
where PXP is not supported but we just want to know if GT has backend tee for component binding or something - but i
guess that could get a separate function as opposed to reusing intel_gtpxp_is_supported.


> Also, intel_gtpxp_is_supported is a bit confusing because of the new 
> "gtpxp" prefix. Why not use just intel_pxp_is_supported? We already have 
> per-gt checkers that refer only to the subcomponent, like 
> intel_huc_is_supported(), which for MTL is false on the primary GT and 
> true on the media one. I don't see why we can't do the same for PXP.

I think that existing method isn't a good way - i rather use this opportunity to set a precendence for pxp we can have a
more standardized naming convention based on the global-vs-per-gt level checking (i also wish i had time to look at
"intra-vs-inter function naming). So when something is called with _pxp_ its meant to be called as a global check
(passing in i915 as its param) and if its using _gtpxp_, then its meant to be called as gt-level checker. And the
similar function name should be okay if the check is similar (just at different hierarchy level). I prefer my way
because it allows that understanding purely from the function name as opposed to having to look at the full definition
before knowing if its a global check vs a gt level check. I think we really ought to have a more concise naming
convention as opposed to "we do it like this, so why not just follow". An alternative would be instead of
"intel_gtpxp_is_supported" then "intel_gt_supports_pxp". 


> 
> Daniele
> 
> >   	root = debugfs_create_dir("pxp", gt_root);
> 


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 2/6] drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT
  2022-11-15  4:11   ` Ceraolo Spurio, Daniele
@ 2022-11-15  5:23     ` Teres Alexis, Alan Previn
  0 siblings, 0 replies; 19+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-11-15  5:23 UTC (permalink / raw)
  To: Ceraolo Spurio, Daniele, intel-gfx



On Mon, 2022-11-14 at 20:11 -0800, Ceraolo Spurio, Daniele wrote:
> 
> On 10/21/2022 10:39 AM, Alan Previn wrote:
> > @@ -68,11 +69,34 @@ bool intel_gtpxp_is_supported(struct intel_pxp *pxp)
> >   	return false;
> >   }
> >   
> > -bool intel_pxp_is_enabled(const struct intel_pxp *pxp)
> > +bool intel_gtpxp_is_enabled(const struct intel_pxp *pxp)
> 
> I'd rename this to intel_pxp_is_initialized, that way we don't have 2 
> almost identically named checkers that mean different things (and also 
> avoid the gtpxp prefix).
> 
I disagree - one is a wrapper around the other so i rather DO insist we have the same function-action name in the middle
with a different part of the function name being the qualifier for whether its a global level checker or a gt-level
checker. Perhaps as per last review reply, we can do "intel_pxp_is_enabled" as wrapper around "intel_gt_has_pxp_enabled"
- i think the "enabled" part SHOULD be consistent since one is a wrapper around the other else a new reader will even
more baffled about why "enabled" is different from "initialized" despite trying to get to the same anchor point, "pxp-
>ce".


> >   {
> >   	return pxp->ce;
> >   }
> >   
> > +static struct intel_gt *_i915_to_pxp_gt(struct drm_i915_private *i915)
> 
> nit: why the "_" prefix? we usually don't use it for x_to_y functions. 
> Not a blocker.
I was assuming internal static functions dont have to obey such rules - i like to use _foo for all local static
functions (so that when reading from a caller's code, i know its a local static). Again, just another naming convention
preference thing that i feel seems to be happening here and there in the driver code base but not consistent across all
files / function types. Since its a nit, i won't change this.

> 
> > +{
> > +	struct intel_gt *gt = NULL;
> > +	int i = 0;
> > +
> > +	for_each_gt(gt, i915, i) {
> > +		/* There can be only one GT that supports PXP */
> 
> 
> 
> > +		if (gt && intel_gtpxp_is_supported(&gt->pxp))
> 
> for_each_gt already checks for gt not being NULL, no need to check again.
Got it - will fix this.

> 
> Daniele
> 
> 


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 3/6] drm/i915/pxp: Make intel_pxp_is_active implicitly sort PXP-owning-GT
  2022-11-15  4:17   ` Ceraolo Spurio, Daniele
@ 2022-11-15  5:26     ` Teres Alexis, Alan Previn
  0 siblings, 0 replies; 19+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-11-15  5:26 UTC (permalink / raw)
  To: Ceraolo Spurio, Daniele, intel-gfx



On Mon, 2022-11-14 at 20:17 -0800, Ceraolo Spurio, Daniele wrote:
> 
> On 10/21/2022 10:39 AM, Alan Previn wrote:
> > Make intel_pxp_is_active a global check and implicitly find
> > the PXP-owning-GT.
> > 
> > As per prior two patches, callers of this function shall now
> > pass in i915 since PXP is a global GPU feature. Make
> > intel_pxp_is_active implicitly find the right gt so it's transparent
> > for global view callers (like display or gem-exec).
> > 
> > However we also need to expose the per-gt variation of this for internal
> > pxp files to use (like what intel_pxp_is_active was prior) so also expose
> > a new intel_gtpxp_is_active function for replacement.
> > 
> > Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> > ---
> >   drivers/gpu/drm/i915/gem/i915_gem_context.c  |  2 +-
> >   drivers/gpu/drm/i915/pxp/intel_pxp.c         | 14 ++++++++++++--
> >   drivers/gpu/drm/i915/pxp/intel_pxp.h         |  3 ++-
> >   drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c |  4 ++--
> >   drivers/gpu/drm/i915/pxp/intel_pxp_irq.c     |  2 +-
> >   5 files changed, 18 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > index 72f47ebda75f..798e77398acc 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> > @@ -271,7 +271,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
> >   		 */
> >   		pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> >   
> > -		if (!intel_pxp_is_active(&to_gt(i915)->pxp))
> > +		if (!intel_pxp_is_active(i915))
> >   			ret = intel_pxp_start(&to_gt(i915)->pxp);
> >   	}
> >   
> > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> > index f7c909fce97c..15f7983f6da8 100644
> > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
> > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
> > @@ -97,11 +97,21 @@ bool intel_pxp_is_enabled(struct drm_i915_private *i915)
> >   	return intel_gtpxp_is_enabled(&gt->pxp);
> >   }
> >   
> > -bool intel_pxp_is_active(const struct intel_pxp *pxp)
> > +bool intel_gtpxp_is_active(const struct intel_pxp *pxp)
> >   {
> >   	return pxp->arb_is_valid;
> >   }
> >   
> > +bool intel_pxp_is_active(struct drm_i915_private *i915)
> 
> again I'd suggest a different name to differentiate the 2 checkers. 
> Considering the only calling of this is from outside the PXP code is to 
> decide whether to start the arb session or not, maybe rename this to 
> intel_pxp_has_started or intel_pxp_is_running and leave the old 
> intel_pxp_is_active as-is?
> 
Again, i humbly disagree - if one is a wrapper around the other, i rather keep the action specific part of the function
name to be exactly consistent. Perhaps like earlier, we can make intel_pxp_is_active as a wrapper round
intel_gt_has_active_pxp. But i want to maintain the "active" key word to enforce that symmetry and not decouple them
(since its a wrapper relationship).

> Daniele
> 
> 


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [Intel-gfx] [PATCH v3 1/6] drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT
  2022-11-15  5:10     ` Teres Alexis, Alan Previn
@ 2022-11-16 21:41       ` Teres Alexis, Alan Previn
  0 siblings, 0 replies; 19+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-11-16 21:41 UTC (permalink / raw)
  To: Ceraolo Spurio, Daniele, intel-gfx

just recapping offline conversation summary - we agreed on:

intel_pxp_enabled(i915)
intel_pxp_enabled_on_gt(pxp)

	(where one is wrapper over the other, the action part of the function name stays the same).

...alan

On Mon, 2022-11-14 at 21:13 -0800, Alan Previn Teres Alexis wrote:
> 
> On Mon, 2022-11-14 at 20:00 -0800, Ceraolo Spurio, Daniele wrote:
> > 
> > On 10/21/2022 10:39 AM, Alan Previn wrote:
> > > In preparation for future MTL-PXP feature support, PXP control
> > > @@ -142,22 +166,21 @@ void intel_pxp_init(struct intel_pxp *pxp)
> > >   {
> > >   	struct intel_gt *gt = pxp_to_gt(pxp);
> > >   
> > > -	/* we rely on the mei PXP module */
> > > -	if (!IS_ENABLED(CONFIG_INTEL_MEI_PXP))
> > > -		return;
> > > -
> > >   	/*
> > >   	 * If HuC is loaded by GSC but PXP is disabled, we can skip the init of
> > >   	 * the full PXP session/object management and just init the tee channel.
> > >   	 */
> > > -	if (HAS_PXP(gt->i915))
> > > +	if (_gt_supports_pxp(gt))
> > >   		pxp_init_full(pxp);
> > > -	else if (intel_huc_is_loaded_by_gsc(&gt->uc.huc) && intel_uc_uses_huc(&gt->uc))
> > > +	else if (_gt_needs_teelink(gt))
> > >   		intel_pxp_tee_component_init(pxp);
> > >   }
> > >   
> > >   void intel_pxp_fini(struct intel_pxp *pxp)
> > >   {
> > > +	if (!intel_gtpxp_is_supported(pxp))
> > > +		return;
> > 
> > Why do you need this? the fini below should already be smart enough to 
> > only cleanup when needed.
> Eventually i plan to create a backend abstraction for tee based vs mtl's gscccs based and rather keep as much of the
> checking on the front end to keep it cleaner.
> > 
> > > +
> > >   	pxp->arb_is_valid = false;
> > >   
> > >   	intel_pxp_tee_component_fini(pxp);
> > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > > index 2da309088c6d..c12e4d419c78 100644
> > > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h
> > > @@ -13,6 +13,8 @@ struct intel_pxp;
> > >   struct drm_i915_gem_object;
> > >   
> > >   struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
> > > +bool intel_gtpxp_is_supported(struct intel_pxp *pxp);
> > > +
> > >   bool intel_pxp_is_enabled(const struct intel_pxp *pxp);
> > >   bool intel_pxp_is_active(const struct intel_pxp *pxp);
> > >   
> > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> > > index 4359e8be4101..124663cf0047 100644
> > > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> > > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> > > @@ -70,7 +70,7 @@ void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
> > >   	if (!gt_root)
> > >   		return;
> > >   
> > > -	if (!HAS_PXP((pxp_to_gt(pxp)->i915)))
> > > +	if (!intel_gtpxp_is_supported(pxp))
> > >   		return;
> > >   
> > 
> > This now returns true for DG2, but  we don't want to register the PXP 
> > debugfs there as we don't support PXP aside from HuC loading.
> > 
> 
> yeah - ok.
> 
> >  IMO a 
> > better approach would be to have intel_gtpxp_is_supported be what you 
> > currently have as _gt_supports_pxp().
> > 
> Okay, let me take a look at that since i recall that future patches would rely on intel_gtpxp_is_supported for the case
> where PXP is not supported but we just want to know if GT has backend tee for component binding or something - but i
> guess that could get a separate function as opposed to reusing intel_gtpxp_is_supported.
> 
> 
> > Also, intel_gtpxp_is_supported is a bit confusing because of the new 
> > "gtpxp" prefix. Why not use just intel_pxp_is_supported? We already have 
> > per-gt checkers that refer only to the subcomponent, like 
> > intel_huc_is_supported(), which for MTL is false on the primary GT and 
> > true on the media one. I don't see why we can't do the same for PXP.
> 
> I think that existing method isn't a good way - i rather use this opportunity to set a precendence for pxp we can have a
> more standardized naming convention based on the global-vs-per-gt level checking (i also wish i had time to look at
> "intra-vs-inter function naming). So when something is called with _pxp_ its meant to be called as a global check
> (passing in i915 as its param) and if its using _gtpxp_, then its meant to be called as gt-level checker. And the
> similar function name should be okay if the check is similar (just at different hierarchy level). I prefer my way
> because it allows that understanding purely from the function name as opposed to having to look at the full definition
> before knowing if its a global check vs a gt level check. I think we really ought to have a more concise naming
> convention as opposed to "we do it like this, so why not just follow". An alternative would be instead of
> "intel_gtpxp_is_supported" then "intel_gt_supports_pxp". 
> 
> 
> > 
> > Daniele
> > 
> > >   	root = debugfs_create_dir("pxp", gt_root);
> > 
> 


^ permalink raw reply	[flat|nested] 19+ messages in thread

end of thread, other threads:[~2022-11-16 21:42 UTC | newest]

Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-21 17:39 [Intel-gfx] [PATCH v3 0/6] drm/i915/pxp: Prepare intel_pxp entry points for MTL Alan Previn
2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 1/6] drm/i915/pxp: Make gt and pxp init/fini aware of PXP-owning-GT Alan Previn
2022-11-15  4:00   ` Ceraolo Spurio, Daniele
2022-11-15  5:10     ` Teres Alexis, Alan Previn
2022-11-16 21:41       ` Teres Alexis, Alan Previn
2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 2/6] drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT Alan Previn
2022-11-15  4:11   ` Ceraolo Spurio, Daniele
2022-11-15  5:23     ` Teres Alexis, Alan Previn
2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 3/6] drm/i915/pxp: Make intel_pxp_is_active " Alan Previn
2022-11-15  4:17   ` Ceraolo Spurio, Daniele
2022-11-15  5:26     ` Teres Alexis, Alan Previn
2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 4/6] drm/i915/pxp: Make PXP tee component bind/unbind aware of PXP-owning-GT Alan Previn
2022-11-15  4:19   ` Ceraolo Spurio, Daniele
2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 5/6] drm/i915/pxp: Make intel_pxp_start implicitly sort PXP-owning-GT Alan Previn
2022-11-15  4:20   ` Ceraolo Spurio, Daniele
2022-10-21 17:39 ` [Intel-gfx] [PATCH v3 6/6] drm/i915/pxp: Make intel_pxp_key_check " Alan Previn
2022-11-15  4:21   ` Ceraolo Spurio, Daniele
2022-10-21 18:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pxp: Prepare intel_pxp entry points for MTL (rev3) Patchwork
2022-10-22 11:44 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).