G4x_GMCH_SIZE_VT_2M

G4x_GMCH_SIZE_VT_2M

[Konstantin Belousov]

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In Linux source, drivers/char/agp/intel_agp.h, there is a definition
#define G4x_GMCH_SIZE_VT_2M	(0xc << 8)

According to the Intel document 319970.pdf, Intel 4 Series Chipset
Family, page 93, the VT mode, 2MB GTT page is reported by the
value 0xb << 8. One of my testers with GM45 chipset machine confirms
that the value in northbridge register 0x52 is 0xb << 8.

Is this a typo ?

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Re: G4x_GMCH_SIZE_VT_2M

[Chris Wilson]

On Fri, 8 Jul 2011 12:26:28 +0300, Konstantin Belousov <kostikbel@gmail.com> wrote:
> In Linux source, drivers/char/agp/intel_agp.h, there is a definition
> #define G4x_GMCH_SIZE_VT_2M	(0xc << 8)
> 
> According to the Intel document 319970.pdf, Intel 4 Series Chipset
> Family, page 93, the VT mode, 2MB GTT page is reported by the
> value 0xb << 8. One of my testers with GM45 chipset machine confirms
> that the value in northbridge register 0x52 is 0xb << 8.
> 
> Is this a typo ?

Yes, the code is wrong.

#define G4x_GMCH_SIZE_VT_EN (0x8<<8)
#define G4x_GMCH_SIZE_VT_1M (G4x_GMCH_SIZE_1M | G4x_GMCH_SIZE_VT_EN)
#define G4x_GMCH_SIZE_VT_1_5_M (0x2<<8 | G4x_GMCH_SIZE_VT_EN) /* No non-VT
                                                                 equivalent */
#define G4x_GMCH_SIZE_VT_2M (G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN)

Care to submit a patch?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre