Re: [Intel-wired-lan] [PATCH iwl-net v1 1/1] e1000e: change usleep_range to udelay in PHY mdic access

[Paul Menzel <pmenzel@molgen.mpg.de>]

Dear Vitaly,


Thank you for the patch.


Am 17.04.24 um 21:03 schrieb Vitaly Lifshits:
> This is a partial revert of commit 6dbdd4de0362 ("e1000e: Workaround
> for sporadic MDI error on Meteor Lake systems"). The referenced commit
> introduced an issue on vPro systems, where disconnecting and reconnecting
> the LAN cable might result in a kernel panic.

Please paste the panic, and document the test system.

> This was root caused to the usage of usleep_range in an atomic content

conte*x*t?

> while trying to access the PHY. Change back the usleep_range calls to
> udelay.

Please explain, why this is an atomic context.

> Fixes: 6dbdd4de0362 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
> Co-developed-by: Sasha Neftin <sasha.neftin@intel.com>
> Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
> Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
> ---
>   drivers/net/ethernet/intel/e1000e/phy.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/ethernet/intel/e1000e/phy.c b/drivers/net/ethernet/intel/e1000e/phy.c
> index 93544f1cc2a5..f7ae0e0aa4a4 100644
> --- a/drivers/net/ethernet/intel/e1000e/phy.c
> +++ b/drivers/net/ethernet/intel/e1000e/phy.c
> @@ -157,7 +157,7 @@ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
>   		 * the lower time out
>   		 */
>   		for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
> -			usleep_range(50, 60);
> +			udelay(50);
>   			mdic = er32(MDIC);
>   			if (mdic & E1000_MDIC_READY)
>   				break;
> @@ -181,7 +181,7 @@ s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
>   		 * reading duplicate data in the next MDIC transaction.
>   		 */
>   		if (hw->mac.type == e1000_pch2lan)
> -			usleep_range(100, 150);
> +			udelay(100);
>   
>   		if (success) {
>   			*data = (u16)mdic;
> @@ -237,7 +237,7 @@ s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
>   		 * the lower time out
>   		 */
>   		for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
> -			usleep_range(50, 60);
> +			udelay(50);
>   			mdic = er32(MDIC);
>   			if (mdic & E1000_MDIC_READY)
>   				break;
> @@ -261,7 +261,7 @@ s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
>   		 * reading duplicate data in the next MDIC transaction.
>   		 */
>   		if (hw->mac.type == e1000_pch2lan)
> -			usleep_range(100, 150);
> +			udelay(100);
>   
>   		if (success)
>   			return 0;

It’d also be interested where the delay values are specified.


Kind regards,

Paul