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From: Mark Rutland <mark.rutland@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Ard Biesheuvel <ardb@kernel.org>, Will Deacon <will@kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	kernel-hardening@lists.openwall.com
Subject: Re: [RFC PATCH] arm64: remove CONFIG_DEBUG_ALIGN_RODATA feature
Date: Thu, 2 Apr 2020 13:17:45 +0100	[thread overview]
Message-ID: <20200402121745.GA29906@C02TD0UTHF1T.local> (raw)
In-Reply-To: <20200402113033.GD21087@mbp>

On Thu, Apr 02, 2020 at 12:30:33PM +0100, Catalin Marinas wrote:
> On Mon, Mar 30, 2020 at 04:32:31PM +0200, Ard Biesheuvel wrote:
> > Could we make this a runtime thing? E.g., remap the entire linear
> > region down to pages under stop_machine() the first time we probe a
> > device that uses non-coherent DMA?
> 
> That could be pretty expensive at run-time. With the ARMv8.4-TTRem
> feature, I wonder whether we could do this lazily when allocating
> non-coherent DMA buffers.

It's worth noting that ARMv8.4-TTRem is optional and the "level 1" and
"level 2" behaviours still allows non-fatal faults to be taken while nT
is set (or until you perform the TLB invalidation). We can only safely
use it where we could use a full BBM sequence today.

Effectively TTRem is an optimized, where the CPU *might* be able to use
entries during the break stage, but is not guaranteed to do so.

Thanksm
Mark.

  reply	other threads:[~2020-04-02 12:43 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-29 14:12 [RFC PATCH] arm64: remove CONFIG_DEBUG_ALIGN_RODATA feature Ard Biesheuvel
2020-03-30 11:29 ` Mark Rutland
2020-03-30 12:36   ` Ard Biesheuvel
2020-03-30 13:51 ` Will Deacon
2020-03-30 13:53   ` Ard Biesheuvel
2020-03-30 13:59     ` Robin Murphy
2020-03-30 14:04     ` Will Deacon
2020-03-30 14:22       ` Ard Biesheuvel
2020-03-30 14:28         ` Will Deacon
2020-03-30 14:32           ` Ard Biesheuvel
2020-04-02 11:30             ` Catalin Marinas
2020-04-02 12:17               ` Mark Rutland [this message]
2020-04-03  7:07               ` Will Deacon
2020-04-03  8:58               ` Ard Biesheuvel
2020-05-05 10:44                 ` Will Deacon
2020-05-07 13:43                   ` Catalin Marinas
2020-03-30 13:57 ` Laura Abbott
2020-04-02 11:15 ` Catalin Marinas
2020-04-02 11:24   ` Ard Biesheuvel

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