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From: Will Deacon <will@kernel.org>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	kernel-hardening@lists.openwall.com,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [RFC PATCH] arm64: remove CONFIG_DEBUG_ALIGN_RODATA feature
Date: Tue, 5 May 2020 11:44:06 +0100	[thread overview]
Message-ID: <20200505104404.GB19710@willie-the-truck> (raw)
In-Reply-To: <CAMj1kXGLMWqTHbWftoAq=WdVqyf+i=6SvsMogzWHh6SL3b=4sQ@mail.gmail.com>

On Fri, Apr 03, 2020 at 10:58:51AM +0200, Ard Biesheuvel wrote:
> On Thu, 2 Apr 2020 at 13:30, Catalin Marinas <catalin.marinas@arm.com> wrote:
> > On Mon, Mar 30, 2020 at 04:32:31PM +0200, Ard Biesheuvel wrote:
> > > On Mon, 30 Mar 2020 at 16:28, Will Deacon <will@kernel.org> wrote:
> > > > Fair enough, but I'd still like to see some numbers. If they're compelling,
> > > > then we could explore something like CONFIG_OF_DMA_DEFAULT_COHERENT, but
> > > > that doesn't really help the kconfig maze :(
> >
> > I'd prefer not to have a config option, we could easily break single
> > Image at some point.
> >
> > > Could we make this a runtime thing? E.g., remap the entire linear
> > > region down to pages under stop_machine() the first time we probe a
> > > device that uses non-coherent DMA?
> >
> > That could be pretty expensive at run-time. With the ARMv8.4-TTRem
> > feature, I wonder whether we could do this lazily when allocating
> > non-coherent DMA buffers.
> >
> > (I still hope there isn't a problem at all with this mismatch ;)).
> >
> 
> Now that we have the pieces to easily remap the linear region down to
> pages, and [apparently] some generic infrastructure to manage the
> linear aliases, the only downside is the alleged performance hit
> resulting from increased TLB pressure. This is obviously highly
> micro-architecture dependent, but with Xgene1 and ThunderX1 out of the
> picture, I wonder if the tradeoffs are different now. Maybe by now, we
> should just suck it up (Note that we had no complaints afaik regarding
> the fact that we map the linear map down to pages by default now)

I'd be in favour of that fwiw.

Catalin -- did you get anything back from the architects about the cache
hit behaviour?

Will

  reply	other threads:[~2020-05-05 10:44 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-29 14:12 [RFC PATCH] arm64: remove CONFIG_DEBUG_ALIGN_RODATA feature Ard Biesheuvel
2020-03-30 11:29 ` Mark Rutland
2020-03-30 12:36   ` Ard Biesheuvel
2020-03-30 13:51 ` Will Deacon
2020-03-30 13:53   ` Ard Biesheuvel
2020-03-30 13:59     ` Robin Murphy
2020-03-30 14:04     ` Will Deacon
2020-03-30 14:22       ` Ard Biesheuvel
2020-03-30 14:28         ` Will Deacon
2020-03-30 14:32           ` Ard Biesheuvel
2020-04-02 11:30             ` Catalin Marinas
2020-04-02 12:17               ` Mark Rutland
2020-04-03  7:07               ` Will Deacon
2020-04-03  8:58               ` Ard Biesheuvel
2020-05-05 10:44                 ` Will Deacon [this message]
2020-05-07 13:43                   ` Catalin Marinas
2020-03-30 13:57 ` Laura Abbott
2020-04-02 11:15 ` Catalin Marinas
2020-04-02 11:24   ` Ard Biesheuvel

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