How is 'ranges' property of pci node of a device tree determined?

How is 'ranges' property of pci node of a device tree determined?

[Chan Kim]

Hello all,

I was reading
https://elinux.org/Device_Tree_Usage#Ranges_.28Address_Translation.29 and
have a question (I have read it in the past). 
In the device tree node for the PCI bridge, there is "ranges" property and
this is to show the address mapping between PCI address and CPU physical
address.
And this seems to be the relationship between BARs and the CPU physical
address and this is usually determined and set by the firmware before linux
boots by filling in the BARs and setting the PCI bridge's address
translation logic appropriately. So does this mean this pci node in the
device tree is filled (or modified) by the firmware(BIOS) during
initialization and passed to the OS? (I guess so). I know how the BIOS or
firmware detects the address ranges's type (memory or IO, cachable, and
size) from the initial BAR registers and fills them. I'd appreciate it if
someone could confirm this.
(and the dma-ranges property seems to be the relationship between PCI
address and the host side memory address)

Thank you!

Chan Kim





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