[PATCH] fix AMD Fam10h unhandled MSRs

[PATCH] fix AMD Fam10h unhandled MSRs

[Andre Przywara]

Linux wants to enable I/O port access to the PCI extended config space and
thus writes a 1 into an AMD Fam10h MSR. Since we don't handle extended
config space (yet?), we simply ignore this write (and return 0 on reads).
Windows on the other hands checks whether the BIOS has setup MMI/O for
config space accesses, we say "no" by returning 0 on reads and only allow
disabling of MMI/O CfgSpace setup by igoring "0" writes.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
---
 arch/x86/kvm/x86.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index af53f64..0c4f43e 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -932,6 +932,15 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 		pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
 			"0x%x data 0x%llx\n", msr, data);
 		break;
+	case MSR_FAM10H_MMIO_CONF_BASE:
+		if (data != 0) {
+			pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
+				"0x%x data 0x%llx\n", msr, data);
+			return 1;
+		}
+		break;
+	case MSR_AMD64_NB_CFG:
+		break;
 	default:
 		if (!ignore_msrs) {
 			pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
@@ -1049,6 +1058,8 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 	case MSR_P6_EVNTSEL1:
 	case MSR_K7_EVNTSEL0:
 	case MSR_K8_INT_PENDING_MSG:
+	case MSR_AMD64_NB_CFG:
+	case MSR_FAM10H_MMIO_CONF_BASE:
 		data = 0;
 		break;
 	case MSR_MTRRcap:
-- 
1.6.1.3

[PATCH] fix MMIO_CONF_BASE MSR access

[Andre Przywara]

 Some Windows versions check whether the BIOS has setup MMI/O for
 config space accesses on AMD Fam10h CPUs, we say "no" by returning 0 on
 reads and only allow disabling of MMI/O CfgSpace setup by igoring "0" writes.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
---
 arch/x86/kvm/x86.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

This obsoletes the patch: "fix AMD Fam10h unhandled MSRs" from yesterday,
since part of it has already been applied with an older patch. This
contains only the remaining part.

Thanks and Regards,
Andre.

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 6263991..60b2527 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -846,6 +846,13 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
 			return 1;
 		}
 		break;
+	case MSR_FAM10H_MMIO_CONF_BASE:
+		if (data != 0) {
+			pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
+				"0x%llx\n", data);
+			return 1;
+		}
+		break;
 	case MSR_AMD64_NB_CFG:
 		break;
 	case MSR_IA32_DEBUGCTLMSR:
@@ -1054,6 +1061,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 	case MSR_K7_EVNTSEL0:
 	case MSR_K8_INT_PENDING_MSG:
 	case MSR_AMD64_NB_CFG:
+	case MSR_FAM10H_MMIO_CONF_BASE:
 		data = 0;
 		break;
 	case MSR_MTRRcap:
-- 
1.6.1.3

Re: [PATCH] fix MMIO_CONF_BASE MSR access

[Avi Kivity]

On 07/02/2009 04:04 PM, Andre Przywara wrote:
>   Some Windows versions check whether the BIOS has setup MMI/O for
>   config space accesses on AMD Fam10h CPUs, we say "no" by returning 0 on
>   reads and only allow disabling of MMI/O CfgSpace setup by igoring "0" writes.
>    

Applied, thanks.

-- 
error compiling committee.c: too many arguments to function