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From: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
To: Marc Zyngier <maz@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>,
	Christoffer Dall <christoffer.dall@arm.com>,
	Jintack Lim <jintack@cs.columbia.edu>,
	Haibo Xu <haibo.xu@linaro.org>, James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	kernel-team@android.com
Subject: Re: [PATCH v5 18/69] KVM: arm64: nv: Handle virtual EL2 registers in vcpu_read/write_sys_reg()
Date: Mon, 20 Dec 2021 12:34:44 +0530	[thread overview]
Message-ID: <13046e57-b7e5-7f0b-15bd-38c09e21807a@os.amperecomputing.com> (raw)
In-Reply-To: <20211129200150.351436-19-maz@kernel.org>


On 30-11-2021 01:30 am, Marc Zyngier wrote:
> KVM internally uses accessor functions when reading or writing the
> guest's system registers. This takes care of accessing either the stored
> copy or using the "live" EL1 system registers when the host uses VHE.
> 
> With the introduction of virtual EL2 we add a bunch of EL2 system
> registers, which now must also be taken care of:
> - If the guest is running in vEL2, and we access an EL1 sysreg, we must
>    revert to the stored version of that, and not use the CPU's copy.
> - If the guest is running in vEL1, and we access an EL2 sysreg, we must

Do we have vEL1? or is it a typo?

>    also use the stored version, since the CPU carries the EL1 copy.
> - Some EL2 system registers are supposed to affect the current execution
>    of the system, so we need to put them into their respective EL1
>    counterparts. For this we need to define a mapping between the two.
>    This is done using the newly introduced struct el2_sysreg_map.
> - Some EL2 system registers have a different format than their EL1
>    counterpart, so we need to translate them before writing them to the
>    CPU. This is done using an (optional) translate function in the map.
> - There are the three special registers SP_EL2, SPSR_EL2 and ELR_EL2,
>    which need some separate handling (SPSR_EL2 is being handled in a
>    separate patch).
> 
> All of these cases are now wrapped into the existing accessor functions,
> so KVM users wouldn't need to care whether they access EL2 or EL1
> registers and also which state the guest is in.
> 
> This handles what was formerly known as the "shadow state" dynamically,
> without requiring a separate copy for each vCPU EL.
> 
> Co-developed-by: Andre Przywara <andre.przywara@arm.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
>   arch/arm64/kvm/sys_regs.c | 143 ++++++++++++++++++++++++++++++++++++--
>   1 file changed, 139 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 730a24468915..61596355e42d 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -24,6 +24,7 @@
>   #include <asm/kvm_emulate.h>
>   #include <asm/kvm_hyp.h>
>   #include <asm/kvm_mmu.h>
> +#include <asm/kvm_nested.h>
>   #include <asm/perf_event.h>
>   #include <asm/sysreg.h>
>   
> @@ -64,23 +65,157 @@ static bool write_to_read_only(struct kvm_vcpu *vcpu,
>   	return false;
>   }
>   
> +#define PURE_EL2_SYSREG(el2)						\
> +	case el2: {							\
> +		*el1r = el2;						\
> +		return true;						\
> +	}
> +
> +#define MAPPED_EL2_SYSREG(el2, el1, fn)					\
> +	case el2: {							\
> +		*xlate = fn;						\
> +		*el1r = el1;						\
> +		return true;						\
> +	}
> +
> +static bool get_el2_mapping(unsigned int reg,
> +			    unsigned int *el1r, u64 (**xlate)(u64))
> +{
> +	switch (reg) {
> +		PURE_EL2_SYSREG(  VPIDR_EL2	);
> +		PURE_EL2_SYSREG(  VMPIDR_EL2	);
> +		PURE_EL2_SYSREG(  ACTLR_EL2	);
> +		PURE_EL2_SYSREG(  HCR_EL2	);
> +		PURE_EL2_SYSREG(  MDCR_EL2	);
> +		PURE_EL2_SYSREG(  HSTR_EL2	);
> +		PURE_EL2_SYSREG(  HACR_EL2	);
> +		PURE_EL2_SYSREG(  VTTBR_EL2	);
> +		PURE_EL2_SYSREG(  VTCR_EL2	);
> +		PURE_EL2_SYSREG(  RVBAR_EL2	);
> +		PURE_EL2_SYSREG(  TPIDR_EL2	);
> +		PURE_EL2_SYSREG(  HPFAR_EL2	);
> +		PURE_EL2_SYSREG(  ELR_EL2	);
> +		PURE_EL2_SYSREG(  SPSR_EL2	);
> +		MAPPED_EL2_SYSREG(SCTLR_EL2,   SCTLR_EL1,
> +				  translate_sctlr_el2_to_sctlr_el1	     );
> +		MAPPED_EL2_SYSREG(CPTR_EL2,    CPACR_EL1,
> +				  translate_cptr_el2_to_cpacr_el1	     );
> +		MAPPED_EL2_SYSREG(TTBR0_EL2,   TTBR0_EL1,
> +				  translate_ttbr0_el2_to_ttbr0_el1	     );
> +		MAPPED_EL2_SYSREG(TTBR1_EL2,   TTBR1_EL1,   NULL	     );
> +		MAPPED_EL2_SYSREG(TCR_EL2,     TCR_EL1,
> +				  translate_tcr_el2_to_tcr_el1		     );
> +		MAPPED_EL2_SYSREG(VBAR_EL2,    VBAR_EL1,    NULL	     );
> +		MAPPED_EL2_SYSREG(AFSR0_EL2,   AFSR0_EL1,   NULL	     );
> +		MAPPED_EL2_SYSREG(AFSR1_EL2,   AFSR1_EL1,   NULL	     );
> +		MAPPED_EL2_SYSREG(ESR_EL2,     ESR_EL1,     NULL	     );
> +		MAPPED_EL2_SYSREG(FAR_EL2,     FAR_EL1,     NULL	     );
> +		MAPPED_EL2_SYSREG(MAIR_EL2,    MAIR_EL1,    NULL	     );
> +		MAPPED_EL2_SYSREG(AMAIR_EL2,   AMAIR_EL1,   NULL	     );
> +		MAPPED_EL2_SYSREG(CNTHCTL_EL2, CNTKCTL_EL1,
> +				  translate_cnthctl_el2_to_cntkctl_el1	     );
> +	default:
> +		return false;
> +	}
> +}
> +
>   u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg)
>   {
>   	u64 val = 0x8badf00d8badf00d;
> +	u64 (*xlate)(u64) = NULL;
> +	unsigned int el1r;
> +
> +	if (!vcpu->arch.sysregs_loaded_on_cpu)
> +		goto memory_read;
> +
> +	if (unlikely(get_el2_mapping(reg, &el1r, &xlate))) {
> +		if (!is_hyp_ctxt(vcpu))
> +			goto memory_read;
> +
> +		/*
> +		 * ELR_EL2 is special cased for now.
> +		 */
> +		switch (reg) {
> +		case ELR_EL2:
> +			return read_sysreg_el1(SYS_ELR);
> +		}
> +
> +		/*
> +		 * If this register does not have an EL1 counterpart,
> +		 * then read the stored EL2 version.
> +		 */
> +		if (reg == el1r)
> +			goto memory_read;
> +
> +		/*
> +		 * If we have a non-VHE guest and that the sysreg
> +		 * requires translation to be used at EL1, use the
> +		 * in-memory copy instead.
> +		 */
> +		if (!vcpu_el2_e2h_is_set(vcpu) && xlate)
> +			goto memory_read;
> +
> +		/* Get the current version of the EL1 counterpart. */
> +		WARN_ON(!__vcpu_read_sys_reg_from_cpu(el1r, &val));
> +		return val;
> +	}
> +
> +	/* EL1 register can't be on the CPU if the guest is in vEL2. */
> +	if (unlikely(is_hyp_ctxt(vcpu)))
> +		goto memory_read;
>   
> -	if (vcpu->arch.sysregs_loaded_on_cpu &&
> -	    __vcpu_read_sys_reg_from_cpu(reg, &val))
> +	if (__vcpu_read_sys_reg_from_cpu(reg, &val))
>   		return val;
>   
> +memory_read:
>   	return __vcpu_sys_reg(vcpu, reg);
>   }
>   
>   void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg)
>   {
> -	if (vcpu->arch.sysregs_loaded_on_cpu &&
> -	    __vcpu_write_sys_reg_to_cpu(val, reg))
> +	u64 (*xlate)(u64) = NULL;
> +	unsigned int el1r;
> +
> +	if (!vcpu->arch.sysregs_loaded_on_cpu)
> +		goto memory_write;
> +
> +	if (unlikely(get_el2_mapping(reg, &el1r, &xlate))) {
> +		if (!is_hyp_ctxt(vcpu))
> +			goto memory_write;
> +
> +		/*
> +		 * Always store a copy of the write to memory to avoid having
> +		 * to reverse-translate virtual EL2 system registers for a
> +		 * non-VHE guest hypervisor.
> +		 */
> +		__vcpu_sys_reg(vcpu, reg) = val;
> +
> +		switch (reg) {
> +		case ELR_EL2:
> +			write_sysreg_el1(val, SYS_ELR);
> +			return;
> +		}
> +
> +		/* No EL1 counterpart? We're done here.? */
> +		if (reg == el1r)
> +			return;
> +
> +		if (!vcpu_el2_e2h_is_set(vcpu) && xlate)
> +			val = xlate(val);
> +
> +		/* Redirect this to the EL1 version of the register. */
> +		WARN_ON(!__vcpu_write_sys_reg_to_cpu(val, el1r));
> +		return;
> +	}
> +
> +	/* EL1 register can't be on the CPU if the guest is in vEL2. */
> +	if (unlikely(is_hyp_ctxt(vcpu)))
> +		goto memory_write;
> +
> +	if (__vcpu_write_sys_reg_to_cpu(val, reg))
>   		return;
>   
> +memory_write:
>   	 __vcpu_sys_reg(vcpu, reg) = val;
>   }
>   

Thanks,
Ganapat

  reply	other threads:[~2021-12-20  7:05 UTC|newest]

Thread overview: 139+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-29 20:00 [PATCH v5 00/69] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support Marc Zyngier
2021-11-29 20:00 ` [PATCH v5 01/69] KVM: arm64: Save PSTATE early on exit Marc Zyngier
2022-01-17 15:36   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 02/69] KVM: arm64: Move pkvm's special 32bit handling into a generic infrastructure Marc Zyngier
2022-01-17 15:34   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 03/69] KVM: arm64: Add minimal handling for the ARMv8.7 PMU Marc Zyngier
2022-01-17 15:40   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 04/69] KVM: arm64: Rework kvm_pgtable initialisation Marc Zyngier
2022-01-17 15:43   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 05/69] KVM: arm64: Allow preservation of the S2 SW bits Marc Zyngier
2022-01-13 12:12   ` Alexandru Elisei
2022-01-13 13:14     ` Marc Zyngier
2022-01-17 15:51   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 06/69] arm64: Add ARM64_HAS_NESTED_VIRT cpufeature Marc Zyngier
2021-11-29 20:00 ` [PATCH v5 07/69] KVM: arm64: nv: Introduce nested virtualization VCPU feature Marc Zyngier
2021-12-20  6:45   ` Ganapatrao Kulkarni
2022-01-13 14:10   ` Alexandru Elisei
2022-01-13 14:24     ` Marc Zyngier
2022-01-17 16:57   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 08/69] KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set Marc Zyngier
2022-01-07 21:54   ` Chase Conklin
2022-01-27 12:42     ` Marc Zyngier
2022-01-17 17:06   ` Russell King (Oracle)
2022-01-27 12:43     ` Marc Zyngier
2021-11-29 20:00 ` [PATCH v5 09/69] KVM: arm64: nv: Allow userspace to set PSR_MODE_EL2x Marc Zyngier
2022-01-17 17:07   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 10/69] KVM: arm64: nv: Add EL2 system registers to vcpu context Marc Zyngier
2022-01-17 17:14   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 11/69] KVM: arm64: nv: Add nested virt VCPU primitives for vEL2 VCPU state Marc Zyngier
2022-01-14 17:42   ` Alexandru Elisei
2022-01-15 12:19     ` Marc Zyngier
2022-01-17 10:19       ` Alexandru Elisei
2022-01-18 15:45   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 12/69] KVM: arm64: nv: Handle HCR_EL2.NV system register traps Marc Zyngier
2022-01-17 11:31   ` Alexandru Elisei
2022-01-26 16:08     ` Marc Zyngier
2022-01-18 15:51   ` Russell King (Oracle)
2022-01-26 16:01     ` Marc Zyngier
2021-11-29 20:00 ` [PATCH v5 13/69] KVM: arm64: nv: Reset VMPIDR_EL2 and VPIDR_EL2 to sane values Marc Zyngier
2022-01-18 15:52   ` Russell King (Oracle)
2021-11-29 20:00 ` [PATCH v5 14/69] KVM: arm64: nv: Support virtual EL2 exceptions Marc Zyngier
2021-12-20  6:57   ` Ganapatrao Kulkarni
2022-01-18 14:11   ` Alexandru Elisei
2022-01-26 20:11     ` Marc Zyngier
2022-01-18 16:02   ` Russell King (Oracle)
2022-01-26 20:32     ` Marc Zyngier
2022-01-20 13:58   ` Alexandru Elisei
2022-01-27 11:08     ` Marc Zyngier
2021-11-29 20:00 ` [PATCH v5 15/69] KVM: arm64: nv: Inject HVC exceptions to the virtual EL2 Marc Zyngier
2022-01-18 16:04   ` Russell King (Oracle)
2022-01-18 16:35   ` Alexandru Elisei
2021-11-29 20:00 ` [PATCH v5 16/69] KVM: arm64: nv: Handle trapped ERET from " Marc Zyngier
2022-01-18 16:05   ` Russell King (Oracle)
2022-01-18 16:36   ` Alexandru Elisei
2022-01-27 11:50     ` Marc Zyngier
2021-11-29 20:00 ` [PATCH v5 17/69] KVM: arm64: nv: Add non-VHE-EL2->EL1 translation helpers Marc Zyngier
2022-01-20 11:52   ` Alexandru Elisei
2022-01-27 17:22     ` Marc Zyngier
2021-11-29 20:00 ` [PATCH v5 18/69] KVM: arm64: nv: Handle virtual EL2 registers in vcpu_read/write_sys_reg() Marc Zyngier
2021-12-20  7:04   ` Ganapatrao Kulkarni [this message]
2021-12-20  9:10     ` Marc Zyngier
2021-12-21  7:12       ` Ganapatrao Kulkarni
2021-12-21  8:39         ` Marc Zyngier
2021-12-21 10:12           ` Ganapatrao Kulkarni
2022-01-20 15:12   ` Alexandru Elisei
2021-11-29 20:01 ` [PATCH v5 19/69] KVM: arm64: nv: Handle SPSR_EL2 specially Marc Zyngier
2022-01-20 16:28   ` Alexandru Elisei
2021-11-29 20:01 ` [PATCH v5 20/69] KVM: arm64: nv: Handle HCR_EL2.E2H specially Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 21/69] KVM: arm64: nv: Save/Restore vEL2 sysregs Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 22/69] KVM: arm64: nv: Emulate PSTATE.M for a guest hypervisor Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 23/69] KVM: arm64: nv: Trap EL1 VM register accesses in virtual EL2 Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 24/69] KVM: arm64: nv: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 from " Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 25/69] KVM: arm64: nv: Trap CPACR_EL1 access in " Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 26/69] KVM: arm64: nv: Handle PSCI call via smc from the guest Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 27/69] KVM: arm64: nv: Respect virtual HCR_EL2.TWX setting Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 28/69] KVM: arm64: nv: Respect virtual CPTR_EL2.{TFP,FPEN} settings Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 29/69] KVM: arm64: nv: Respect the virtual HCR_EL2.NV bit setting Marc Zyngier
2021-12-20  7:11   ` Ganapatrao Kulkarni
2021-12-20  9:18     ` Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 30/69] KVM: arm64: nv: Respect virtual HCR_EL2.TVM and TRVM settings Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 31/69] KVM: arm64: nv: Respect the virtual HCR_EL2.NV1 bit setting Marc Zyngier
2021-12-20  7:18   ` Ganapatrao Kulkarni
2021-12-20  9:39     ` Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 32/69] KVM: arm64: nv: Emulate EL12 register accesses from the virtual EL2 Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 33/69] KVM: arm64: nv: Forward debug traps to the nested guest Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 34/69] KVM: arm64: nv: Configure HCR_EL2 for nested virtualization Marc Zyngier
2022-01-04  8:53   ` Ganapatrao Kulkarni
2022-01-04  9:39     ` Marc Zyngier
2022-01-04  9:53       ` Ganapatrao Kulkarni
2021-11-29 20:01 ` [PATCH v5 35/69] KVM: arm64: nv: Only toggle cache for virtual EL2 when SCTLR_EL2 changes Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 36/69] KVM: arm64: nv: Filter out unsupported features from ID regs Marc Zyngier
2021-12-20  7:26   ` Ganapatrao Kulkarni
2021-12-20  9:56     ` Marc Zyngier
2021-12-21  6:03       ` Ganapatrao Kulkarni
2021-12-21  9:10         ` Marc Zyngier
2021-12-21 10:07           ` Ganapatrao Kulkarni
2022-01-21 11:33           ` Ganapatrao Kulkarni
2022-01-27 13:04             ` Marc Zyngier
2022-01-04 10:24   ` Ganapatrao Kulkarni
2021-11-29 20:01 ` [PATCH v5 37/69] KVM: arm64: nv: Hide RAS from nested guests Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 38/69] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures Marc Zyngier
2022-01-18 11:24   ` Ganapatrao Kulkarni
2022-01-27 11:50     ` Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 39/69] KVM: arm64: nv: Implement nested Stage-2 page table walk logic Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 40/69] KVM: arm64: nv: Handle shadow stage 2 page faults Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 41/69] KVM: arm64: nv: Restrict S2 RD/WR permissions to match the guest's Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 42/69] KVM: arm64: nv: Unmap/flush shadow stage 2 page tables Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 43/69] KVM: arm64: nv: Introduce sys_reg_desc.forward_trap Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 44/69] KVM: arm64: nv: Set a handler for the system instruction traps Marc Zyngier
2022-01-18 11:29   ` Ganapatrao Kulkarni
2021-11-29 20:01 ` [PATCH v5 45/69] KVM: arm64: nv: Trap and emulate AT instructions from virtual EL2 Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 46/69] KVM: arm64: nv: Trap and emulate TLBI " Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 47/69] KVM: arm64: nv: Fold guest's HCR_EL2 configuration into the host's Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 48/69] KVM: arm64: nv: arch_timer: Support hyp timer emulation Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 49/69] KVM: arm64: nv: Add handling of EL2-specific timer registers Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 50/69] KVM: arm64: nv: Load timer before the GIC Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 51/69] KVM: arm64: nv: Nested GICv3 Support Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 52/69] KVM: arm64: nv: Don't load the GICv4 context on entering a nested guest Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 53/69] KVM: arm64: nv: vgic: Emulate the HW bit in software Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 54/69] KVM: arm64: nv: vgic: Allow userland to set VGIC maintenance IRQ Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 55/69] KVM: arm64: nv: Implement maintenance interrupt forwarding Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 56/69] KVM: arm64: nv: Add nested GICv3 tracepoints Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 57/69] KVM: arm64: nv: Allow userspace to request KVM_ARM_VCPU_NESTED_VIRT Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 58/69] KVM: arm64: nv: Add handling of ARMv8.4-TTL TLB invalidation Marc Zyngier
2022-01-18 11:35   ` Ganapatrao Kulkarni
2021-11-29 20:01 ` [PATCH v5 59/69] KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like information Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 60/69] KVM: arm64: nv: Tag shadow S2 entries with nested level Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 61/69] KVM: arm64: nv: Add include containing the VNCR_EL2 offsets Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 62/69] KVM: arm64: nv: Map VNCR-capable registers to a separate page Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 63/69] KVM: arm64: nv: Move nested vgic state into the sysreg file Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 64/69] KVM: arm64: Add ARMv8.4 Enhanced Nested Virt cpufeature Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 65/69] KVM: arm64: nv: Sync nested timer state with ARMv8.4 Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 66/69] KVM: arm64: nv: Allocate VNCR page when required Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 67/69] KVM: arm64: nv: Enable ARMv8.4-NV support Marc Zyngier
2022-01-18 11:50   ` Ganapatrao Kulkarni
2022-01-27 11:48     ` Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 68/69] KVM: arm64: nv: Fast-track 'InHost' exception returns Marc Zyngier
2021-11-29 20:01 ` [PATCH v5 69/69] KVM: arm64: nv: Fast-track EL1 TLBIs for VHE guests Marc Zyngier
2021-12-16 17:19 ` (subset) [PATCH v5 00/69] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support Marc Zyngier

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