From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Markovic" <amarkovic@wavecomp.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Thomas Huth" <thuth@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Anthony Perard" <anthony.perard@citrix.com>,
"Stefano Stabellini" <sstabellini@kernel.org>,
"Paul Durrant" <paul@xen.org>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Aleksandar Rikalo" <aleksandar.rikalo@rt-rk.com>,
xen-devel@lists.xenproject.org,
"Laurent Vivier" <lvivier@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <rth@twiddle.net>,
kvm@vger.kernel.org, "Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH 09/32] piix4: add Reset Control Register
Date: Tue, 15 Oct 2019 18:26:42 +0200 [thread overview]
Message-ID: <20191015162705.28087-10-philmd@redhat.com> (raw)
In-Reply-To: <20191015162705.28087-1-philmd@redhat.com>
From: Hervé Poussineau <hpoussin@reactos.org>
The RCR I/O port (0xcf9) is used to generate a hard reset or a soft reset.
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Message-Id: <20171216090228.28505-7-hpoussin@reactos.org>
[PMD: rebased, updated includes]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/isa/piix4.c | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 4202243e41..6e2d9b9774 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -2,6 +2,7 @@
* QEMU PIIX4 PCI Bridge Emulation
*
* Copyright (c) 2006 Fabrice Bellard
+ * Copyright (c) 2018 Hervé Poussineau
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@@ -29,11 +30,16 @@
#include "hw/sysbus.h"
#include "migration/vmstate.h"
#include "sysemu/reset.h"
+#include "sysemu/runstate.h"
PCIDevice *piix4_dev;
typedef struct PIIX4State {
PCIDevice dev;
+
+ /* Reset Control Register */
+ MemoryRegion rcr_mem;
+ uint8_t rcr;
} PIIX4State;
#define TYPE_PIIX4_PCI_DEVICE "PIIX4"
@@ -88,6 +94,34 @@ static const VMStateDescription vmstate_piix4 = {
}
};
+static void piix4_rcr_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned int len)
+{
+ PIIX4State *s = opaque;
+
+ if (val & 4) {
+ qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
+ return;
+ }
+ s->rcr = val & 2; /* keep System Reset type only */
+}
+
+static uint64_t piix4_rcr_read(void *opaque, hwaddr addr, unsigned int len)
+{
+ PIIX4State *s = opaque;
+ return s->rcr;
+}
+
+static const MemoryRegionOps piix4_rcr_ops = {
+ .read = piix4_rcr_read,
+ .write = piix4_rcr_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
+};
+
static void piix4_realize(PCIDevice *pci_dev, Error **errp)
{
DeviceState *dev = DEVICE(pci_dev);
@@ -97,6 +131,12 @@ static void piix4_realize(PCIDevice *pci_dev, Error **errp)
pci_address_space_io(pci_dev), errp)) {
return;
}
+
+ memory_region_init_io(&s->rcr_mem, OBJECT(dev), &piix4_rcr_ops, s,
+ "reset-control", 1);
+ memory_region_add_subregion_overlap(pci_address_space_io(pci_dev), 0xcf9,
+ &s->rcr_mem, 1);
+
piix4_dev = pci_dev;
qemu_register_reset(piix4_reset, s);
}
--
2.21.0
next prev parent reply other threads:[~2019-10-15 16:29 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-15 16:26 [PATCH 00/32] hw/i386/pc: Split PIIX3 southbridge from i440FX northbridge Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 01/32] hw/i386: Remove obsolete LoadStateHandler::load_state_old handlers Philippe Mathieu-Daudé
2019-10-15 16:29 ` Philippe Mathieu-Daudé
2019-11-01 10:19 ` Dr. David Alan Gilbert
2019-10-15 16:26 ` [PATCH 02/32] hw/i386/pc: Move kvm_i8259_init() declaration to sysemu/kvm.h Philippe Mathieu-Daudé
2019-10-17 15:04 ` Thomas Huth
2019-10-17 15:31 ` Philippe Mathieu-Daudé
2019-10-17 15:40 ` Thomas Huth
[not found] ` <CAL1e-=iC9hR-jqTSu9c6KtgiNWFwftnTMq9W87NWFPb37hjCoA@mail.gmail.com>
2019-10-17 15:08 ` Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 03/32] mc146818rtc: move structure to header file Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 04/32] mc146818rtc: Move RTC_ISA_IRQ definition Philippe Mathieu-Daudé
[not found] ` <CAL1e-=jOiMe2--=ht0Wgwh0a_At=sDhUzX7EkNU86nPt230a-g@mail.gmail.com>
2019-10-17 15:12 ` Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 05/32] mc146818rtc: Include "mc146818rtc_regs.h" directly in mc146818rtc.c Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 06/32] mc146818rtc: always register rtc to rtc list Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 07/32] MAINTAINERS: Keep PIIX4 South Bridge separate from PC Chipsets Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 08/32] piix4: rename some variables in realize function Philippe Mathieu-Daudé
2019-10-17 15:13 ` Thomas Huth
2019-10-15 16:26 ` Philippe Mathieu-Daudé [this message]
2019-10-15 16:26 ` [PATCH 10/32] piix4: add a i8259 interrupt controller as specified in datasheet Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 11/32] Revert "irq: introduce qemu_irq_proxy()" Philippe Mathieu-Daudé
2019-10-17 15:16 ` Thomas Huth
2019-10-15 16:26 ` [PATCH 12/32] piix4: rename PIIX4 object to piix4-isa Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 13/32] piix4: convert reset function to QOM Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 14/32] piix4: add a i8257 dma controller as specified in datasheet Philippe Mathieu-Daudé
2019-10-17 15:19 ` Thomas Huth
2019-10-15 16:26 ` [PATCH 15/32] piix4: add a i8254 pit " Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 16/32] piix4: add a mc146818rtc " Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 17/32] hw/mips/mips_malta: Create IDE hard drive array dynamically Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 18/32] hw/mips/mips_malta: Extract the PIIX4 creation code as piix4_create() Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 19/32] hw/isa/piix4: Move piix4_create() to hw/isa/piix4.c Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 20/32] hw/i386/pc: Extract pc_gsi_create() Philippe Mathieu-Daudé
2019-10-17 15:33 ` Thomas Huth
2019-10-15 16:26 ` [PATCH 21/32] hw/i386/pc: Reduce gsi_handler scope Philippe Mathieu-Daudé
[not found] ` <CAL1e-=hLUDDqFiV8W1f2PFGYJMomvmZUXmjA55X7WEEYMykjHQ@mail.gmail.com>
2019-10-17 15:37 ` Philippe Mathieu-Daudé
2019-10-17 15:41 ` Thomas Huth
2019-10-15 16:26 ` [PATCH 22/32] hw/i386/pc: Move gsi_state creation code Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 23/32] hw/i386/pc: Extract pc_i8259_create() Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 24/32] hw/i386/pc: Remove kvm_i386.h include Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 25/32] hw/pci-host/piix: Extract piix3_create() Philippe Mathieu-Daudé
2019-10-15 16:26 ` [PATCH 26/32] hw/pci-host/piix: Move RCR_IOPORT register definition Philippe Mathieu-Daudé
[not found] ` <CAL1e-=jVr+idQKNdOGSrODeq7XU-0JcCFTwapqk9-JvAKxk6Pw@mail.gmail.com>
2019-10-18 10:13 ` Philippe Mathieu-Daudé
2019-10-15 16:27 ` [PATCH 27/32] hw/pci-host/piix: Define and use the PIIX IRQ Route Control Registers Philippe Mathieu-Daudé
2019-10-16 11:24 ` Paul Durrant
2019-10-15 16:27 ` [PATCH 28/32] hw/pci-host/piix: Move i440FX declarations to hw/pci-host/i440fx.h Philippe Mathieu-Daudé
2019-10-15 16:27 ` [PATCH 29/32] hw/pci-host/piix: Fix code style issues Philippe Mathieu-Daudé
2019-10-15 16:27 ` [PATCH 30/32] hw/pci-host/piix: Extract PIIX3 functions to hw/isa/piix3.c Philippe Mathieu-Daudé
2019-10-15 16:27 ` [PATCH 31/32] hw/pci-host: Rename incorrectly named 'piix' as 'i440fx' Philippe Mathieu-Daudé
2019-10-15 16:27 ` [PATCH 32/32] hw/pci-host/i440fx: Remove the last PIIX3 traces Philippe Mathieu-Daudé
2019-10-16 4:13 ` [PATCH 00/32] hw/i386/pc: Split PIIX3 southbridge from i440FX northbridge no-reply
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