From: Jingyi Wang <wangjingyi11@huawei.com>
To: <drjones@redhat.com>, <kvm@vger.kernel.org>,
<kvmarm@lists.cs.columbia.edu>, <wangjingyi11@huawei.com>
Cc: <maz@kernel.org>, <wanghaibin.wang@huawei.com>,
<yuzenghui@huawei.com>, <eric.auger@redhat.com>
Subject: [kvm-unit-tests PATCH 6/6] arm64: microbench: Add vtimer latency test
Date: Sun, 17 May 2020 18:09:00 +0800 [thread overview]
Message-ID: <20200517100900.30792-7-wangjingyi11@huawei.com> (raw)
In-Reply-To: <20200517100900.30792-1-wangjingyi11@huawei.com>
Triggers PPIs by setting up a 10msec timer and test the latency.
For this test can be time consuming, we add time limit for loop_test
to make sure each test should be done in a certain time(5 sec here).
Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
---
arm/micro-bench.c | 81 ++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 70 insertions(+), 11 deletions(-)
diff --git a/arm/micro-bench.c b/arm/micro-bench.c
index 91af1f7..dbe8e54 100644
--- a/arm/micro-bench.c
+++ b/arm/micro-bench.c
@@ -23,6 +23,11 @@
#include <asm/gic-v3-its.h>
#define NTIMES (1U << 16)
+#define MAX_NS (5 * 1000 * 1000 * 1000UL)
+
+#define IRQ_VTIMER 27
+#define ARCH_TIMER_CTL_ENABLE (1 << 0)
+#define ARCH_TIMER_CTL_IMASK (1 << 1)
static u32 cntfrq;
@@ -33,9 +38,16 @@ static bool ipi_hw;
static void gic_irq_handler(struct pt_regs *regs)
{
+ u32 irqstat = gic_read_iar();
irq_ready = false;
irq_received = true;
- gic_write_eoir(gic_read_iar());
+ gic_write_eoir(irqstat);
+
+ if (irqstat == IRQ_VTIMER) {
+ write_sysreg((ARCH_TIMER_CTL_IMASK | ARCH_TIMER_CTL_ENABLE),
+ cntv_ctl_el0);
+ isb();
+ }
irq_ready = true;
}
@@ -195,6 +207,47 @@ static void lpi_exec(void)
assert_msg(irq_received, "failed to receive LPI in time, but received %d successfully\n", received);
}
+static bool timer_prep(void)
+{
+ static void *gic_isenabler;
+
+ gic_enable_defaults();
+ install_irq_handler(EL1H_IRQ, gic_irq_handler);
+ local_irq_enable();
+
+ gic_isenabler = gicv3_sgi_base() + GICR_ISENABLER0;
+ writel(1 << IRQ_VTIMER, gic_isenabler);
+ write_sysreg(ARCH_TIMER_CTL_ENABLE, cntv_ctl_el0);
+ isb();
+
+ gic_prep_common();
+ return true;
+}
+
+static void timer_exec(void)
+{
+ u64 before_timer;
+ u64 timer_10ms;
+ unsigned tries = 1 << 28;
+ static int received = 0;
+
+ irq_received = false;
+
+ before_timer = read_sysreg(cntvct_el0);
+ timer_10ms = cntfrq / 100;
+ write_sysreg(before_timer + timer_10ms, cntv_cval_el0);
+ write_sysreg(ARCH_TIMER_CTL_ENABLE, cntv_ctl_el0);
+ isb();
+
+ while (!irq_received && tries--)
+ cpu_relax();
+
+ if (irq_received)
+ ++received;
+
+ assert_msg(irq_received, "failed to receive PPI in time, but received %d successfully\n", received);
+}
+
static void hvc_exec(void)
{
asm volatile("mov w0, #0x4b000000; hvc #0" ::: "w0");
@@ -241,6 +294,7 @@ static struct exit_test tests[] = {
{"ipi", ipi_prep, ipi_exec, true},
{"ipi_hw", ipi_hw_prep, ipi_exec, true},
{"lpi", lpi_prep, lpi_exec, true},
+ {"timer_10ms", timer_prep, timer_exec, true},
};
struct ns_time {
@@ -261,27 +315,32 @@ static void ticks_to_ns_time(uint64_t ticks, struct ns_time *ns_time)
static void loop_test(struct exit_test *test)
{
- uint64_t start, end, total_ticks, ntimes = NTIMES;
+ uint64_t start, end, total_ticks, ntimes = 0;
struct ns_time total_ns, avg_ns;
+ total_ticks = 0;
if (test->prep) {
if(!test->prep()) {
-
printf("%s test skipped\n", test->name);
return;
}
}
- isb();
- start = read_sysreg(cntpct_el0);
- while (ntimes--)
+
+ while (ntimes < NTIMES && total_ns.ns < MAX_NS) {
+ isb();
+ start = read_sysreg(cntpct_el0);
test->exec();
- isb();
- end = read_sysreg(cntpct_el0);
+ isb();
+ end = read_sysreg(cntpct_el0);
+
+ ntimes++;
+ total_ticks += (end - start);
+ ticks_to_ns_time(total_ticks, &total_ns);
+ }
- total_ticks = end - start;
ticks_to_ns_time(total_ticks, &total_ns);
- avg_ns.ns = total_ns.ns / NTIMES;
- avg_ns.ns_frac = total_ns.ns_frac / NTIMES;
+ avg_ns.ns = total_ns.ns / ntimes;
+ avg_ns.ns_frac = total_ns.ns_frac / ntimes;
printf("%-30s%15" PRId64 ".%-15" PRId64 "%15" PRId64 ".%-15" PRId64 "\n",
test->name, total_ns.ns, total_ns.ns_frac, avg_ns.ns, avg_ns.ns_frac);
--
2.19.1
next prev parent reply other threads:[~2020-05-17 10:11 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-17 10:08 [kvm-unit-tests PATCH 0/6] arm64: add IPI/LPI/vtimer latency Jingyi Wang
2020-05-17 10:08 ` [kvm-unit-tests PATCH 1/6] arm64: microbench: get correct ipi recieved num Jingyi Wang
2020-05-21 14:00 ` Zenghui Yu
2020-05-22 2:32 ` Jingyi Wang
2020-05-22 5:34 ` Andrew Jones
2020-05-17 10:08 ` [kvm-unit-tests PATCH 2/6] arm64: microbench: Use the funcions for ipi test as the general functions for gic(ipi/lpi/timer) test Jingyi Wang
2020-05-17 10:08 ` [kvm-unit-tests PATCH 3/6] arm64: microbench: gic: Add gicv4.1 support for ipi latency test Jingyi Wang
2020-05-17 10:08 ` [kvm-unit-tests PATCH 4/6] arm64: its: Handle its command queue wrapping Jingyi Wang
2020-05-17 10:08 ` [kvm-unit-tests PATCH 5/6] arm64: microbench: its: Add LPI latency test Jingyi Wang
2020-05-17 10:09 ` Jingyi Wang [this message]
2020-05-18 7:05 ` [kvm-unit-tests PATCH 6/6] arm64: microbench: Add vtimer " Andrew Jones
2020-05-20 4:16 ` Jingyi Wang
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