From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Jintack Lim <jintack@cs.columbia.edu>,
Alexandru Elisei <alexandru.elisei@arm.com>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
kernel-team@android.com
Subject: [PATCH v3 53/66] KVM: arm64: nv: Add handling of ARMv8.4-TTL TLB invalidation
Date: Thu, 10 Dec 2020 15:59:49 +0000 [thread overview]
Message-ID: <20201210160002.1407373-54-maz@kernel.org> (raw)
In-Reply-To: <20201210160002.1407373-1-maz@kernel.org>
Support guest-provided information information to find out about
the range of required invalidation.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/kvm_nested.h | 1 +
arch/arm64/kvm/nested.c | 57 +++++++++++++++++++++
arch/arm64/kvm/sys_regs.c | 79 +++++++++++++++++++----------
3 files changed, 109 insertions(+), 28 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h
index 5fa3c634c8e1..7c47ad655e2e 100644
--- a/arch/arm64/include/asm/kvm_nested.h
+++ b/arch/arm64/include/asm/kvm_nested.h
@@ -123,6 +123,7 @@ extern bool __forward_traps(struct kvm_vcpu *vcpu, unsigned int reg,
u64 control_bit);
extern bool forward_traps(struct kvm_vcpu *vcpu, u64 control_bit);
extern bool forward_nv_traps(struct kvm_vcpu *vcpu);
+unsigned int ttl_to_size(u8 ttl);
struct sys_reg_params;
struct sys_reg_desc;
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index 9574fde823e6..05b711e730b6 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -351,6 +351,63 @@ int kvm_walk_nested_s2(struct kvm_vcpu *vcpu, phys_addr_t gipa,
return ret;
}
+
+unsigned int ttl_to_size(u8 ttl)
+{
+ int level = ttl & 3;
+ int gran = (ttl >> 2) & 3;
+ unsigned int max_size = 0;
+
+ switch (gran) {
+ case TLBI_TTL_TG_4K:
+ switch (level) {
+ case 0:
+ break;
+ case 1:
+ max_size = SZ_1G;
+ break;
+ case 2:
+ max_size = SZ_2M;
+ break;
+ case 3:
+ max_size = SZ_4K;
+ break;
+ }
+ break;
+ case TLBI_TTL_TG_16K:
+ switch (level) {
+ case 0:
+ case 1:
+ break;
+ case 2:
+ max_size = SZ_32M;
+ break;
+ case 3:
+ max_size = SZ_16K;
+ break;
+ }
+ break;
+ case TLBI_TTL_TG_64K:
+ switch (level) {
+ case 0:
+ case 1:
+ /* No 52bit IPA support */
+ break;
+ case 2:
+ max_size = SZ_512M;
+ break;
+ case 3:
+ max_size = SZ_64K;
+ break;
+ }
+ break;
+ default: /* No size information */
+ break;
+ }
+
+ return max_size;
+}
+
/* Must be called with kvm->lock held */
struct kvm_s2_mmu *lookup_s2_mmu(struct kvm *kvm, u64 vttbr, u64 hcr)
{
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 60d2fb6edc93..61094f5e955e 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -9,6 +9,7 @@
* Christoffer Dall <c.dall@virtualopensystems.com>
*/
+#include <linux/bitfield.h>
#include <linux/bsearch.h>
#include <linux/kvm_host.h>
#include <linux/mm.h>
@@ -2578,59 +2579,81 @@ static bool handle_vmalls12e1is(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
return true;
}
+static unsigned long compute_tlb_inval_range(struct kvm_vcpu *vcpu,
+ struct kvm_s2_mmu *mmu,
+ u64 val)
+{
+ unsigned long max_size;
+ u8 ttl = 0;
+
+ if (cpus_have_const_cap(ARM64_HAS_ARMv8_4_TTL)) {
+ ttl = FIELD_GET(GENMASK_ULL(47, 44), val);
+ }
+
+ max_size = ttl_to_size(ttl);
+
+ if (!max_size) {
+ u64 vtcr = vcpu_read_sys_reg(vcpu, VTCR_EL2);
+
+ /* Compute the maximum extent of the invalidation */
+ switch ((vtcr & VTCR_EL2_TG0_MASK)) {
+ case VTCR_EL2_TG0_4K:
+ max_size = SZ_1G;
+ break;
+ case VTCR_EL2_TG0_16K:
+ max_size = SZ_32M;
+ break;
+ case VTCR_EL2_TG0_64K:
+ /*
+ * No, we do not support 52bit IPA in nested yet. Once
+ * we do, this should be 4TB.
+ */
+ /* FIXME: remove the 52bit PA support from the IDregs */
+ max_size = SZ_512M;
+ break;
+ default:
+ BUG();
+ }
+ }
+
+ WARN_ON(!max_size);
+ return max_size;
+}
+
static bool handle_ipas2e1is(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
const struct sys_reg_desc *r)
{
u64 vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);
- u64 vtcr = vcpu_read_sys_reg(vcpu, VTCR_EL2);
struct kvm_s2_mmu *mmu;
u64 base_addr;
- int max_size;
+ unsigned long max_size;
/*
* We drop a number of things from the supplied value:
*
* - NS bit: we're non-secure only.
*
- * - TTL field: We already have the granule size from the
- * VTCR_EL2.TG0 field, and the level is only relevant to the
- * guest's S2PT.
- *
* - IPA[51:48]: We don't support 52bit IPA just yet...
*
* And of course, adjust the IPA to be on an actual address.
*/
base_addr = (p->regval & GENMASK_ULL(35, 0)) << 12;
- /* Compute the maximum extent of the invalidation */
- switch ((vtcr & VTCR_EL2_TG0_MASK)) {
- case VTCR_EL2_TG0_4K:
- max_size = SZ_1G;
- break;
- case VTCR_EL2_TG0_16K:
- max_size = SZ_32M;
- break;
- case VTCR_EL2_TG0_64K:
- /*
- * No, we do not support 52bit IPA in nested yet. Once
- * we do, this should be 4TB.
- */
- /* FIXME: remove the 52bit PA support from the IDregs */
- max_size = SZ_512M;
- break;
- default:
- BUG();
- }
-
spin_lock(&vcpu->kvm->mmu_lock);
mmu = lookup_s2_mmu(vcpu->kvm, vttbr, HCR_VM);
- if (mmu)
+ if (mmu) {
+ max_size = compute_tlb_inval_range(vcpu, mmu, p->regval);
+ base_addr &= ~(max_size - 1);
kvm_unmap_stage2_range(mmu, base_addr, max_size);
+ }
mmu = lookup_s2_mmu(vcpu->kvm, vttbr, 0);
- if (mmu)
+ if (mmu) {
+ max_size = compute_tlb_inval_range(vcpu, mmu, p->regval);
+ base_addr &= ~(max_size - 1);
kvm_unmap_stage2_range(mmu, base_addr, max_size);
+ }
spin_unlock(&vcpu->kvm->mmu_lock);
--
2.29.2
next prev parent reply other threads:[~2020-12-10 16:30 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-10 15:58 [PATCH v3 00/66] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support Marc Zyngier
2020-12-10 15:58 ` [PATCH v3 01/66] arm64: Add ARM64_HAS_NESTED_VIRT cpufeature Marc Zyngier
2020-12-10 15:58 ` [PATCH v3 02/66] KVM: arm64: nv: Introduce nested virtualization VCPU feature Marc Zyngier
2020-12-10 15:58 ` [PATCH v3 03/66] KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 04/66] KVM: arm64: nv: Allow userspace to set PSR_MODE_EL2x Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 05/66] KVM: arm64: nv: Add EL2 system registers to vcpu context Marc Zyngier
2021-01-29 18:04 ` Andre Przywara
2020-12-10 15:59 ` [PATCH v3 06/66] KVM: arm64: nv: Add nested virt VCPU primitives for vEL2 VCPU state Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 07/66] KVM: arm64: nv: Handle HCR_EL2.NV system register traps Marc Zyngier
2021-01-29 18:05 ` Andre Przywara
2020-12-10 15:59 ` [PATCH v3 08/66] KVM: arm64: nv: Reset VMPIDR_EL2 and VPIDR_EL2 to sane values Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 09/66] KVM: arm64: nv: Support virtual EL2 exceptions Marc Zyngier
2021-01-29 18:05 ` Andre Przywara
2021-02-16 22:05 ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 10/66] KVM: arm64: nv: Inject HVC exceptions to the virtual EL2 Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 11/66] KVM: arm64: nv: Handle trapped ERET from " Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 12/66] KVM: arm64: nv: Add non-VHE-EL2->EL1 translation helpers Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 13/66] KVM: arm64: nv: Handle virtual EL2 registers in vcpu_read/write_sys_reg() Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 14/66] KVM: arm64: nv: Handle SPSR_EL2 specially Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 15/66] KVM: arm64: nv: Handle HCR_EL2.E2H specially Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 16/66] KVM: arm64: nv: Save/Restore vEL2 sysregs Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 17/66] KVM: arm64: nv: Emulate PSTATE.M for a guest hypervisor Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 18/66] KVM: arm64: nv: Trap EL1 VM register accesses in virtual EL2 Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 19/66] KVM: arm64: nv: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 from " Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 20/66] KVM: arm64: nv: Trap CPACR_EL1 access in " Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 21/66] KVM: arm64: nv: Handle PSCI call via smc from the guest Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 22/66] KVM: arm64: nv: Respect virtual HCR_EL2.TWX setting Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 23/66] KVM: arm64: nv: Respect virtual CPTR_EL2.{TFP,FPEN} settings Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 24/66] KVM: arm64: nv: Respect the virtual HCR_EL2.NV bit setting Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 25/66] KVM: arm64: nv: Respect virtual HCR_EL2.TVM and TRVM settings Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 26/66] KVM: arm64: nv: Respect the virtual HCR_EL2.NV1 bit setting Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 27/66] KVM: arm64: nv: Emulate EL12 register accesses from the virtual EL2 Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 28/66] KVM: arm64: nv: Forward debug traps to the nested guest Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 29/66] KVM: arm64: nv: Configure HCR_EL2 for nested virtualization Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 30/66] KVM: arm64: nv: Only toggle cache for virtual EL2 when SCTLR_EL2 changes Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 31/66] KVM: arm64: nv: Filter out unsupported features from ID regs Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 32/66] KVM: arm64: nv: Hide RAS from nested guests Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 33/66] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures Marc Zyngier
2021-01-21 2:59 ` Haibo Xu
2021-02-16 18:34 ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 34/66] KVM: arm64: nv: Implement nested Stage-2 page table walk logic Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 35/66] KVM: arm64: nv: Handle shadow stage 2 page faults Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 36/66] KVM: arm64: nv: Restrict S2 RD/WR permissions to match the guest's Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 37/66] KVM: arm64: nv: Unmap/flush shadow stage 2 page tables Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 38/66] KVM: arm64: nv: Introduce sys_reg_desc.forward_trap Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 39/66] KVM: arm64: nv: Set a handler for the system instruction traps Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 40/66] KVM: arm64: nv: Trap and emulate AT instructions from virtual EL2 Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 41/66] KVM: arm64: nv: Trap and emulate TLBI " Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 42/66] KVM: arm64: nv: Fold guest's HCR_EL2 configuration into the host's Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 43/66] KVM: arm64: nv: arch_timer: Support hyp timer emulation Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 44/66] KVM: arm64: nv: Add handling of EL2-specific timer registers Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 45/66] KVM: arm64: nv: Load timer before the GIC Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 46/66] KVM: arm64: nv: Nested GICv3 Support Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 47/66] KVM: arm64: nv: Don't load the GICv4 context on entering a nested guest Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 48/66] KVM: arm64: nv: vgic: Emulate the HW bit in software Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 49/66] KVM: arm64: nv: vgic: Allow userland to set VGIC maintenance IRQ Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 50/66] KVM: arm64: nv: Implement maintenance interrupt forwarding Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 51/66] KVM: arm64: nv: Add nested GICv3 tracepoints Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 52/66] KVM: arm64: nv: Allow userspace to request KVM_ARM_VCPU_NESTED_VIRT Marc Zyngier
2020-12-10 15:59 ` Marc Zyngier [this message]
2020-12-10 15:59 ` [PATCH v3 54/66] KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like information Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 55/66] KVM: arm64: Allow populating S2 SW bits Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 56/66] KVM: arm64: nv: Tag shadow S2 entries with nested level Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 57/66] KVM: arm64: nv: Add include containing the VNCR_EL2 offsets Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 58/66] KVM: arm64: Map VNCR-capable registers to a separate page Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 59/66] KVM: arm64: nv: Move nested vgic state into the sysreg file Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 60/66] KVM: arm64: Add ARMv8.4 Enhanced Nested Virt cpufeature Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 61/66] KVM: arm64: nv: Synchronize PSTATE early on exit Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 62/66] KVM: arm64: nv: Sync nested timer state with ARMv8.4 Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 63/66] KVM: arm64: nv: Allocate VNCR page when required Marc Zyngier
2021-01-21 2:47 ` Haibo Xu
2021-02-16 19:03 ` Marc Zyngier
2020-12-10 16:00 ` [PATCH v3 64/66] KVM: arm64: nv: Enable ARMv8.4-NV support Marc Zyngier
2020-12-10 16:00 ` [PATCH v3 65/66] KVM: arm64: nv: Fast-track 'InHost' exception returns Marc Zyngier
2020-12-10 16:00 ` [PATCH v3 66/66] KVM: arm64: nv: Fast-track EL1 TLBIs for VHE guests Marc Zyngier
[not found] ` <CAJc+Z1GFHp17+ROTyDnfS4QLs0kCEVBCD7+OBkHZA53q-zmiLQ@mail.gmail.com>
2021-01-11 8:59 ` [PATCH v3 00/66] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support Marc Zyngier
2021-01-12 8:02 ` Haibo Xu
2021-01-18 17:38 ` André Przywara
2021-01-21 3:03 ` Haibo Xu
2021-02-04 7:51 ` Haibo Xu
2021-02-17 22:10 ` Marc Zyngier
2021-02-23 9:43 ` Haibo Xu
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