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From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
	kvmarm@lists.cs.columbia.edu
Cc: James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Eric Auger <eric.auger@redhat.com>,
	Hector Martin <marcan@marcan.st>,
	Mark Rutland <mark.rutland@arm.com>,
	kernel-team@android.com
Subject: [PATCH 09/11] irqchip/apple-aic: Fix [un]masking of guest timers
Date: Tue, 16 Mar 2021 17:46:14 +0000	[thread overview]
Message-ID: <20210316174617.173033-10-maz@kernel.org> (raw)
In-Reply-To: <20210316174617.173033-1-maz@kernel.org>

As the enabling of the guest timer interrupts is done by
accessing a system register, make sure the access is correctly
synchronised.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 drivers/irqchip/irq-apple-aic.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
index ddc0856f36a5..447c9e87f13a 100644
--- a/drivers/irqchip/irq-apple-aic.c
+++ b/drivers/irqchip/irq-apple-aic.c
@@ -242,9 +242,11 @@ static void aic_fiq_mask(struct irq_data *d)
 	switch (d->hwirq) {
 	case AIC_TMR_GUEST_PHYS:
 		sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, VM_TMR_FIQ_ENABLE_P, 0);
+		isb();
 		break;
 	case AIC_TMR_GUEST_VIRT:
 		sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, VM_TMR_FIQ_ENABLE_V, 0);
+		isb();
 		break;
 	}
 }
@@ -254,9 +256,11 @@ static void aic_fiq_unmask(struct irq_data *d)
 	switch (d->hwirq) {
 	case AIC_TMR_GUEST_PHYS:
 		sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, 0, VM_TMR_FIQ_ENABLE_P);
+		isb();
 		break;
 	case AIC_TMR_GUEST_VIRT:
 		sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, 0, VM_TMR_FIQ_ENABLE_V);
+		isb();
 		break;
 	}
 }
-- 
2.29.2


  parent reply	other threads:[~2021-03-16 17:47 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-16 17:46 [PATCH 00/11] KVM: arm64: Initial host support for the Apple M1 Marc Zyngier
2021-03-16 17:46 ` [PATCH 01/11] irqchip/gic: Split vGIC probing information from the GIC code Marc Zyngier
2021-03-16 17:46 ` [PATCH 02/11] KVM: arm64: Handle physical FIQ as an IRQ while running a guest Marc Zyngier
2021-03-16 17:46 ` [PATCH 03/11] KVM: arm64: vgic: Be tolerant to the lack of maintenance interrupt Marc Zyngier
2021-03-16 17:46 ` [PATCH 04/11] KVM: arm64: vgic: Let an interrupt controller advertise lack of HW deactivation Marc Zyngier
2021-03-16 17:46 ` [PATCH 05/11] KVM: arm64: vgic: move irq->get_input_level into an ops structure Marc Zyngier
2021-03-16 17:46 ` [PATCH 06/11] KVM: arm64: vgic: Implement SW-driven deactivation Marc Zyngier
2021-03-16 17:46 ` [PATCH 07/11] KVM: arm64: timer: Refactor IRQ configuration Marc Zyngier
2021-03-16 17:46 ` [PATCH 08/11] KVM: arm64: timer: Add support for SW-based deactivation Marc Zyngier
2021-03-16 17:46 ` Marc Zyngier [this message]
2021-03-16 17:46 ` [PATCH 10/11] irqchip/apple-aic: Initialise SYS_APL_VM_TMR_FIQ_ENA_EL1 at boot time Marc Zyngier
2021-03-16 17:46 ` [PATCH 11/11] irqchip/apple-aic: Advertise some level of vGICv3 compatibility Marc Zyngier

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