From: Yifei Jiang <jiangyifei@huawei.com>
To: <qemu-devel@nongnu.org>, <qemu-riscv@nongnu.org>
Cc: <kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>,
<libvir-list@redhat.com>, <anup@brainfault.org>,
<palmer@dabbelt.com>, <Alistair.Francis@wdc.com>,
<bin.meng@windriver.com>, <fanliang@huawei.com>,
<wu.wubin@huawei.com>, <wanghaibin.wang@huawei.com>,
<wanbo13@huawei.com>, Yifei Jiang <jiangyifei@huawei.com>,
Mingwang Li <limingwang@huawei.com>
Subject: [PATCH v5 13/13] target/riscv: enable riscv kvm accel
Date: Wed, 12 Jan 2022 16:13:29 +0800 [thread overview]
Message-ID: <20220112081329.1835-14-jiangyifei@huawei.com> (raw)
In-Reply-To: <20220112081329.1835-1-jiangyifei@huawei.com>
Add riscv kvm support in meson.build file.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Mingwang Li <limingwang@huawei.com>
---
meson.build | 2 ++
1 file changed, 2 insertions(+)
diff --git a/meson.build b/meson.build
index c1b1db1e28..06a5476254 100644
--- a/meson.build
+++ b/meson.build
@@ -90,6 +90,8 @@ elif cpu in ['ppc', 'ppc64']
kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']
elif cpu in ['mips', 'mips64']
kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu']
+elif cpu in ['riscv']
+ kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu']
else
kvm_targets = []
endif
--
2.19.1
next prev parent reply other threads:[~2022-01-12 8:14 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-12 8:13 [PATCH v5 00/13] Add riscv kvm accel support Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 01/13] update-linux-headers: Add asm-riscv/kvm.h Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 02/13] target/riscv: Add target/riscv/kvm.c to place the public kvm interface Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 03/13] target/riscv: Implement function kvm_arch_init_vcpu Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 04/13] target/riscv: Implement kvm_arch_get_registers Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 05/13] target/riscv: Implement kvm_arch_put_registers Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 06/13] target/riscv: Support start kernel directly by KVM Yifei Jiang
2022-01-13 4:35 ` Anup Patel
2022-01-12 8:13 ` [PATCH v5 07/13] target/riscv: Support setting external interrupt " Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 08/13] target/riscv: Handle KVM_EXIT_RISCV_SBI exit Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 09/13] target/riscv: Add host cpu type Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 10/13] target/riscv: Add kvm_riscv_get/put_regs_timer Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 11/13] target/riscv: Implement virtual time adjusting with vm state changing Yifei Jiang
2022-01-12 8:13 ` [PATCH v5 12/13] target/riscv: Support virtual time context synchronization Yifei Jiang
2022-01-12 8:13 ` Yifei Jiang [this message]
2022-01-13 4:30 ` [PATCH v5 13/13] target/riscv: enable riscv kvm accel Alistair Francis
2022-01-13 4:41 ` Anup Patel
2022-01-17 22:48 ` [PATCH v5 00/13] Add riscv kvm accel support Alistair Francis
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