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From: Xin Li <xin3.li@intel.com>
To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
	dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org,
	andrew.cooper3@citrix.com, seanjc@google.com,
	pbonzini@redhat.com, ravi.v.shankar@intel.com
Subject: [PATCH v5 30/34] x86/fred: allow FRED systems to use interrupt vectors 0x10-0x1f
Date: Mon,  6 Mar 2023 18:39:42 -0800	[thread overview]
Message-ID: <20230307023946.14516-31-xin3.li@intel.com> (raw)
In-Reply-To: <20230307023946.14516-1-xin3.li@intel.com>

From: "H. Peter Anvin (Intel)" <hpa@zytor.com>

FRED inherits the Intel VT-x enhancement of classified events with
a two-level event dispatch logic. The first-level dispatch is on
the event type, and the second-level is on the event vector. This
also means that vectors in different event types are orthogonal,
thus, vectors 0x10-0x1f become available as hardware interrupts.

Enable interrupt vectors 0x10-0x1f on FRED systems (interrupt 0x80 is
already enabled.) Most of these changes are about removing the
assumption that the lowest-priority vector is hard-wired to 0x20.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Tested-by: Shan Kang <shan.kang@intel.com>
Signed-off-by: Xin Li <xin3.li@intel.com>
---
 arch/x86/include/asm/idtentry.h    |  4 ++--
 arch/x86/include/asm/irq.h         |  5 +++++
 arch/x86/include/asm/irq_vectors.h | 15 +++++++++++----
 arch/x86/kernel/apic/apic.c        | 11 ++++++++---
 arch/x86/kernel/apic/vector.c      |  8 +++++++-
 arch/x86/kernel/fred.c             |  4 ++--
 arch/x86/kernel/idt.c              |  6 +++---
 arch/x86/kernel/irq.c              |  2 +-
 arch/x86/kernel/traps.c            |  2 ++
 9 files changed, 41 insertions(+), 16 deletions(-)

diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h
index bd43866f9c3e..57c891148b59 100644
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -546,8 +546,8 @@ __visible noinstr void func(struct pt_regs *regs,			\
  */
 	.align IDT_ALIGN
 SYM_CODE_START(irq_entries_start)
-    vector=FIRST_EXTERNAL_VECTOR
-    .rept NR_EXTERNAL_VECTORS
+    vector=FIRST_EXTERNAL_VECTOR_IDT
+    .rept FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR_IDT
 	UNWIND_HINT_IRET_REGS
 0 :
 	ENDBR
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index 768aa234cbb4..e4be6f8409ad 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -11,6 +11,11 @@
 #include <asm/apicdef.h>
 #include <asm/irq_vectors.h>
 
+/*
+ * The first available IRQ vector
+ */
+extern unsigned int __ro_after_init first_external_vector;
+
 /*
  * The irq entry code is in the noinstr section and the start/end of
  * __irqentry_text is emitted via labels. Make the build fail if
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 43dcb9284208..cb3670a7c18f 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -31,15 +31,23 @@
 
 /*
  * IDT vectors usable for external interrupt sources start at 0x20.
- * (0x80 is the syscall vector, 0x30-0x3f are for ISA)
+ * (0x80 is the syscall vector, 0x30-0x3f are for ISA).
+ *
+ * With FRED we can also use 0x10-0x1f even though those overlap
+ * exception vectors as FRED distinguishes exceptions and interrupts.
+ * Therefore, FIRST_EXTERNAL_VECTOR is no longer a constant.
  */
-#define FIRST_EXTERNAL_VECTOR		0x20
+#define FIRST_EXTERNAL_VECTOR_IDT	0x20
+#define FIRST_EXTERNAL_VECTOR_FRED	0x10
+#define FIRST_EXTERNAL_VECTOR		first_external_vector
 
 /*
  * Reserve the lowest usable vector (and hence lowest priority)  0x20 for
  * triggering cleanup after irq migration. 0x21-0x2f will still be used
  * for device interrupts.
  */
+#define IRQ_MOVE_CLEANUP_VECTOR_IDT	FIRST_EXTERNAL_VECTOR_IDT
+#define IRQ_MOVE_CLEANUP_VECTOR_FRED	FIRST_EXTERNAL_VECTOR_FRED
 #define IRQ_MOVE_CLEANUP_VECTOR		FIRST_EXTERNAL_VECTOR
 
 #define IA32_SYSCALL_VECTOR		0x80
@@ -48,7 +56,7 @@
  * Vectors 0x30-0x3f are used for ISA interrupts.
  *   round up to the next 16-vector boundary
  */
-#define ISA_IRQ_VECTOR(irq)		(((FIRST_EXTERNAL_VECTOR + 16) & ~15) + irq)
+#define ISA_IRQ_VECTOR(irq)		(((FIRST_EXTERNAL_VECTOR_IDT + 16) & ~15) + irq)
 
 /*
  * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
@@ -114,7 +122,6 @@
 #define FIRST_SYSTEM_VECTOR		NR_VECTORS
 #endif
 
-#define NR_EXTERNAL_VECTORS		(FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
 #define NR_SYSTEM_VECTORS		(NR_VECTORS - FIRST_SYSTEM_VECTOR)
 
 /*
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 20d9a604da7c..eef67f64aa81 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1621,12 +1621,17 @@ static void setup_local_APIC(void)
 	/*
 	 * Set Task Priority to 'accept all except vectors 0-31'.  An APIC
 	 * vector in the 16-31 range could be delivered if TPR == 0, but we
-	 * would think it's an exception and terrible things will happen.  We
-	 * never change this later on.
+	 * would think it's an exception and terrible things will happen,
+	 * unless we are using FRED in which case interrupts and
+	 * exceptions are distinguished by type code.
+	 *
+	 * We never change this later on.
 	 */
+	BUG_ON(!first_external_vector);
+
 	value = apic_read(APIC_TASKPRI);
 	value &= ~APIC_TPRI_MASK;
-	value |= 0x10;
+	value |= (first_external_vector - 0x10) & APIC_TPRI_MASK;
 	apic_write(APIC_TASKPRI, value);
 
 	/* Clear eventually stale ISR/IRR bits */
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index c1efebd27e6c..f4325445fd78 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -46,6 +46,7 @@ static struct irq_matrix *vector_matrix;
 #ifdef CONFIG_SMP
 static DEFINE_PER_CPU(struct hlist_head, cleanup_list);
 #endif
+unsigned int first_external_vector = FIRST_EXTERNAL_VECTOR_IDT;
 
 void lock_vector_lock(void)
 {
@@ -796,7 +797,12 @@ int __init arch_early_irq_init(void)
 	 * Allocate the vector matrix allocator data structure and limit the
 	 * search area.
 	 */
-	vector_matrix = irq_alloc_matrix(NR_VECTORS, FIRST_EXTERNAL_VECTOR,
+	if (cpu_feature_enabled(X86_FEATURE_FRED))
+		first_external_vector = FIRST_EXTERNAL_VECTOR_FRED;
+	else
+		first_external_vector = FIRST_EXTERNAL_VECTOR_IDT;
+
+	vector_matrix = irq_alloc_matrix(NR_VECTORS, first_external_vector,
 					 FIRST_SYSTEM_VECTOR);
 	BUG_ON(!vector_matrix);
 
diff --git a/arch/x86/kernel/fred.c b/arch/x86/kernel/fred.c
index 827b58fd98d4..04f057219c6e 100644
--- a/arch/x86/kernel/fred.c
+++ b/arch/x86/kernel/fred.c
@@ -51,7 +51,7 @@ void __init fred_setup_apic(void)
 {
 	int i;
 
-	for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
+	for (i = 0; i < FIRST_EXTERNAL_VECTOR_FRED; i++)
 		set_bit(i, system_vectors);
 
 	/*
@@ -60,7 +60,7 @@ void __init fred_setup_apic(void)
 	 * /proc/interrupts.
 	 */
 #ifdef CONFIG_SMP
-	set_bit(IRQ_MOVE_CLEANUP_VECTOR, system_vectors);
+	set_bit(IRQ_MOVE_CLEANUP_VECTOR_FRED, system_vectors);
 #endif
 
 	for (i = 0; i < NR_SYSTEM_VECTORS; i++) {
diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c
index a58c6bc1cd68..d3fd86f85de9 100644
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -131,7 +131,7 @@ static const __initconst struct idt_data apic_idts[] = {
 	INTG(RESCHEDULE_VECTOR,			asm_sysvec_reschedule_ipi),
 	INTG(CALL_FUNCTION_VECTOR,		asm_sysvec_call_function),
 	INTG(CALL_FUNCTION_SINGLE_VECTOR,	asm_sysvec_call_function_single),
-	INTG(IRQ_MOVE_CLEANUP_VECTOR,		asm_sysvec_irq_move_cleanup),
+	INTG(IRQ_MOVE_CLEANUP_VECTOR_IDT,	asm_sysvec_irq_move_cleanup),
 	INTG(REBOOT_VECTOR,			asm_sysvec_reboot),
 #endif
 
@@ -274,13 +274,13 @@ static void __init idt_map_in_cea(void)
  */
 void __init idt_setup_apic_and_irq_gates(void)
 {
-	int i = FIRST_EXTERNAL_VECTOR;
+	int i = FIRST_EXTERNAL_VECTOR_IDT;
 	void *entry;
 
 	idt_setup_from_table(idt_table, apic_idts, ARRAY_SIZE(apic_idts), true);
 
 	for_each_clear_bit_from(i, system_vectors, FIRST_SYSTEM_VECTOR) {
-		entry = irq_entries_start + IDT_ALIGN * (i - FIRST_EXTERNAL_VECTOR);
+		entry = irq_entries_start + IDT_ALIGN * (i - FIRST_EXTERNAL_VECTOR_IDT);
 		set_intr_gate(i, entry);
 	}
 
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 7e125fff45ab..b7511e02959c 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -359,7 +359,7 @@ void fixup_irqs(void)
 	 * vector_lock because the cpu is already marked !online, so
 	 * nothing else will touch it.
 	 */
-	for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
+	for (vector = first_external_vector; vector < NR_VECTORS; vector++) {
 		if (IS_ERR_OR_NULL(__this_cpu_read(vector_irq[vector])))
 			continue;
 
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index c7253b4901f0..c46eba091728 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -1544,6 +1544,8 @@ DEFINE_IDTENTRY_IRQ(spurious_interrupt)
 	pr_info("Spurious interrupt (vector 0x%x) on CPU#%d, should never happen.\n",
 		vector, smp_processor_id());
 }
+
+unsigned int first_external_vector = FIRST_EXTERNAL_VECTOR_IDT;
 #endif
 
 /*
-- 
2.34.1


  parent reply	other threads:[~2023-03-07  3:07 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-07  2:39 [PATCH v5 00/34] x86: enable FRED for x86-64 Xin Li
2023-03-07  2:39 ` [PATCH v5 01/34] x86/traps: let common_interrupt() handle IRQ_MOVE_CLEANUP_VECTOR Xin Li
2023-03-07  2:39 ` [PATCH v5 02/34] x86/traps: add a system interrupt table for system interrupt dispatch Xin Li
2023-03-07  2:39 ` [PATCH v5 03/34] x86/traps: add install_system_interrupt_handler() Xin Li
2023-03-07  2:39 ` [PATCH v5 04/34] x86/traps: add external_interrupt() to dispatch external interrupts Xin Li
2023-03-20 15:36   ` Peter Zijlstra
2023-03-20 17:42     ` Peter Zijlstra
2023-03-20 23:47       ` Li, Xin3
2023-03-20 17:53     ` Li, Xin3
2023-03-07  2:39 ` [PATCH v5 05/34] x86/traps: export external_interrupt() for VMX IRQ reinjection Xin Li
2023-03-22 17:52   ` Sean Christopherson
2023-03-22 22:38     ` Li, Xin3
2023-03-07  2:39 ` [PATCH v5 06/34] x86/cpufeature: add the cpu feature bit for FRED Xin Li
2023-03-07  2:39 ` [PATCH v5 07/34] x86/opcode: add ERETU, ERETS instructions to x86-opcode-map Xin Li
2023-03-07  2:39 ` [PATCH v5 08/34] x86/objtool: teach objtool about ERETU and ERETS Xin Li
2023-03-07  2:39 ` [PATCH v5 09/34] x86/cpu: add X86_CR4_FRED macro Xin Li
2023-03-07  2:39 ` [PATCH v5 10/34] x86/fred: add Kconfig option for FRED (CONFIG_X86_FRED) Xin Li
2023-03-07  2:39 ` [PATCH v5 11/34] x86/fred: if CONFIG_X86_FRED is disabled, disable FRED support Xin Li
2023-03-07  2:39 ` [PATCH v5 12/34] x86/cpu: add MSR numbers for FRED configuration Xin Li
2023-03-07  2:39 ` [PATCH v5 13/34] x86/fred: header file for event types Xin Li
2023-03-07  2:39 ` [PATCH v5 14/34] x86/fred: header file with FRED definitions Xin Li
2023-03-07  2:39 ` [PATCH v5 15/34] x86/fred: make unions for the cs and ss fields in struct pt_regs Xin Li
2023-03-07  2:39 ` [PATCH v5 16/34] x86/fred: reserve space for the FRED stack frame Xin Li
2023-03-07  2:39 ` [PATCH v5 17/34] x86/fred: add a page fault entry stub for FRED Xin Li
2023-03-07  2:39 ` [PATCH v5 18/34] x86/fred: add a debug " Xin Li
2023-03-07  2:39 ` [PATCH v5 19/34] x86/fred: add a NMI " Xin Li
2023-03-07  2:39 ` [PATCH v5 20/34] x86/fred: add a machine check " Xin Li
2023-03-20 16:00   ` Peter Zijlstra
2023-03-21  0:04     ` Li, Xin3
2023-03-21  8:59       ` Peter Zijlstra
2023-03-21 16:38         ` Li, Xin3
2023-03-07  2:39 ` [PATCH v5 21/34] x86/fred: FRED entry/exit and dispatch code Xin Li
2023-03-07  2:39 ` [PATCH v5 22/34] x86/fred: FRED initialization code Xin Li
2023-03-17 13:35   ` Lai Jiangshan
2023-03-17 21:32     ` H. Peter Anvin
2023-03-18  6:33       ` Lai Jiangshan
2023-03-20 16:49         ` Peter Zijlstra
2023-03-21  0:12           ` Li, Xin3
2023-03-21  1:02             ` andrew.cooper3
2023-03-21  7:49               ` Li, Xin3
2023-03-22 16:29               ` Dave Hansen
2023-03-22  2:22         ` Li, Xin3
2023-03-22  4:01           ` Dave Hansen
2023-03-22  5:40             ` Li, Xin3
2023-03-22 18:25           ` andrew.cooper3
2023-03-20 16:44       ` Peter Zijlstra
2023-03-21  0:13         ` Li, Xin3
2023-03-07  2:39 ` [PATCH v5 23/34] x86/fred: update MSR_IA32_FRED_RSP0 during task switch Xin Li
2023-03-20 16:52   ` Peter Zijlstra
2023-03-20 23:54     ` Li, Xin3
2023-03-07  2:39 ` [PATCH v5 24/34] x86/fred: let ret_from_fork() jmp to fred_exit_user when FRED is enabled Xin Li
2023-03-07  2:39 ` [PATCH v5 25/34] x86/fred: disallow the swapgs instruction " Xin Li
2023-03-20 16:54   ` Peter Zijlstra
2023-03-20 17:58     ` Li, Xin3
2023-03-07  2:39 ` [PATCH v5 26/34] x86/fred: no ESPFIX needed " Xin Li
2023-03-07  2:39 ` [PATCH v5 27/34] x86/fred: allow single-step trap and NMI when starting a new thread Xin Li
2023-03-07  2:39 ` [PATCH v5 28/34] x86/fred: fixup fault on ERETU by jumping to fred_entrypoint_user Xin Li
2023-03-17  9:39   ` Lai Jiangshan
2023-03-17  9:55     ` andrew.cooper3
2023-03-17 13:02       ` Lai Jiangshan
2023-03-17 21:23         ` H. Peter Anvin
2023-03-17 21:00       ` H. Peter Anvin
2023-03-18  7:55     ` Li, Xin3
2023-03-07  2:39 ` [PATCH v5 29/34] x86/ia32: do not modify the DPL bits for a null selector Xin Li
2023-03-07  2:39 ` Xin Li [this message]
2023-03-07  2:39 ` [PATCH v5 31/34] x86/fred: allow dynamic stack frame size Xin Li
2023-03-07  2:39 ` [PATCH v5 32/34] x86/fred: disable FRED by default in its early stage Xin Li
2023-03-07  2:39 ` [PATCH v5 33/34] KVM: x86/vmx: call external_interrupt() to handle IRQ in IRQ caused VM exits Xin Li
2023-03-22 17:57   ` Sean Christopherson
2023-03-07  2:39 ` [PATCH v5 34/34] KVM: x86/vmx: execute "int $2" to handle NMI in NMI caused VM exits when FRED is enabled Xin Li
2023-03-07 22:00   ` Li, Xin3
2023-03-22 17:49   ` Sean Christopherson
2023-03-22 23:03     ` andrew.cooper3
2023-03-22 23:42       ` Sean Christopherson
2023-03-23  0:26         ` Li, Xin3
2023-03-24 17:45           ` Li, Xin3
2023-03-22 23:43     ` Li, Xin3
2023-03-11  9:58 ` [PATCH v5 00/34] x86: enable FRED for x86-64 Kang, Shan
2023-03-11 21:29   ` Li, Xin3
2023-03-20  7:40   ` Kang, Shan

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