* [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC
@ 2019-06-25 12:06 Nadav Amit
2019-06-26 22:32 ` Krish Sadhukhan
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Nadav Amit @ 2019-06-25 12:06 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: kvm, Nadav Amit, Marc Orr
Cc: Marc Orr <marcorr@google.com>
Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
---
lib/x86/apic.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/x86/apic.h b/lib/x86/apic.h
index 537fdfb..b5bf208 100644
--- a/lib/x86/apic.h
+++ b/lib/x86/apic.h
@@ -75,6 +75,7 @@ static inline bool x2apic_reg_reserved(u32 reg)
switch (reg) {
case 0x000 ... 0x010:
case 0x040 ... 0x070:
+ case 0x090:
case 0x0c0:
case 0x0e0:
case 0x290 ... 0x2e0:
--
2.17.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC
2019-06-25 12:06 [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC Nadav Amit
@ 2019-06-26 22:32 ` Krish Sadhukhan
2019-06-27 0:14 ` Marc Orr
2019-06-27 18:19 ` Nadav Amit
2019-06-27 0:13 ` Marc Orr
2019-07-02 15:55 ` Paolo Bonzini
2 siblings, 2 replies; 8+ messages in thread
From: Krish Sadhukhan @ 2019-06-26 22:32 UTC (permalink / raw)
To: Nadav Amit, Paolo Bonzini; +Cc: kvm, Marc Orr
On 6/25/19 5:06 AM, Nadav Amit wrote:
> Cc: Marc Orr <marcorr@google.com>
> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
> ---
> lib/x86/apic.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/lib/x86/apic.h b/lib/x86/apic.h
> index 537fdfb..b5bf208 100644
> --- a/lib/x86/apic.h
> +++ b/lib/x86/apic.h
> @@ -75,6 +75,7 @@ static inline bool x2apic_reg_reserved(u32 reg)
> switch (reg) {
> case 0x000 ... 0x010:
> case 0x040 ... 0x070:
> + case 0x090:
> case 0x0c0:
> case 0x0e0:
> case 0x290 ... 0x2e0:
0x02f0 which is also reserved, is missing from the above list.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC
2019-06-25 12:06 [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC Nadav Amit
2019-06-26 22:32 ` Krish Sadhukhan
@ 2019-06-27 0:13 ` Marc Orr
2019-07-02 15:55 ` Paolo Bonzini
2 siblings, 0 replies; 8+ messages in thread
From: Marc Orr @ 2019-06-27 0:13 UTC (permalink / raw)
To: Nadav Amit; +Cc: Paolo Bonzini, kvm
On Tue, Jun 25, 2019 at 12:28 PM Nadav Amit <nadav.amit@gmail.com> wrote:
>
> Cc: Marc Orr <marcorr@google.com>
> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
> ---
> lib/x86/apic.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/lib/x86/apic.h b/lib/x86/apic.h
> index 537fdfb..b5bf208 100644
> --- a/lib/x86/apic.h
> +++ b/lib/x86/apic.h
> @@ -75,6 +75,7 @@ static inline bool x2apic_reg_reserved(u32 reg)
> switch (reg) {
> case 0x000 ... 0x010:
> case 0x040 ... 0x070:
> + case 0x090:
> case 0x0c0:
> case 0x0e0:
> case 0x290 ... 0x2e0:
> --
> 2.17.1
>
Reviewed-by: Marc Orr <marcorr@google.com>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC
2019-06-26 22:32 ` Krish Sadhukhan
@ 2019-06-27 0:14 ` Marc Orr
2019-06-27 1:11 ` Krish Sadhukhan
2019-06-27 18:19 ` Nadav Amit
1 sibling, 1 reply; 8+ messages in thread
From: Marc Orr @ 2019-06-27 0:14 UTC (permalink / raw)
To: Krish Sadhukhan; +Cc: Nadav Amit, Paolo Bonzini, kvm
On Wed, Jun 26, 2019 at 3:32 PM Krish Sadhukhan
<krish.sadhukhan@oracle.com> wrote:
>
>
> On 6/25/19 5:06 AM, Nadav Amit wrote:
> > Cc: Marc Orr <marcorr@google.com>
> > Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
> > ---
> > lib/x86/apic.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/lib/x86/apic.h b/lib/x86/apic.h
> > index 537fdfb..b5bf208 100644
> > --- a/lib/x86/apic.h
> > +++ b/lib/x86/apic.h
> > @@ -75,6 +75,7 @@ static inline bool x2apic_reg_reserved(u32 reg)
> > switch (reg) {
> > case 0x000 ... 0x010:
> > case 0x040 ... 0x070:
> > + case 0x090:
> > case 0x0c0:
> > case 0x0e0:
> > case 0x290 ... 0x2e0:
>
>
> 0x02f0 which is also reserved, is missing from the above list.
0x02f0 is "LVT CMCI register", right?
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC
2019-06-27 0:14 ` Marc Orr
@ 2019-06-27 1:11 ` Krish Sadhukhan
0 siblings, 0 replies; 8+ messages in thread
From: Krish Sadhukhan @ 2019-06-27 1:11 UTC (permalink / raw)
To: Marc Orr; +Cc: Nadav Amit, Paolo Bonzini, kvm
On 6/26/19 5:14 PM, Marc Orr wrote:
> On Wed, Jun 26, 2019 at 3:32 PM Krish Sadhukhan
> <krish.sadhukhan@oracle.com> wrote:
>>
>> On 6/25/19 5:06 AM, Nadav Amit wrote:
>>> Cc: Marc Orr <marcorr@google.com>
>>> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
>>> ---
>>> lib/x86/apic.h | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/lib/x86/apic.h b/lib/x86/apic.h
>>> index 537fdfb..b5bf208 100644
>>> --- a/lib/x86/apic.h
>>> +++ b/lib/x86/apic.h
>>> @@ -75,6 +75,7 @@ static inline bool x2apic_reg_reserved(u32 reg)
>>> switch (reg) {
>>> case 0x000 ... 0x010:
>>> case 0x040 ... 0x070:
>>> + case 0x090:
>>> case 0x0c0:
>>> case 0x0e0:
>>> case 0x290 ... 0x2e0:
>>
>> 0x02f0 which is also reserved, is missing from the above list.
> 0x02f0 is "LVT CMCI register", right?
That's right.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC
2019-06-26 22:32 ` Krish Sadhukhan
2019-06-27 0:14 ` Marc Orr
@ 2019-06-27 18:19 ` Nadav Amit
2019-06-27 22:03 ` Krish Sadhukhan
1 sibling, 1 reply; 8+ messages in thread
From: Nadav Amit @ 2019-06-27 18:19 UTC (permalink / raw)
To: Krish Sadhukhan; +Cc: Paolo Bonzini, kvm, Marc Orr
> On Jun 26, 2019, at 3:32 PM, Krish Sadhukhan <krish.sadhukhan@oracle.com> wrote:
>
>
> On 6/25/19 5:06 AM, Nadav Amit wrote:
>> Cc: Marc Orr <marcorr@google.com>
>> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
>> ---
>> lib/x86/apic.h | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/lib/x86/apic.h b/lib/x86/apic.h
>> index 537fdfb..b5bf208 100644
>> --- a/lib/x86/apic.h
>> +++ b/lib/x86/apic.h
>> @@ -75,6 +75,7 @@ static inline bool x2apic_reg_reserved(u32 reg)
>> switch (reg) {
>> case 0x000 ... 0x010:
>> case 0x040 ... 0x070:
>> + case 0x090:
>> case 0x0c0:
>> case 0x0e0:
>> case 0x290 ... 0x2e0:
>
>
> 0x02f0 which is also reserved, is missing from the above list.
I tried adding it, and I get on bare-metal:
FAIL: x2apic - reading 0x2f0: x2APIC op triggered GP.
And actually, the SDM table 10-6 “Local APIC Register Address Map Supported
by x2APIC” also shows this register (LVT CMCI) as "Read/write”. So I don’t
know why you say it is reserved.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC
2019-06-27 18:19 ` Nadav Amit
@ 2019-06-27 22:03 ` Krish Sadhukhan
0 siblings, 0 replies; 8+ messages in thread
From: Krish Sadhukhan @ 2019-06-27 22:03 UTC (permalink / raw)
To: Nadav Amit; +Cc: Paolo Bonzini, kvm, Marc Orr
On 06/27/2019 11:19 AM, Nadav Amit wrote:
>> On Jun 26, 2019, at 3:32 PM, Krish Sadhukhan <krish.sadhukhan@oracle.com> wrote:
>>
>>
>> On 6/25/19 5:06 AM, Nadav Amit wrote:
>>> Cc: Marc Orr <marcorr@google.com>
>>> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
>>> ---
>>> lib/x86/apic.h | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/lib/x86/apic.h b/lib/x86/apic.h
>>> index 537fdfb..b5bf208 100644
>>> --- a/lib/x86/apic.h
>>> +++ b/lib/x86/apic.h
>>> @@ -75,6 +75,7 @@ static inline bool x2apic_reg_reserved(u32 reg)
>>> switch (reg) {
>>> case 0x000 ... 0x010:
>>> case 0x040 ... 0x070:
>>> + case 0x090:
>>> case 0x0c0:
>>> case 0x0e0:
>>> case 0x290 ... 0x2e0:
>>
>> 0x02f0 which is also reserved, is missing from the above list.
> I tried adding it, and I get on bare-metal:
>
> FAIL: x2apic - reading 0x2f0: x2APIC op triggered GP.
>
> And actually, the SDM table 10-6 “Local APIC Register Address Map Supported
> by x2APIC” also shows this register (LVT CMCI) as "Read/write”. So I don’t
> know why you say it is reserved.
>
Sorry, my bad ! I was looking at an older version (318148) of the SDM
in which it was showing as reserved.
We are good.
Reviewed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC
2019-06-25 12:06 [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC Nadav Amit
2019-06-26 22:32 ` Krish Sadhukhan
2019-06-27 0:13 ` Marc Orr
@ 2019-07-02 15:55 ` Paolo Bonzini
2 siblings, 0 replies; 8+ messages in thread
From: Paolo Bonzini @ 2019-07-02 15:55 UTC (permalink / raw)
To: Nadav Amit; +Cc: kvm, Marc Orr
On 25/06/19 14:06, Nadav Amit wrote:
> Cc: Marc Orr <marcorr@google.com>
> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
> ---
> lib/x86/apic.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/lib/x86/apic.h b/lib/x86/apic.h
> index 537fdfb..b5bf208 100644
> --- a/lib/x86/apic.h
> +++ b/lib/x86/apic.h
> @@ -75,6 +75,7 @@ static inline bool x2apic_reg_reserved(u32 reg)
> switch (reg) {
> case 0x000 ... 0x010:
> case 0x040 ... 0x070:
> + case 0x090:
> case 0x0c0:
> case 0x0e0:
> case 0x290 ... 0x2e0:
>
Queued, thanks.
Paolo
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2019-07-02 15:55 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-25 12:06 [kvm-unit-tests PATCH] x86: Mark APR as reserved in x2APIC Nadav Amit
2019-06-26 22:32 ` Krish Sadhukhan
2019-06-27 0:14 ` Marc Orr
2019-06-27 1:11 ` Krish Sadhukhan
2019-06-27 18:19 ` Nadav Amit
2019-06-27 22:03 ` Krish Sadhukhan
2019-06-27 0:13 ` Marc Orr
2019-07-02 15:55 ` Paolo Bonzini
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).