kvm.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [kvm-unit-tests PATCH] x86: Flush the TLB after setting user-bit
@ 2021-06-17 10:15 Nadav Amit
  2021-06-17 18:37 ` Paolo Bonzini
  0 siblings, 1 reply; 2+ messages in thread
From: Nadav Amit @ 2021-06-17 10:15 UTC (permalink / raw)
  To: Paolo Bonzini; +Cc: kvm, Nadav Amit

From: Nadav Amit <nadav.amit@gmail.com>

According to Intel SDM 4.10.4.3 "Optional Invalidation": "If CR4.SMEP =
0 and a paging-structure entry is modified to change the U/S flag from 0
to 1, failure to perform an invalidation may result in a "spurious"
page-fault exception (e.g., in response to an attempted user-mode
access) but no other adverse behavior."

The access test actually causes in certain environments a spurious
page-fault. So invalidate the relevant PTE after setting the user bit.

Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
---
 x86/access.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/x86/access.c b/x86/access.c
index 0ad677e..47807cc 100644
--- a/x86/access.c
+++ b/x86/access.c
@@ -216,8 +216,12 @@ static unsigned set_cr4_smep(int smep)
     if (smep)
         ptl2[2] &= ~PT_USER_MASK;
     r = write_cr4_checking(cr4);
-    if (r || !smep)
+    if (r || !smep) {
         ptl2[2] |= PT_USER_MASK;
+
+	/* Flush to avoid spurious #PF */
+	invlpg((void *)(2 << 21));
+    }
     if (!r)
         shadow_cr4 = cr4;
     return r;
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [kvm-unit-tests PATCH] x86: Flush the TLB after setting user-bit
  2021-06-17 10:15 [kvm-unit-tests PATCH] x86: Flush the TLB after setting user-bit Nadav Amit
@ 2021-06-17 18:37 ` Paolo Bonzini
  0 siblings, 0 replies; 2+ messages in thread
From: Paolo Bonzini @ 2021-06-17 18:37 UTC (permalink / raw)
  To: Nadav Amit; +Cc: kvm

On 17/06/21 12:15, Nadav Amit wrote:
> From: Nadav Amit <nadav.amit@gmail.com>
> 
> According to Intel SDM 4.10.4.3 "Optional Invalidation": "If CR4.SMEP =
> 0 and a paging-structure entry is modified to change the U/S flag from 0
> to 1, failure to perform an invalidation may result in a "spurious"
> page-fault exception (e.g., in response to an attempted user-mode
> access) but no other adverse behavior."
> 
> The access test actually causes in certain environments a spurious
> page-fault. So invalidate the relevant PTE after setting the user bit.
> 
> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
> ---
>   x86/access.c | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/x86/access.c b/x86/access.c
> index 0ad677e..47807cc 100644
> --- a/x86/access.c
> +++ b/x86/access.c
> @@ -216,8 +216,12 @@ static unsigned set_cr4_smep(int smep)
>       if (smep)
>           ptl2[2] &= ~PT_USER_MASK;
>       r = write_cr4_checking(cr4);
> -    if (r || !smep)
> +    if (r || !smep) {
>           ptl2[2] |= PT_USER_MASK;
> +
> +	/* Flush to avoid spurious #PF */
> +	invlpg((void *)(2 << 21));
> +    }
>       if (!r)
>           shadow_cr4 = cr4;
>       return r;
> 

Queued, thanks.

Paolo


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2021-06-17 18:37 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-06-17 10:15 [kvm-unit-tests PATCH] x86: Flush the TLB after setting user-bit Nadav Amit
2021-06-17 18:37 ` Paolo Bonzini

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).