From: "Kang, Luwei" <luwei.kang@intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"rkrcmar@redhat.com" <rkrcmar@redhat.com>,
"Christopherson, Sean J" <sean.j.christopherson@intel.com>,
"vkuznets@redhat.com" <vkuznets@redhat.com>,
"wanpengli@tencent.com" <wanpengli@tencent.com>,
"jmattson@google.com" <jmattson@google.com>,
"joro@8bytes.org" <joro@8bytes.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"bp@alien8.de" <bp@alien8.de>, "hpa@zytor.com" <hpa@zytor.com>,
"x86@kernel.org" <x86@kernel.org>,
"ak@linux.intel.com" <ak@linux.intel.com>,
"thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
"acme@kernel.org" <acme@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"alexander.shishkin@linux.intel.com"
<alexander.shishkin@linux.intel.com>,
"jolsa@redhat.com" <jolsa@redhat.com>,
"namhyung@kernel.org" <namhyung@kernel.org>
Subject: RE: [PATCH v1 4/8] KVM: x86: Aviod clear the PEBS counter when PEBS enabled in guest
Date: Wed, 30 Oct 2019 04:06:42 +0000 [thread overview]
Message-ID: <82D7661F83C1A047AF7DC287873BF1E173835B24@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <20191029145553.GL4097@hirez.programming.kicks-ass.net>
> > This patch introduce a parameter that avoid clear the PEBS event
> > counter while running in the guest. The performance counter which use
> > for PEBS event can be enabled through VM-entry when PEBS is enabled in
> > guest by PEBS output to Intel PT.
>
> Please write coherent Changelogs. I have no clue what you're trying to say.
>
> Also, maybe this attrocious coding style is accepted in KVM, but I'm not having it. Pretty much all your linebreaks and subsequent
> indenting is against style.
Sorry. I mean the performance counter for PEBS event must be disabled before VM-entry at present. After PEBS enabled in guest by PEBS via PT, we don't need to disable the PEBS counters.
We be corrected in next version.
Thanks,
Luwei Kang
next prev parent reply other threads:[~2019-10-30 4:06 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-27 23:11 [PATCH v1 0/8] PEBS enabling in KVM guest Luwei Kang
2019-10-27 23:11 ` [PATCH v1 1/8] KVM: x86: Add base address parameter for get_fixed_pmc function Luwei Kang
2019-10-27 23:11 ` [PATCH v1 2/8] KVM: x86: PEBS output to Intel PT MSRs emulation Luwei Kang
2019-10-29 15:02 ` Peter Zijlstra
2019-10-30 4:06 ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 3/8] KVM: x86: Allocate performance counter for PEBS event Luwei Kang
2019-10-29 14:46 ` Peter Zijlstra
2019-10-30 4:06 ` Kang, Luwei
2019-10-30 6:42 ` Alexander Shishkin
2019-10-30 6:49 ` Kang, Luwei
2019-10-30 9:51 ` Peter Zijlstra
2019-10-30 9:50 ` Peter Zijlstra
2019-10-30 9:49 ` Peter Zijlstra
2019-10-30 13:41 ` Alexander Shishkin
2019-10-31 11:10 ` Kang, Luwei
2019-11-06 7:44 ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 4/8] KVM: x86: Aviod clear the PEBS counter when PEBS enabled in guest Luwei Kang
2019-10-29 14:55 ` Peter Zijlstra
2019-10-30 4:06 ` Kang, Luwei [this message]
2019-10-27 23:11 ` [PATCH v1 5/8] KVM: X86: Expose PDCM cpuid to guest Luwei Kang
2019-10-27 23:11 ` [PATCH v1 6/8] KVM: X86: MSR_IA32_PERF_CAPABILITIES MSR emulation Luwei Kang
2019-10-27 23:11 ` [PATCH v1 7/8] KVM: x86: Expose PEBS feature to guest Luwei Kang
2019-10-29 15:05 ` Peter Zijlstra
2019-10-30 4:07 ` Kang, Luwei
2019-10-30 9:52 ` Peter Zijlstra
2019-10-31 4:21 ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 8/8] perf/x86: Add event owner check when PEBS output to Intel PT Luwei Kang
2019-10-29 15:13 ` Peter Zijlstra
2019-10-30 4:07 ` Kang, Luwei
2019-10-30 9:54 ` Peter Zijlstra
2019-10-31 6:55 ` Kang, Luwei
2019-10-31 7:39 ` Alexander Shishkin
2019-10-31 10:31 ` Kang, Luwei
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