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From: "Kang, Luwei" <luwei.kang@intel.com>
To: 'Peter Zijlstra' <peterz@infradead.org>
Cc: "'kvm@vger.kernel.org'" <kvm@vger.kernel.org>,
	"'linux-kernel@vger.kernel.org'" <linux-kernel@vger.kernel.org>,
	"'pbonzini@redhat.com'" <pbonzini@redhat.com>,
	"'rkrcmar@redhat.com'" <rkrcmar@redhat.com>,
	"Christopherson, Sean J" <sean.j.christopherson@intel.com>,
	"'vkuznets@redhat.com'" <vkuznets@redhat.com>,
	"'wanpengli@tencent.com'" <wanpengli@tencent.com>,
	"'jmattson@google.com'" <jmattson@google.com>,
	"'joro@8bytes.org'" <joro@8bytes.org>,
	"'tglx@linutronix.de'" <tglx@linutronix.de>,
	"'mingo@redhat.com'" <mingo@redhat.com>,
	"'bp@alien8.de'" <bp@alien8.de>,
	"'hpa@zytor.com'" <hpa@zytor.com>,
	"'x86@kernel.org'" <x86@kernel.org>,
	"'ak@linux.intel.com'" <ak@linux.intel.com>,
	"'thomas.lendacky@amd.com'" <thomas.lendacky@amd.com>,
	"'acme@kernel.org'" <acme@kernel.org>,
	"'mark.rutland@arm.com'" <mark.rutland@arm.com>,
	"'alexander.shishkin@linux.intel.com'" 
	<alexander.shishkin@linux.intel.com>,
	"'jolsa@redhat.com'" <jolsa@redhat.com>,
	"'namhyung@kernel.org'" <namhyung@kernel.org>
Subject: RE: [PATCH v1 3/8] KVM: x86: Allocate performance counter for PEBS event
Date: Wed, 6 Nov 2019 07:44:51 +0000	[thread overview]
Message-ID: <82D7661F83C1A047AF7DC287873BF1E1738387F8@SHSMSX104.ccr.corp.intel.com> (raw)
In-Reply-To: <82D7661F83C1A047AF7DC287873BF1E17383642D@SHSMSX104.ccr.corp.intel.com>

> > > > >  static void pmc_reprogram_counter(struct kvm_pmc *pmc, u32 type,
> > > > >  				  unsigned config, bool exclude_user,
> > > > >  				  bool exclude_kernel, bool intr,
> > > > > -				  bool in_tx, bool in_tx_cp)
> > > > > +				  bool in_tx, bool in_tx_cp, bool pebs)
> > > > >  {
> > > > >  	struct perf_event *event;
> > > > >  	struct perf_event_attr attr = { @@ -111,9 +111,12 @@ static
> > > > > void pmc_reprogram_counter(struct kvm_pmc *pmc,
> > u32 type,
> > > > >  		.exclude_user = exclude_user,
> > > > >  		.exclude_kernel = exclude_kernel,
> > > > >  		.config = config,
> > > > > +		.precise_ip = pebs ? 1 : 0,
> > > > > +		.aux_output = pebs ? 1 : 0,
> > > >
> > > > srsly?
> > >
> > > Hi Peter,
> > >     Thanks for review. For aux_output, I think it should be set 1
> > > when the guest wants to
> > enabled PEBS by Intel PT.
> > >      For precise_ip, it is the precise level in perf and set by perf
> > > command line in KVM
> > guest, this may not reflect the accurate value (can be 0~3) here. Here
> > set to 1 is used to allocate a counter for PEBS event and set the
> > MSR_IA32_PEBS_ENABLE register. For PMU virtualization, KVM will trap
> > the guest's write operation to PMU registers and allocate/free event
> > counter from host if a counter enable/disable in guest. We can't
> > always deduce the exact parameter of perf command line from the value of the guest
> writers to the register.
> >
> > Please, teach your MUA to wrap on 78 chars.
> >
> > The thing I really fell over is the gratuitous 'bool ? 1 : 0'. But
> > yes, the aux_output without a group leader is dead wrong. We'll go fix
> > perf_event_create_kernel_counter() to refuse that.
> 
> Yes, I also think it is a little gratuitous here. But it is a little hard to reconstruct the guest
> perf parameters from the register value, especially the "precise_ip". Do you have any
> advice?
> 
> About refuse the perf_event_create_kernel_counter() request w/o aux_ouput, I think I
> need to allocate the PT event as group leader here,  is that right?

Hi Peter,
     What's your opinion?

Thanks,
Luwei Kang

  reply	other threads:[~2019-11-06  7:44 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-27 23:11 [PATCH v1 0/8] PEBS enabling in KVM guest Luwei Kang
2019-10-27 23:11 ` [PATCH v1 1/8] KVM: x86: Add base address parameter for get_fixed_pmc function Luwei Kang
2019-10-27 23:11 ` [PATCH v1 2/8] KVM: x86: PEBS output to Intel PT MSRs emulation Luwei Kang
2019-10-29 15:02   ` Peter Zijlstra
2019-10-30  4:06     ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 3/8] KVM: x86: Allocate performance counter for PEBS event Luwei Kang
2019-10-29 14:46   ` Peter Zijlstra
2019-10-30  4:06     ` Kang, Luwei
2019-10-30  6:42       ` Alexander Shishkin
2019-10-30  6:49         ` Kang, Luwei
2019-10-30  9:51           ` Peter Zijlstra
2019-10-30  9:50         ` Peter Zijlstra
2019-10-30  9:49       ` Peter Zijlstra
2019-10-30 13:41         ` Alexander Shishkin
2019-10-31 11:10         ` Kang, Luwei
2019-11-06  7:44           ` Kang, Luwei [this message]
2019-10-27 23:11 ` [PATCH v1 4/8] KVM: x86: Aviod clear the PEBS counter when PEBS enabled in guest Luwei Kang
2019-10-29 14:55   ` Peter Zijlstra
2019-10-30  4:06     ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 5/8] KVM: X86: Expose PDCM cpuid to guest Luwei Kang
2019-10-27 23:11 ` [PATCH v1 6/8] KVM: X86: MSR_IA32_PERF_CAPABILITIES MSR emulation Luwei Kang
2019-10-27 23:11 ` [PATCH v1 7/8] KVM: x86: Expose PEBS feature to guest Luwei Kang
2019-10-29 15:05   ` Peter Zijlstra
2019-10-30  4:07     ` Kang, Luwei
2019-10-30  9:52       ` Peter Zijlstra
2019-10-31  4:21         ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 8/8] perf/x86: Add event owner check when PEBS output to Intel PT Luwei Kang
2019-10-29 15:13   ` Peter Zijlstra
2019-10-30  4:07     ` Kang, Luwei
2019-10-30  9:54       ` Peter Zijlstra
2019-10-31  6:55         ` Kang, Luwei
2019-10-31  7:39           ` Alexander Shishkin
2019-10-31 10:31             ` Kang, Luwei

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