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From: Vitaly Kuznetsov <vkuznets@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Cc: Eduardo Habkost <ehabkost@redhat.com>,
	Richard Henderson <rth@twiddle.net>,
	Marcelo Tosatti <mtosatti@redhat.com>,
	Liran Alon <liran.alon@oracle.com>,
	Roman Kagan <rkagan@virtuozzo.com>,
	kvm@vger.kernel.org
Subject: Re: [PATCH RFC] target/i386: filter out VMX_PIN_BASED_POSTED_INTR when enabling SynIC
Date: Wed, 19 Feb 2020 10:54:14 +0100	[thread overview]
Message-ID: <878sky9a2h.fsf@vitty.brq.redhat.com> (raw)
In-Reply-To: <d5a3159d-4cab-ef94-bbfc-e9120324cd3e@redhat.com>

Paolo Bonzini <pbonzini@redhat.com> writes:

> On 18/02/20 18:08, Vitaly Kuznetsov wrote:
>> Paolo Bonzini <pbonzini@redhat.com> writes:
>> 
>>> On 18/02/20 15:44, Vitaly Kuznetsov wrote:
>>>> Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
>>>> ---
>>>> RFC: This is somewhat similar to eVMCS breakage and it is likely possible
>>>> to fix this in KVM. I decided to try QEMU first as this is a single
>>>> control and unlike eVMCS we don't need to keep a list of things to disable.
>>>
>>> I think you should disable "virtual-interrupt delivery" instead (which
>>> in turn requires "process posted interrupts" to be zero).  That is the
>>> one that is incompatible with AutoEOI interrupts.
>> 
>> I'm fighting the symptoms, not the cause :-) My understanding is that
>> when SynIC is enabled for CPU0 KVM does
>> 
>> kvm_vcpu_update_apicv()
>> 	vmx_refresh_apicv_exec_ctrl()
>> 		pin_controls_set()
>> 
>> for *all* vCPUs (KVM_REQ_APICV_UPDATE). I'm not sure why
>> SECONDARY_EXEC_APIC_REGISTER_VIRT/SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY
>> are not causing problems and only PIN_BASED_POSTED_INTR does as we clear
>> them all (not very important atm).
>
> Let's take a step back, what is the symptom, i.e. how does it fail?

I just do

~/qemu/x86_64-softmmu/qemu-system-x86_64 -machine q35,accel=kvm -cpu host,hv_vpindex,hv_synic -smp 2 -m 16384 -vnc :0
and get
qemu-system-x86_64: error: failed to set MSR 0x48d to 0xff00000016
qemu-system-x86_64: /root/qemu/target/i386/kvm.c:2684: kvm_buf_set_msrs: Assertion `ret == cpu->kvm_msr_buf->nmsrs' failed.
Aborted

(it works with '-smp 1' or without 'hv_synic')

> Because thinking more about it, since we have separate VMCS we can set
> PIN_BASED_POSTED_INTR and SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY just fine
> in the vmcs02.
> The important part is to unconditionally call
> vmx_deliver_nested_posted_interrupt.
>
> Something like
>
> 	if (kvm_x86_ops->deliver_posted_interrupt(vcpu, vector)) {
>                 kvm_lapic_set_irr(vector, apic);
>                 kvm_make_request(KVM_REQ_EVENT, vcpu);
>                 kvm_vcpu_kick(vcpu);
>         }
>
> and in vmx_deliver_posted_interrupt
>
>         r = vmx_deliver_nested_posted_interrupt(vcpu, vector);
>         if (!r)
>                 return 0;
>
> 	if (!vcpu->arch.apicv_active)
>                 return -1;
>         ...
>         return 0;

Sound like a plan, let me try playing with it.

-- 
Vitaly


  reply	other threads:[~2020-02-19  9:54 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-18 14:44 [PATCH RFC] target/i386: filter out VMX_PIN_BASED_POSTED_INTR when enabling SynIC Vitaly Kuznetsov
2020-02-18 16:13 ` Paolo Bonzini
2020-02-18 17:08   ` Vitaly Kuznetsov
2020-02-18 17:47     ` Paolo Bonzini
2020-02-19  9:54       ` Vitaly Kuznetsov [this message]
2020-02-18 16:56 ` no-reply
2020-02-18 17:14   ` Vitaly Kuznetsov

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