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* [kvm-unit-tests PATCH] x86: Change ALTERNATE_APIC_BASE to saner value
@ 2019-04-30 14:09 nadav.amit
  2019-05-20 14:11 ` Paolo Bonzini
  0 siblings, 1 reply; 2+ messages in thread
From: nadav.amit @ 2019-04-30 14:09 UTC (permalink / raw)
  To: Paolo Bonzini; +Cc: kvm, Nadav Amit, Sean Christopherson

From: Nadav Amit <nadav.amit@gmail.com>

According to the SDM, during initialization, the BSP "Switches to
protected mode and ensures that the APIC address space is mapped to the
strong uncacheable (UC) memory type." This requirement is not followed
when the tests that relocate the APIC.

Use the TPM base address for the alternate local-APIC base, as it is
expected to be set as uncacheable by the BIOS.

Cc: Sean Christopherson <sean.j.christopherson@intel.com>
Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
---
 x86/apic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/x86/apic.c b/x86/apic.c
index de4a181..173b8b1 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -159,7 +159,7 @@ static void test_apic_disable(void)
     report_prefix_pop();
 }
 
-#define ALTERNATE_APIC_BASE	0x42000000
+#define ALTERNATE_APIC_BASE	0xfed40000
 
 static void test_apicbase(void)
 {
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [kvm-unit-tests PATCH] x86: Change ALTERNATE_APIC_BASE to saner value
  2019-04-30 14:09 [kvm-unit-tests PATCH] x86: Change ALTERNATE_APIC_BASE to saner value nadav.amit
@ 2019-05-20 14:11 ` Paolo Bonzini
  0 siblings, 0 replies; 2+ messages in thread
From: Paolo Bonzini @ 2019-05-20 14:11 UTC (permalink / raw)
  To: nadav.amit; +Cc: kvm, Sean Christopherson

On 30/04/19 16:09, nadav.amit@gmail.com wrote:
> From: Nadav Amit <nadav.amit@gmail.com>
> 
> According to the SDM, during initialization, the BSP "Switches to
> protected mode and ensures that the APIC address space is mapped to the
> strong uncacheable (UC) memory type." This requirement is not followed
> when the tests that relocate the APIC.
> 
> Use the TPM base address for the alternate local-APIC base, as it is
> expected to be set as uncacheable by the BIOS.
> 
> Cc: Sean Christopherson <sean.j.christopherson@intel.com>
> Suggested-by: Sean Christopherson <sean.j.christopherson@intel.com>
> Signed-off-by: Nadav Amit <nadav.amit@gmail.com>
> ---
>  x86/apic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/x86/apic.c b/x86/apic.c
> index de4a181..173b8b1 100644
> --- a/x86/apic.c
> +++ b/x86/apic.c
> @@ -159,7 +159,7 @@ static void test_apic_disable(void)
>      report_prefix_pop();
>  }
>  
> -#define ALTERNATE_APIC_BASE	0x42000000
> +#define ALTERNATE_APIC_BASE	0xfed40000
>  
>  static void test_apicbase(void)
>  {
> 

Queued, thanks.

Paolo

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2019-05-20 14:12 UTC | newest]

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2019-04-30 14:09 [kvm-unit-tests PATCH] x86: Change ALTERNATE_APIC_BASE to saner value nadav.amit
2019-05-20 14:11 ` Paolo Bonzini

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