From: Dave Hansen <dave.hansen@intel.com>
To: "Andersen, John" <john.s.andersen@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <sean.j.christopherson@intel.com>,
corbet@lwn.net, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, x86@kernel.org, hpa@zytor.com, shuah@kernel.org,
liran.alon@oracle.com, drjones@redhat.com,
rick.p.edgecombe@intel.com, kristen@linux.intel.com,
vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com,
joro@8bytes.org, mchehab+huawei@kernel.org,
gregkh@linuxfoundation.org, paulmck@kernel.org,
pawan.kumar.gupta@linux.intel.com, jgross@suse.com,
mike.kravetz@oracle.com, oneukum@suse.com, luto@kernel.org,
peterz@infradead.org, fenghua.yu@intel.com,
reinette.chatre@intel.com, vineela.tummalapalli@intel.com,
dave.hansen@linux.intel.com, arjan@linux.intel.com,
caoj.fnst@cn.fujitsu.com, bhe@redhat.com, nivedita@alum.mit.edu,
keescook@chromium.org, dan.j.williams@intel.com,
eric.auger@redhat.com, aaronlewis@google.com, peterx@redhat.com,
makarandsonare@google.com, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
linux-kselftest@vger.kernel.org,
kernel-hardening@lists.openwall.com
Subject: Re: [PATCH 2/4] KVM: x86: Introduce paravirt feature CR0/CR4 pinning
Date: Thu, 9 Jul 2020 08:56:39 -0700 [thread overview]
Message-ID: <af6ac772-318d-aab0-ce5f-55cf92f6e96d@intel.com> (raw)
In-Reply-To: <20200709154412.GA25@64c96d3be97b>
On 7/9/20 8:44 AM, Andersen, John wrote:
>
> Bits which are allowed to be pinned default to WP for CR0 and SMEP,
> SMAP, and UMIP for CR4.
I think it also makes sense to have FSGSBASE in this set.
I know it hasn't been tested, but I think we should do the legwork to
test it. If not in this set, can we agree that it's a logical next step?
next prev parent reply other threads:[~2020-07-09 15:56 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-17 19:07 [PATCH 0/4] Paravirtualized Control Register pinning John Andersen
2020-06-17 19:07 ` [PATCH 1/4] X86: Update mmu_cr4_features during feature identification John Andersen
2020-06-18 14:09 ` Dave Hansen
2020-06-17 19:07 ` [PATCH 2/4] KVM: x86: Introduce paravirt feature CR0/CR4 pinning John Andersen
2020-06-18 14:18 ` Dave Hansen
2020-06-18 14:43 ` Andersen, John
2020-06-18 14:51 ` Dave Hansen
2020-07-07 21:12 ` Sean Christopherson
2020-07-07 21:48 ` Dave Hansen
2020-07-07 21:51 ` Paolo Bonzini
2020-07-09 15:44 ` Andersen, John
2020-07-09 15:56 ` Dave Hansen [this message]
[not found] ` <CALCETrWxt0CHUoonWX1fgbM46ydJPQZhj8Q=G+45EG4wW3wZqQ@mail.gmail.com>
2020-07-09 16:22 ` Dave Hansen
2020-07-09 23:37 ` Kees Cook
[not found] ` <CALCETrUHcpqjDfAM9SbrZUM7xcS2wkVm=r1Nb1JmxV7A-KAeUQ@mail.gmail.com>
2020-07-14 5:36 ` Andersen, John, Arvind Sankar
2020-07-14 5:39 ` Andersen, John
2020-07-15 4:41 ` Sean Christopherson
2020-07-15 19:58 ` Andersen, John
2020-06-17 19:07 ` [PATCH 3/4] selftests: kvm: add test for CR pinning with SMM John Andersen
2020-06-17 19:07 ` [PATCH 4/4] X86: Use KVM CR pin MSRs John Andersen
2020-06-18 14:41 ` Dave Hansen
2020-06-18 15:26 ` Andersen, John
2020-06-18 15:38 ` Dave Hansen
2020-06-18 15:49 ` Andersen, John
2020-06-20 5:13 ` Andy Lutomirski
2020-06-23 20:03 ` Andersen, John
2020-07-03 21:48 ` Andersen, John
2020-07-04 15:11 ` Arvind Sankar
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